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1. 发明授权

US06977857B2 DRAM and refresh method thereof 失效
标题翻译： DRAM及其刷新方法
公开(公告)号：US06977857B2
公开(公告)日：2005-12-20
申请号：US10446400
申请日：2003-05-28
申请人： Masaya Mori , Toshio Sunaga , Shinpei Watanabe
发明人： Masaya Mori , Toshio Sunaga , Shinpei Watanabe
IPC分类号： G11C11/406 , G11C7/00
CPC分类号： G11C11/406 , G11C2211/4061 , G11C2211/4067
摘要： The present invention relates to a DRAM having a memory array that is divided into a plurality of memory blocks. A memory block having a long data retention time is selected from the plurality of memory blocks and a logical address is allocated to the selected memory block. The selected memory block is refreshed at longer time intervals compared to conventional DRAMs resulting in lower power consumption.
摘要翻译：本发明涉及具有被划分成多个存储块的存储器阵列的DRAM。从多个存储块中选择具有长数据保持时间的存储块，并且将逻辑地址分配给所选存储块。与常规DRAM相比，所选择的存储器块以更长的时间间隔被刷新，导致较低的功耗。

2. 发明授权

US07460538B2 Communication control apparatus and method for searching an internet protocol address 失效
标题翻译：用于搜索因特网协议地址的通信控制装置和方法
公开(公告)号：US07460538B2
公开(公告)日：2008-12-02
申请号：US10780213
申请日：2004-02-17
申请人： Yoshihisa Takatsu , Shinpei Watanabe , Masaya Mori , Toshio Sunaga
发明人： Yoshihisa Takatsu , Shinpei Watanabe , Masaya Mori , Toshio Sunaga
IPC分类号： H04L12/28 , H04J1/16 , G08C15/00 , G06F11/00
CPC分类号： H04L45/00 , H04L45/48 , H04L45/7457 , Y10S707/99935
摘要： A communication control apparatus includes search information associated with a tree structure. A mask prefix is associated with at least one entry, each entry including information on the mask length of a mask prefix associated therewith and a sort key. Each entry is assigned to a node in the tree structure according to a sorting order. Each node is linked to a different node at the next lower hierarchy via a branch based on the entry of the node. A destination address of the packet received is first extracted, and a search target node specified by a search control for an entry having information on the best matched prefix of the extracted address is then searched for. After completion of the node-by-node search process, a transfer route is determined for the packet received based on the longest prefix amongst the most appropriate prefixes of all the current search target nodes.
摘要翻译：通信控制装置包括与树结构相关联的搜索信息。掩码前缀与至少一个条目相关联，每个条目包括与其相关联的掩码前缀的掩码长度和排序密钥的信息。每个条目根据排序顺序分配给树结构中的一个节点。每个节点通过基于节点的条目的分支链接到下一个较低层次上的不同节点。首先提取接收到的分组的目的地地址，然后搜索由具有关于提取的地址的最佳匹配前缀的信息的条目的搜索控制指定的搜索目标节点。在逐节点搜索处理完成之后，基于所有当前搜索目标节点的最适合的前缀中的最长前缀来确定接收的分组的传输路由。

3. 发明授权

US07469243B2 Method and device for searching fixed length data 失效
标题翻译：用于搜索固定长度数据的方法和设备
公开(公告)号：US07469243B2
公开(公告)日：2008-12-23
申请号：US10707943
申请日：2004-01-27
申请人： Masaya Mori , Shinpei Watanabe , Yoshihisa Takatsu , Toshio Sunaga
发明人： Masaya Mori , Shinpei Watanabe , Yoshihisa Takatsu , Toshio Sunaga
IPC分类号： G06F7/00 , G06F12/00 , G06F15/16
CPC分类号： G06F17/30949 , G06F7/02 , Y10S707/99933
摘要： Embodiments of the present invention provide method and device for searching fixed length data. The device includes a hash operation means for operating and outputting a hash value of inputted fixed length data, a data table memory consisting of N numbers of memory banks, where N is an integer that is more than and equal to 2, the data table memory for storing a data table holding a large number of fixed length data, a pointer table memory for storing a memory pointer table holding a memory address at which each fixed length datum is stored with the hash value as an index, and a comparison means for simultaneously comparing a plurality of fixed length data stored at the same memory address in the N numbers of memory banks with a single fixed length datum inputted to the hash operation means, the comparison means for outputting results of the comparison.
摘要翻译：本发明的实施例提供了用于搜索固定长度数据的方法和装置。该装置包括用于操作和输出输入的固定长度数据的散列值的散列操作装置，由N个存储体组成的数据表存储器，其中N是大于等于2的整数，数据表存储器用于存储保持大量固定长度数据的数据表;指针表存储器，用于存储存储指针表，该存储器指针表保存以散列值作为索引存储每个固定长度数据的存储器地址;以及比较装置，用于同时将存储在N个存储体组中的相同存储器地址的多个固定长度数据与输入到散列运算装置的单个固定长度数据进行比较，该比较装置用于输出比较结果。

4. 发明授权

US07124278B2 Information processing device and method, program, data structure, and computer-readable recording medium 失效
标题翻译：信息处理装置和方法，程序，数据结构和计算机可读记录介质
公开(公告)号：US07124278B2
公开(公告)日：2006-10-17
申请号：US10707941
申请日：2004-01-27
申请人： Masaya Mori , Shinpei Watanabe , Yoshihisa Takatsu , Toshio Sunaga
发明人： Masaya Mori , Shinpei Watanabe , Yoshihisa Takatsu , Toshio Sunaga
IPC分类号： G06F12/00
CPC分类号： G06F17/30949 , H04L29/12839 , H04L61/6022
摘要： Upon implementing a data registration into or a data retrieval from a data table (3) where first item data are registered along with corresponding second item data, there are used a first pointer table (1) where pointers to part of the registered data in the data table are registered in storage positions that are designated by hash values obtained by applying a first hash function (6) to the first item data of the part of the registered data, and a second pointer table (2) where pointers to the other registered data in the data table are registered in storage positions that are designated by hash values obtained by applying a second hash function (22) to the first item data of the other registered data.
摘要翻译：在从第一项目数据与相应的第二项目数据一起登记的数据表（3）中实现数据注册或数据检索时，使用第一指针表（1），其中指向数据表被登记在由通过将第一散列函数（6）应用于登记数据的一部分的第一项数据而获得的散列值所指定的存储位置中，以及第二指针表（2），其中指向另一个寄存器的指针数据表中的数据被登记在通过将第二散列函数（22）应用于其他登记数据的第一项数据而获得的散列值所指定的存储位置中。

5. 发明授权

US06898661B2 Search memory, memory search controller, and memory search method 失效
标题翻译：搜索内存，内存搜索控制器和内存搜索方法
公开(公告)号：US06898661B2
公开(公告)日：2005-05-24
申请号：US10248781
申请日：2003-02-18
申请人： Masaya Mori , Toshio Sunaga , Shinpei Watanabe
发明人： Masaya Mori , Toshio Sunaga , Shinpei Watanabe
IPC分类号： G06F12/00 , G11C15/00 , G06F12/02
CPC分类号： G11C15/00 , Y10S707/99933
摘要： A distributor and a search controller are added to the memory. A search is performed with an algorithm such as quick search by repeating reading of memory cells, comparing of the reading result, and narrowing down of entries to be compared based on the comparison result. Performing this sequential processing in the memory provides valid data in a bus time plus about half of a cycle time required in repeating reading a conventional memory. Then, the latter half of the cycle time can be used for comparison, as well as generation of the next memory cell address, so that the search can be finished in a bus time multiplied by the number of repetitions of reading the memory cells plus one bus time. As a result, a CAM function can be achieved that allows for more than tens of thousands of entry data items, the number of which is equal to the size of DRAM divided by the number of banks, rather than hundreds or thousands of entry data items as conventional CAM.
摘要翻译：分配器和搜索控制器被添加到存储器中。基于比较结果，通过重复读取存储器单元，比较读取结果和缩小要比较的条目来进行快速搜索等算法的搜索。在存储器中执行这种顺序处理在总线时间内提供有效的数据加上重复读取常规存储器所需的周期时间的大约一半。然后，循环时间的后半部分可以用于比较，以及下一个存储单元地址的生成，使得可以在总线时间乘以读取存储器单元的重复次数加上一个公共汽车时间。结果，可以实现CAM功能，其允许数以万计的入口数据项，其数目等于DRAM的大小除以银行的数量，而不是数百或数千个条目数据项如传统CAM。

6. 发明授权

US06865136B2 Timing circuit and method of changing clock period 有权
标题翻译：定时电路及时钟周期改变方法
公开(公告)号：US06865136B2
公开(公告)日：2005-03-08
申请号：US10604057
申请日：2003-06-24
申请人： Toshio Sunaga , Shinpei Watanabe , Masaya Mori
发明人： Toshio Sunaga , Shinpei Watanabe , Masaya Mori
IPC分类号： G11C7/22 , G11C8/00 , G11C11/34 , G11C11/406
CPC分类号： G11C11/40626 , G11C7/04 , G11C7/22 , G11C7/222 , G11C11/406 , G11C2207/2227 , G11C2211/4061 , G11C2211/4067
摘要： The object of this invention is to provide a timing circuit that can change a clock period with low power consumption. The timing circuit includes a clock generator 11, comparators 12 and 13 for comparing an inputted control voltage TDV and reference voltages VR, respectively, retaining circuits 18 and 19 for retaining outputs of the comparators, respectively, and circuits 20, 21 and 22 for producing timing pulses TDT as an output thereof based on outputs of the retaining circuits and clock signals outputted from the clock generator. Each comparator receives a first clock signal SS outputted from the clock generator and is operated only for a time corresponding to a short pulse width of the first clock signal SS.
摘要翻译：本发明的目的是提供一种能够以低功耗改变时钟周期的定时电路。定时电路包括时钟发生器11，比较器12和13，用于分别比较输入的控制电压TDV和参考电压VR，分别用于保持比较器的输出的保持电路18和19以及用于产生电路的电路20,21和22 定时脉冲TDT作为其输出，基于保持电路的输出和从时钟发生器输出的时钟信号。每个比较器接收从时钟发生器输出的第一时钟信号SS，并且仅对与第一时钟信号SS的短脉冲宽度相对应的时间进行操作。

7. 发明授权

US06961802B2 Data input/output device, memory system, data input/output circuit, and data input/output method 失效
标题翻译：数据输入/输出设备，存储系统，数据输入/输出电路和数据输入/输出方式
公开(公告)号：US06961802B2
公开(公告)日：2005-11-01
申请号：US10064496
申请日：2002-07-22
申请人： Masaya Mori , Shinpei Watanabe
发明人： Masaya Mori , Shinpei Watanabe
IPC分类号： G11C11/417 , G06F3/00 , G06F13/00 , G06F13/16 , G06F13/38 , G06F13/42 , G11C7/10
CPC分类号： G11C7/1057 , G06F13/4243 , G11C7/10 , G11C7/1051 , G11C7/1078 , G11C7/1084
摘要： When an output of data is switched from a memory to a memory controller, the memory controller takes in write data output from the memory, and outputs the write data taken in to a data bus. Subsequently, the memory controller outputs read data taken thereinto to the data bus, and then outputs write data of its own to the data bus.
摘要翻译：当数据的输出从存储器切换到存储器控制器时，存储器控制器从存储器输入写入数据，并将写入的数据输出到数据总线。随后，存储器控制器将读取的数据输出到数据总线，然后将其自己的写入数据输出到数据总线。

8. 发明授权

US4947464A Heating coil assembly for an electromagnetic induction cooking assembly 失效
标题翻译：用于电磁感应烹饪组件的加热线圈组件
公开(公告)号：US4947464A
公开(公告)日：1990-08-07
申请号：US150281
申请日：1988-01-29
申请人： Masaya Mori , Kazunobu Kihira
发明人： Masaya Mori , Kazunobu Kihira
IPC分类号： H05B6/36
CPC分类号： H05B6/1272 , H05B2206/022 , Y02B40/126
摘要： In a method of manufacturing a heating coil assembly for electromagnetic induction cooking heater in which a coil supporting base and a flat shaped coil winding frame are mounted on the spindle of a coil winding machine in such a manner as to form a coil receiving space therebetween, and a wire is wound in the space to form a coil, the coil supporting base and/or the coil winding frame has protrusions which extend in the space at the middle part, to vary the coil winding pitch, whereby the coil thus formed has a gap at the middle part, thus showing a uniform temperature distribution when energized.
摘要翻译：在制造用于电磁感应烹调加热器的加热线圈组件的方法中，其中线圈支撑基座和扁平线圈绕组框架以在其间形成线圈容纳空间的方式安装在线圈绕线机的心轴上，并且在空间中缠绕线以形成线圈，线圈支撑基座和/或线圈绕组框架具有在中间部分的空间中延伸的突起，以改变线圈绕组间距，由此形成的线圈具有间隙在中间部分，因此在通电时显示均匀的温度分布。

9. 发明申请

US20120201423A1 IMAGE PROCESSING APPARATUS, IMAGE PROCESSING METHOD, IMAGE PROCESSING PROGRAM AND RECORDING MEDIUM 有权
标题翻译：图像处理装置，图像处理方法，图像处理程序和记录介质
公开(公告)号：US20120201423A1
公开(公告)日：2012-08-09
申请号：US13502972
申请日：2010-10-18
申请人： Rikio Onai , Tomohiro Sato , Masaya Mori , Masahiro Sanjo
发明人： Rikio Onai , Tomohiro Sato , Masaya Mori , Masahiro Sanjo
IPC分类号： G06K9/48 , G06K9/00
CPC分类号： H04N1/3878 , G06T3/00
摘要： There are provided an image processing apparatus, an image processing method and an image processing program for transforming a target image having no contour of straight line portions.An ellipse E1 by which the target image is approximated is calculated (S20), a center candidate OA of the target image is decided (S21), a first polygon P1 associated with the ellipse and the center candidate is calculated (S22), a projective transformation matrix for projectively transforming the first polygon into a second polygon P1′ associated with an ellipse whose center is a point where the center candidate is projectively transformed is calculated (S23), and the target image is projectively transformed based on the projective transformation matrix to obtain a transformation image (S24).
摘要翻译：提供了一种图像处理装置，图像处理方法和用于变换没有直线部分轮廓的目标图像的图像处理程序。计算近似目标图像的椭圆E1（S20），确定目标图像的中心候选OA（S21），计算与椭圆和中心候选相关联的第一多边形P1（S22），投影转换矩阵，用于将第一多边形投影变换为与其中心是中心候选投影变换的点相关联的第二多边形P1'（S23），并且基于投影变换矩阵对目标图像进行投影变换获得变换图像（S24）。

10. 发明申请

US20110164814A1 FOREGROUND REGION EXTRACTION PROGRAM, FOREGROUND REGION EXTRACTION APPARATUS AND FOREGROUND REGION EXTRACTION METHOD 有权
标题翻译：前置区域提取程序，前置区域提取装置和前置区域提取方法
公开(公告)号：US20110164814A1
公开(公告)日：2011-07-07
申请号：US13063334
申请日：2009-09-17
申请人： Rikio Onai , Takahiro Hayashi , Tatsuya Kiyono , Masaya Mori , Masahiro Sanjo
发明人： Rikio Onai , Takahiro Hayashi , Tatsuya Kiyono , Masaya Mori , Masahiro Sanjo
IPC分类号： G06K9/34
CPC分类号： G06T7/11 , G06T7/187 , G06T7/194 , G06T2207/10024 , G06T2207/20101
摘要： There are provided a foreground region extraction program, a foreground region extraction apparatus, and a foreground region extraction method capable of clipping an object region (foreground region) at high speed.An arrangement is as follows: Foreground pixels designated by a user and background pixels designated thereby are each set as a reference pixel to identify, from among a plurality of divided color spaces created by a three-dimensional color space being divided, the divided color space to which each of the reference pixels belongs, as a reference divided color space. Color distance calculation processing to calculate a color distance in the color space between each reference pixel and an adjacent pixel adjacent thereto is performed, and belonging judgment processing to judge whether each of the adjacent pixels belongs to each of the reference divided color spaces is performed, and then, cost calculation processing to calculate a cost of each adjacent pixel is performed, based on the color distance calculated for each of the adjacent pixels, and weights based on whether to belong to the reference divided color space judged for each of the adjacent pixels. Further determination processing to determine the adjacent pixel having the lowest calculated cost as a foreground pixel or background pixel is performed, and a foreground region is extracted from the image by using the determined adjacent pixel as a reference pixel to repeatedly perform the color distance calculation processing, the belonging judgment processing, the cost calculation processing, and the determination processing.
摘要翻译：提供了能够高速地削减对象区域（前景区域）的前景区域提取程序，前景区域提取装置和前景区域提取方法。布置如下：由用户指定的前景像素和由此指定的背景像素分别设置为参考像素，以识别由被划分的三维颜色空间创建的多个分割颜色空间中的分割颜色空间每个参考像素所属的，作为参考分色色空间。执行用于计算每个参考像素和与其相邻的相邻像素之间的颜色空间中的颜色距离的颜色距离计算处理，以及属性判断处理，以判断每个相邻像素是否属于每个参考分割色彩空间，然后，基于为每个相邻像素计算出的颜色距离和基于是否属于为每个相邻像素判断的参考分割颜色空间的权重来执行用于计算每个相邻像素的成本的成本计算处理。执行将具有最低计算成本的相邻像素确定为前景像素或背景像素的进一步确定处理，并且通过使用所确定的相邻像素作为参考像素从图像中提取前景区域以重复执行色彩距离计算处理归属判断处理，成本计算处理和确定处理。

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