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1. 发明授权

US07879635B2 Method for manufacturing semiconductor optical device 有权
标题翻译：制造半导体光学器件的方法
公开(公告)号：US07879635B2
公开(公告)日：2011-02-01
申请号：US11772297
申请日：2007-07-02
申请人： Toshihiko Shiga , Hitoshi Sakuma
发明人： Toshihiko Shiga , Hitoshi Sakuma
IPC分类号： H01L21/00
CPC分类号： B82Y20/00 , H01S5/1039 , H01S5/2009 , H01S5/2086 , H01S5/2214 , H01S5/2231 , H01S5/3063 , H01S5/3211 , H01S5/34333
摘要： A method for manufacturing a laser diode includes: providing a semiconductor structure in which semiconductor layers are laminated; forming a waveguide ridge in the layers; forming an SiO2 film over the entire surface; forming a second resist pattern covering the SiO2 film in channels adjacent the waveguide ridge such that top surfaces of the second resist pattern in the channels are higher than the top surface of a p-GaN layer in the waveguide ridge and lower than the top surface of the SiO2 film on the top of the waveguide ridge, the second resist pattern exposing the top surface of the SiO2 film on the top of the waveguide ridge; removing the SiO2 film, using the second resist pattern as a mask, to expose the top surface of the p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.
摘要翻译：一种激光二极管的制造方法，其特征在于，具备：层叠半导体层的半导体结构体; 在层中形成波导脊; 在整个表面上形成SiO 2膜; 在与所述波导脊相邻的通道中形成覆盖所述SiO 2膜的第二抗蚀剂图案，使得所述通道中的所述第二抗蚀剂图案的顶表面高于所述波导脊中的p-GaN层的顶表面，并且低于所述波导脊的顶表面在波导脊顶部的SiO 2膜，第二抗蚀剂图案暴露在波导脊顶部的SiO 2膜的顶表面; 使用第二抗蚀剂图案作为掩模去除SiO 2膜，以暴露波导脊中的p-GaN层的顶表面; 以及在p-GaN层的顶表面上形成电极层。

2. 发明申请

US20080116575A1 NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US20080116575A1
公开(公告)日：2008-05-22
申请号：US11844707
申请日：2007-08-24
申请人： Katsuomi Shiozawa , Hitoshi Sakuma , Kazushige Kawasaki , Toshihiko Shiga , Toshiyuki Oishi
发明人： Katsuomi Shiozawa , Hitoshi Sakuma , Kazushige Kawasaki , Toshihiko Shiga , Toshiyuki Oishi
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L29/452 , H01L29/2003
摘要： A nitride semiconductor device according to the present invention includes a P-type contact layer and a P-type electrode provided on the P-type contact layer. The P-type electrode includes a AuGa film provided on the P-type contact layer, a Au film provided on the AuGa film, a Pt film 4 provided on the Au film, and a Au film provided on the Pt film. The ratio of the thickness of the AuGa film to the total thickness of the AuGa film and the Au film is not less than 12% but not more than 46%.
摘要翻译：根据本发明的氮化物半导体器件包括设置在P型接触层上的P型接触层和P型电极。 P型电极包括设置在P型接触层上的AuGa膜，设置在AuGa膜上的Au膜，设置在Au膜上的Pt膜4和设置在Pt膜上的Au膜。 AuGa膜的厚度与AuGa膜和Au膜的总厚度的比率不小于12％但不大于46％。

3. 发明授权

US07714439B2 Nitride semiconductor device and method of manufacturing the same 失效
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US07714439B2
公开(公告)日：2010-05-11
申请号：US11844707
申请日：2007-08-24
申请人： Katsuomi Shiozawa , Hitoshi Sakuma , Kazushige Kawasaki , Toshihiko Shiga , Toshiyuki Oishi
发明人： Katsuomi Shiozawa , Hitoshi Sakuma , Kazushige Kawasaki , Toshihiko Shiga , Toshiyuki Oishi
IPC分类号： H01L23/48 , H01L21/4763
CPC分类号： H01L29/452 , H01L29/2003
摘要： A nitride semiconductor device according to the present invention includes a P-type contact layer and a P-type electrode provided on the P-type contact layer. The P-type electrode includes a AuGa film provided on the P-type contact layer, a Au film provided on the AuGa film, a Pt film 4 provided on the Au film, and a Au film provided on the Pt film. The ratio of the thickness of the AuGa film to the total thickness of the AuGa film and the Au film is not less than 12% but not more than 46%.
摘要翻译：根据本发明的氮化物半导体器件包括设置在P型接触层上的P型接触层和P型电极。 P型电极包括设置在P型接触层上的AuGa膜，设置在AuGa膜上的Au膜，设置在Au膜上的Pt膜4和设置在Pt膜上的Au膜。 AuGa膜的厚度与AuGa膜和Au膜的总厚度的比率不小于12％但不大于46％。

4. 发明申请

US20080023799A1 NITRIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：氮化物半导体器件及其制造方法
公开(公告)号：US20080023799A1
公开(公告)日：2008-01-31
申请号：US11772644
申请日：2007-07-02
申请人： Kyozo KANAMOTO , Katsuomi Shiozawa , Kazushige Kawasaki , Hitoshi Sakuma , Junichi Horie , Toshihiko Shiga , Toshiyuki Oishi
发明人： Kyozo KANAMOTO , Katsuomi Shiozawa , Kazushige Kawasaki , Hitoshi Sakuma , Junichi Horie , Toshihiko Shiga , Toshiyuki Oishi
IPC分类号： H01L29/207 , H01L21/20
CPC分类号： H01S5/22 , H01L33/0095 , H01L33/32 , H01L33/40 , H01S5/0425 , H01S5/32341 , H01S2301/173 , H01S2304/00
摘要： A nitride semiconductor device includes an n-type GaN substrate with a semiconductor device formed thereon and an n-type electrode which is a metal electrode formed on the rear surface of the GaN substrate. A surface modified layer and a reaction layer are interposed between the GaN substrate and n-type electrode. The surface modified layer serves as a carrier supplying layer, and is formed by causing the rear surface of the GaN substrate to react with a Si-containing plasma to be modified. The reaction layer is generated by partially removing a deposited material deposited on the surface modified layer by cleaning to generate a deposited layer and then causing Ti contained in a first metal layer and the deposited layer to partially react by heat treatment.
摘要翻译：氮化物半导体器件包括其上形成有半导体器件的n型GaN衬底和形成在GaN衬底的背面上的作为金属电极的n型电极。在GaN衬底和n型电极之间插入表面改性层和反应层。表面改性层用作载体供给层，并且通过使GaN衬底的后表面与待改性的含Si等离子体反应而形成。反应层是通过清洗部分除去沉积在表面改性层上的沉积材料产生沉积层，然后使包含在第一金属层中的Ti和沉积层通过热处理部分地反应而产生的。

5. 发明授权

US07791097B2 Nitride semiconductor device and manufacturing method of the same 有权
标题翻译：氮化物半导体器件及其制造方法相同
公开(公告)号：US07791097B2
公开(公告)日：2010-09-07
申请号：US11772644
申请日：2007-07-02
申请人： Kyozo Kanamoto , Katsuomi Shiozawa , Kazushige Kawasaki , Hitoshi Sakuma , Junichi Horie , Toshihiko Shiga , Toshiyuki Oishi
发明人： Kyozo Kanamoto , Katsuomi Shiozawa , Kazushige Kawasaki , Hitoshi Sakuma , Junichi Horie , Toshihiko Shiga , Toshiyuki Oishi
IPC分类号： H01L29/207 , H01L21/20
CPC分类号： H01S5/22 , H01L33/0095 , H01L33/32 , H01L33/40 , H01S5/0425 , H01S5/32341 , H01S2301/173 , H01S2304/00
摘要： A nitride semiconductor device includes an n-type GaN substrate with a semiconductor device formed thereon and an n-type electrode which is a metal electrode formed on the rear surface of the GaN substrate. A surface modified layer and a reaction layer are interposed between the GaN substrate and n-type electrode. The surface modified layer serves as a carrier supplying layer, and is formed by causing the rear surface of the GaN substrate to react with a Si-containing plasma to be modified. The reaction layer is generated by partially removing a deposited material deposited on the surface modified layer by cleaning to generate a deposited layer and then causing Ti contained in a first metal layer and the deposited layer to partially react by heat treatment.
摘要翻译：氮化物半导体器件包括其上形成有半导体器件的n型GaN衬底和形成在GaN衬底的背面上的作为金属电极的n型电极。在GaN衬底和n型电极之间插入表面改性层和反应层。表面改性层用作载体供给层，并且通过使GaN衬底的后表面与待改性的含Si等离子体反应而形成。反应层是通过清洗部分除去沉积在表面改性层上的沉积材料产生沉积层，然后使包含在第一金属层中的Ti和沉积层通过热处理部分地反应而产生的。

6. 发明申请

US20080020502A1 METHOD FOR MANUFACTURING SEMICONDUCTOR OPTICAL DEVICE 有权
标题翻译：制造半导体光学器件的方法
公开(公告)号：US20080020502A1
公开(公告)日：2008-01-24
申请号：US11772297
申请日：2007-07-02
申请人： Toshihiko Shiga , Hitoshi Sakuma
发明人： Toshihiko Shiga , Hitoshi Sakuma
IPC分类号： H01L21/00
CPC分类号： B82Y20/00 , H01S5/1039 , H01S5/2009 , H01S5/2086 , H01S5/2214 , H01S5/2231 , H01S5/3063 , H01S5/3211 , H01S5/34333
摘要： A method for manufacturing a laser diode includes: providing a semiconductor structure in which semiconductor layers are laminated; forming a waveguide ridge in the layers; forming an SiO2 film over the entire surface; forming a second resist pattern covering the SiO2 film in channels adjacent the waveguide ridge such that top surfaces of the second resist pattern in the channels are higher than the top surface of a p-GaN layer in the waveguide ridge and lower than the top surface of the SiO2 film on the top of the waveguide ridge, the second resist pattern exposing the top surface of the SiO2 film on the top of the waveguide ridge; removing the SiO2 film, using the second resist pattern as a mask, to expose the top surface of the p-GaN layer in the waveguide ridge; and forming an electrode layer on the top surface of the p-GaN layer.
摘要翻译：一种激光二极管的制造方法，其特征在于，具备：层叠半导体层的半导体结构体; 在层中形成波导脊; 在整个表面上形成SiO 2膜; 在与所述波导脊相邻的通道中形成覆盖所述SiO 2膜的第二抗蚀剂图案，使得所述通道中的所述第二抗蚀剂图案的顶表面高于所述波导中的p-GaN层的顶表面并且比波导脊的顶部上的SiO 2膜的顶表面低，第二抗蚀剂图案将SiO 2膜的顶表面暴露在顶部的波导脊; 使用第二抗蚀剂图案作为掩模去除SiO 2膜，以暴露波导脊中的p-GaN层的顶表面; 以及在p-GaN层的顶表面上形成电极层。

7. 发明申请

US20060231871A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20060231871A1
公开(公告)日：2006-10-19
申请号：US11374141
申请日：2006-03-14
申请人： Hirotaka Amasuga , Toshihiko Shiga , Tetsuo Kunii , Tomoki Oku
发明人： Hirotaka Amasuga , Toshihiko Shiga , Tetsuo Kunii , Tomoki Oku
IPC分类号： H01L29/80 , H01L29/76 , H01L31/112 , H01L29/94 , H01L31/00
CPC分类号： H01L29/475 , H01L21/28581 , H01L21/28587 , H01L29/42316
摘要： A gate electrode serving as a Schottky electrode includes a TaNx layer and an Au layer. The TaNx layer serves as a barrier metal for preventing atoms from diffusing from the Au layer into a substrate. TaNx does not contain Si, and therefore has a higher humidity resistance than WSiN containing Si. Accordingly, the gate electrode has a higher humidity resistance than a conventional gate electrode including a WSiN layer. Setting a nitrogen content at less than 0.8 can prevent significant degradation in Schottky characteristics as compared to the conventional gate electrode. Setting the nitrogen content at 0.5 or less, Schottky characteristics can be improved more than in the conventional gate electrode.
摘要翻译：用作肖特基电极的栅电极包括TaNx层和Au层。 TaNx层用作防止原子从Au层扩散到衬底中的阻挡金属。 TaNx不含Si，因此具有比含有Si的WSiN更高的耐湿性。因此，栅电极具有比包含WSiN层的常规栅电极更高的耐湿性。与常规栅电极相比，氮含量小于0.8可以防止肖特基特性的显着降低。将氮含量设定为0.5以下，与常规栅电极相比，肖特基特性可以得到改善。

8. 发明授权

US07569911B2 Semiconductor device having an improved wiring or electrode structure 有权
标题翻译：具有改进的布线或电极结构的半导体器件
公开(公告)号：US07569911B2
公开(公告)日：2009-08-04
申请号：US11410194
申请日：2006-04-25
申请人： Toshihiko Shiga , Hitoshi Nakamura , Junji Tanimura
发明人： Toshihiko Shiga , Hitoshi Nakamura , Junji Tanimura
IPC分类号： H01L29/93
CPC分类号： H01L21/28575 , H01L29/452 , Y10S257/928
摘要： An ohmic electrode is formed by stacking a lower Ti layer, a diffusion preventing layer, an upper Ti layers and a metallic (Au) layer on a p-type GaAs layer. The diffusion preventing layer includes tantalum (Ta) or niobium (Nb). Thus, interdiffusion of Ga and As in the p-type GaAs layer and Au in the metallic layer can be prevented, and variation in resistivity of the ohmic electrode in a high-temperature, high-humidity environment can be suppressed.
摘要翻译：通过在p型GaAs层上堆叠下Ti层，扩散防止层，上Ti层和金属（Au）层来形成欧姆电极。扩散防止层包括钽（Ta）或铌（Nb）。因此，可以防止金属层中的p型GaAs层和Au中的Ga和As的相互扩散，并且可以抑制在高温，高湿度环境中的欧姆电极的电阻率的变化。

9. 发明授权

US07288486B2 Method for manufacturing semiconductor device having via holes 失效
公开(公告)号：US07288486B2
公开(公告)日：2007-10-30
申请号：US11472384
申请日：2006-06-22
申请人： Takeo Shirahama , Toshihiko Shiga , Kouichirou Hori
发明人： Takeo Shirahama , Toshihiko Shiga , Kouichirou Hori
IPC分类号： H01L21/461
CPC分类号： H01L21/76898 , H01L21/0475
摘要： In a method for manufacturing a semiconductor device wherein via holes are formed in an SiC substrate, a stacked film consisting of a Ti film and an Au film is formed on the back face of the SiC substrate, and a Pd film is formed thereon. Then, an Ni film is formed by non-electrolytic plating, using the Pd film as a catalyst. Thereafter, via holes penetrating through the SiC substrate are formed by etching, using the Ni film as a mask.

10. 发明授权

US08766445B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08766445B2
公开(公告)日：2014-07-01
申请号：US13525433
申请日：2012-06-18
申请人： Takayuki Hisaka , Takahiro Nakamoto , Toshihiko Shiga , Koichiro Nishizawa
发明人： Takayuki Hisaka , Takahiro Nakamoto , Toshihiko Shiga , Koichiro Nishizawa
IPC分类号： H01L23/48
CPC分类号： H01L23/3192 , H01L23/564 , H01L24/05 , H01L2224/02331 , H01L2224/05008 , H01L2224/0508 , H01L2224/05166 , H01L2224/05169 , H01L2224/05568 , H01L2224/05569 , H01L2224/05573 , H01L2224/05583 , H01L2224/05644 , H01L2924/00014 , H01L2224/05552
摘要： A semiconductor device includes: a semiconductor substrate; an underlying wiring on the semiconductor substrate; a resin film extending to the semiconductor substrate and the underlying wiring, and having a first opening on the underlying wiring; a first SiN film on the underlying wiring and the resin film, and having a second opening in the first opening; an upper layer wiring on the underlying wiring and part of the resin film; and a second SiN film on the upper layer wiring and the resin film, and joined to the first SiN film on the resin film. The upper layer wiring includes a Ti film, connected to the underlying wiring via the first and second openings, and an Au film on the Ti film. The first and second SiN films circumferentially protect the Ti film.
摘要翻译：半导体器件包括：半导体衬底; 半导体衬底上的底层布线; 延伸到半导体衬底和底层布线的树脂膜，并且在下面的布线上具有第一开口; 下面的布线和树脂膜上的第一SiN膜，并且在第一开口中具有第二开口; 底层布线上的上层布线和树脂膜的一部分; 和上层布线和树脂膜上的第二SiN膜，并与树脂膜上的第一SiN膜接合。上层布线包括通过第一和第二开口连接到底层布线的Ti膜，以及Ti膜上的Au膜。第一和第二SiN膜周向地保护Ti膜。

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