专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06546471B1 Shared memory multiprocessor performing cache coherency 失效
标题翻译：共享内存多处理器执行高速缓存一致性
公开(公告)号：US06546471B1
公开(公告)日：2003-04-08
申请号：US09506810
申请日：2000-02-18
申请人： Toshiaki Tarui , Koichi Okazawa , Yasuyuki Okada , Toru Shonai , Toshio Okochi , Hideya Akashi
发明人： Toshiaki Tarui , Koichi Okazawa , Yasuyuki Okada , Toru Shonai , Toshio Okochi , Hideya Akashi
IPC分类号： G06F1314
CPC分类号： G06F12/0826 , G06F12/0284 , G06F2212/2542
摘要： A shared memory multiprocessor (SMP) has efficient access to a main memory included in a particular node and a management of partitions that include the nodes. In correspondence with each page of main memory included in a node, a bit stored in a register indicates if the page has been accessed from any other node. In a case where the bit is “0”, a cache coherent command to be sent to the other nodes is not transmitted. The bit is reset by software at the time of initialization and memory allocation, and it is set by hardware when the page of the main memory is accessed from any other node. In a case where the interior of an SMP is divided into partitions, the main memory of each node is divided into local and shared areas, for which respectively separate addresses can be designated. In each node, the configuration information items of the shared area and the local area are stored in registers. The command of access to the shared area is multicast to all of the nodes, whereas the command is multicast only to the nodes within the corresponding partition when the local area is accessed.
摘要翻译：共享存储器多处理器（SMP）具有对包括在特定节点中的主存储器的有效访问以及包括节点的分区的管理。与包含在节点中的主存储器的每页对应，存储在寄存器中的位指示是否已经从任何其他节点访问了页面。在比特为“0”的情况下，不发送要发送到其他节点的高速缓存相干命令。该位在初始化和内存分配时由软件复位，当从任何其他节点访问主存储器的页面时，该位由硬件置1。在将SMP的内部划分成分区的情况下，将各节点的主存储器划分为本地区域和共享区域，分别分别分配地址。在每个节点中，共享区域和局部区域的配置信息项存储在寄存器中。访问共享区域的命令是组播到所有节点，而当访问本地区域时，该命令仅组播到相应分区内的节点。

2. 发明授权

US6088770A Shared memory multiprocessor performing cache coherency 失效
公开(公告)号：US6088770A
公开(公告)日：2000-07-11
申请号：US30957
申请日：1998-02-26
申请人： Toshiaki Tarui , Koichi Okazawa , Yasuyuki Okada , Toru Shonai , Toshio Okochi , Hideya Akashi
发明人： Toshiaki Tarui , Koichi Okazawa , Yasuyuki Okada , Toru Shonai , Toshio Okochi , Hideya Akashi
IPC分类号： G06F15/177 , G06F12/02 , G06F12/08 , G06F15/17 , G06F13/14
CPC分类号： G06F12/0826 , G06F12/0284 , G06F2212/2542
摘要： A shared memory multiprocessor (SMP) has efficient access to a main memory included in a particular node and a management of partitions that include the nodes. In correspondence with each page of main memory included in a node, a bit stored in a register indicates if the page has been accessed from any other node. In a case where the bit is "0", a cache coherent command to be sent to the other nodes is not transmitted. The bit is reset by software at the time of initialization and memory allocation, and it is set by hardware when the page of the main memory is accessed from any other node. In a case where the interior of an SMP is divided into partitions, the main memory of each node is divided into local and shared areas, for which respectively separate addresses can be designated. In each node, the configuration information items of the shared area and the local area are stored in registers. The command of access to the shared area is multicast to all of the nodes, whereas the command is multicast only to the nodes within the corresponding partition when the local area is accessed.

3. 发明授权

US06378021B1 Switch control method and apparatus in a system having a plurality of processors 失效
标题翻译：具有多个处理器的系统中的开关控制方法和装置
公开(公告)号：US06378021B1
公开(公告)日：2002-04-23
申请号：US09250155
申请日：1999-02-16
申请人： Koichi Okazawa , Toshiaki Tarui , Yasuyuki Okada
发明人： Koichi Okazawa , Toshiaki Tarui , Yasuyuki Okada
IPC分类号： G06F1300
CPC分类号： H04L41/069 , G06F15/17375 , H04L41/0672 , H04L43/0811 , H04L49/101 , H04L49/201 , H04L49/254 , H04L49/552
摘要： In an information processing apparatus having a crossbar switch, registers are provided for logical division of a connection of the crossbar switch into a plurality of groups, in order to allow a system to change the group division configuration while the system is in an ordinary operation. As an application of this, in a hot standby system, when a fault occurs in an active partition and the active partition is replaced by a standby partition, the standby partition is allowed to include system resources used by the active partition such as CPU's and memories.
摘要翻译：在具有交叉开关的信息处理装置中，提供寄存器用于将交叉开关的连接逻辑划分成多个组，以便允许系统在系统处于普通操作时改变组划分配置。作为应用，在热备份系统中，当在活动分区中发生故障并且活动分区被备用分区替换时，备用分区被允许包括活动分区所使用的系统资源，例如CPU和存储器。

4. 发明授权

US6131169A Reliability of crossbar switches in an information processing system 失效
标题翻译：交叉开关在信息处理系统中的可靠性
公开(公告)号：US6131169A
公开(公告)日：2000-10-10
申请号：US460513
申请日：1999-12-14
申请人： Koichi Okazawa , Toshiaki Tarui , Yasuyuki Okada
发明人： Koichi Okazawa , Toshiaki Tarui , Yasuyuki Okada
IPC分类号： G06F13/36 , G06F11/00 , G06F11/20 , G06F15/167
CPC分类号： G06F11/2005 , G06F11/2007
摘要： An information processing apparatus includes a crossbar switch having a plurality of switching circuits for data transfer; connection lines having address data transfer paths of m-bit unit connected to each of the input/output ports of the switching circuits, control signal transfer paths of m-bit unit connected to each of the input/output ports of the control circuits and back-up transfer paths of m-bit unit connected to each of the input/output ports of the back-up circuits; and transfer path processing circuit connected correspondingly to the connection lines constructed by the n-bit provided on each of the processing units, monitored transfer of data and control signal between the processing units through the switching circuit and the control circuit in the crossbar switch, and detected a failure of at least the switching circuit and the control circuit to thereby change the connection of at least one of the failed switching circuit and control circuit to a connection of the back-up circuit.
摘要翻译：一种信息处理设备，包括具有用于数据传送的多个切换电路的交叉开关; 具有连接到开关电路的每个输入/输出端口的m位单元的地址数据传送路径的连接线，连接到控制电路的每个输入/输出端口的m位单元的控制信号传送路径和后面 - 连接到备用电路的每个输入/输出端口的m位单元的传送路径; 以及传送路径处理电路，其对应于由在每个处理单元上提供的n位构成的连接线，通过开关电路和交叉开关中的控制电路在处理单元之间监视的数据传输和控制信号，以及检测到至少开关电路和控制电路的故障，从而将故障切换电路和控制电路中的至少一个的连接改变为备用电路的连接。

5. 发明授权

US6035414A Reliability of crossbar switches in an information processing system 失效
公开(公告)号：US6035414A
公开(公告)日：2000-03-07
申请号：US962683
申请日：1997-11-03
申请人： Koichi Okazawa , Toshiaki Tarui , Yasuyuki Okada
发明人： Koichi Okazawa , Toshiaki Tarui , Yasuyuki Okada
IPC分类号： G06F13/36 , G06F11/00 , G06F11/20 , G06F15/167
CPC分类号： G06F11/2005 , G06F11/2007
摘要： An information processing apparatus includes a crossbar switch having a plurality of switching circuits for data transfer; connection lines having address data transfer paths of m-bit unit connected to each of the input/output ports of the switching circuits, control signal transfer paths of m-bit unit connected to each of the input/output ports of the control circuits and back-up transfer paths of m-bit unit connected to each of the input/output ports of the back-up circuits; and transfer path processing circuit connected correspondingly to the connection lines constructed by the n-bit provided on each of the processing units, monitored transfer of data and control signal between the processing units through the switching circuit and the control circuit in the crossbar switch, and detected a failure of at least the switching circuit and the control circuit to thereby change the connection of at least one of the failed switching circuit and control circuit to a connection of the back-up circuit.

6. 发明授权

US07281249B2 Computer forming logical partitions 失效
标题翻译：计算机形成逻辑分区
公开(公告)号：US07281249B2
公开(公告)日：2007-10-09
申请号：US09941734
申请日：2001-08-30
申请人： Toshiaki Tarui , Shin Kameyama , Frederico Buchholz Maciel , Toru Shonai
发明人： Toshiaki Tarui , Shin Kameyama , Frederico Buchholz Maciel , Toru Shonai
IPC分类号： G06F9/46 , G01R31/08
CPC分类号： G06F9/5077
摘要： A computer controls I/O allocation for partitions independently of CPU allocation and, in each I/O adapter and partition, the computer has a scheduling means controlling allocation for partitions of the I/O adapter by time sharing, a means to allocate the I/O adapter to partitions by space sharing and a means to dynamically change said allocation made by a partition-control program. Further, the computer has a means to monitor input/output performance of each partition, and a means to maintain SLA of a user program according to performance of each partition.
摘要翻译：计算机控制独立于CPU分配的分区的I / O分配，并且在每个I / O适配器和分区中，计算机具有通过时间共享来控制对I / O适配器的分区的分配的调度装置，分配I / O适配器通过空间共享分区，并且是动态地改变由分区控制程序进行的分配的手段。此外，计算机具有监视每个分区的输入/输出性能的手段，以及根据每个分区的性能来维护用户程序的SLA的手段。

7. 发明授权

US07062559B2 Computer resource allocating method 失效
公开(公告)号：US07062559B2
公开(公告)日：2006-06-13
申请号：US10080715
申请日：2002-02-25
申请人： Yutaka Yoshimura , Toshiaki Tarui , Frederico Buchholz Maciel , Toru Shonai
发明人： Yutaka Yoshimura , Toshiaki Tarui , Frederico Buchholz Maciel , Toru Shonai
IPC分类号： G06F15/16
CPC分类号： H04L12/4645 , H04L29/06 , H04L41/0816 , H04L67/1002 , H04L67/1008 , H04L67/1029 , H04L2029/06054
摘要： When a load of a user is fluctuated, a data center dynamically changes resource allocation to the user according to the load and holds security for each user.A control program on a data center managing server creates a VLAN configuration table so as to allocate a user-dedicated VLAN including plural network switches for each user company, thereby configuring the ports of a load balancer and network switches allocated to a user to the user-dedicated VLAN. A VPN is configured from the user to the data center, whereby a VLAN tagging technique is used to hold security of the user from the user to the data center. The control program compares a user condition setting table created along the service level agreement for each user with the monitoring result of the computer operating state (the CPU utilization history in a VLAN operation table) to dynamically change the computer allocation and VLAN configuration at unsatisfied agreement. Specifically, the VLAN configuration table and the VLAN operation table are changed to change the VLAN configuration in the load balancer and the network switches (in the case of the Web layer). The control program changes the parameter (the sever allocation history in the VLAN operation table) related to charge information based on that.

8. 发明授权

US06510496B1 Shared memory multiprocessor system and method with address translation between partitions and resetting of nodes included in other partitions 失效
标题翻译：共享内存多处理器系统和分区之间的地址转换和其他分区中包含的节点的重置的方法
公开(公告)号：US06510496B1
公开(公告)日：2003-01-21
申请号：US09501978
申请日：2000-02-11
申请人： Toshiaki Tarui , Toshio Okochi , Shinichi Kawamoto
发明人： Toshiaki Tarui , Toshio Okochi , Shinichi Kawamoto
IPC分类号： G06F1210
CPC分类号： G06F12/0284 , G06F12/0831 , G06F12/1072 , G06F2212/656
摘要： A symmetric multiprocessor (SMP) of hierarchical connection realizing an inter-partition shared memory has at the gateway of an inter-node connection switch from each node, a translator for translating an address of an access command for an area shared between partitions, between a real address used in a partition and a shared area address used in common between partitions. Thereby, the address of a local area of each partition is freely set, and cache coherent control of a shared area is conducted at high speed by using a snoop command of the hierarchical connection SMP. Fault containment between partitions is realized by checking conformity between the address of the access command issued from another partition and the shared area configuration. Nodes included in other partitions may be reset from each partition. In addition, the configuration information of the shared area between partitions may be dynamically modified.
摘要翻译：实现分区间共享存储器的分级连接的对称多处理器（SMP）已经在从每个节点的节点间连接切换的网关处，转换器用于翻译分区之间共享的区域的访问命令的地址，分区中使用的实际地址和分区之间共用的共享区域地址。由此，可以自由地设定每个分区的局部区域的地址，通过使用分层连接SMP的窥探命令，高速地进行共享区域的高速缓存一致控制。通过检查从另一个分区发出的访问命令的地址与共享区域配置之间的一致性来实现分区之间的故障保护。包括在其他分区中的节点可以从每个分区重置。此外，可以动态地修改分区之间的共享区域的配置信息。

9. 发明授权

US09065728B2 Failure analysis device, and system and method for same 有权
标题翻译：故障分析装置，系统及方法相同
公开(公告)号：US09065728B2
公开(公告)日：2015-06-23
申请号：US13819563
申请日：2011-03-03
申请人： Isao Shimokawa , Toshiaki Tarui , Hiroki Miyamoto , Tomohiro Baba
发明人： Isao Shimokawa , Toshiaki Tarui , Hiroki Miyamoto , Tomohiro Baba
IPC分类号： H04L12/24 , H04L12/26 , H04L12/703
CPC分类号： H04L41/06 , H04L41/0631 , H04L41/142 , H04L45/28
摘要： Systems, methods and devices for failure analysis are provided. Using aggregation flow mining (AFM) or a similar method, an integrated mining of flow (IMF) acquires, from each router to be tested, information relating to each flow. The IMF, in relation to each of the routers, obtains distributions of statistical information such as throughput or difference for each flow; calculates, in relation to each of the distributions, a Mahalanobis distance in relation to the expected value of a reference distribution; and makes a comprehensive assessment of the distributions to perform a fault determination. When the fault determination is performed, a normal value of the distribution used for comparison is acquired from AFM and updated through feedback as needed. After the results of fault determination relating to other routers are assessed, the expected value of the standard deviation and the average value of the reference distribution used for comparison are updated.
摘要翻译：提供了故障分析的系统，方法和设备。使用聚合流挖掘（AFM）或类似方法，流的综合挖掘（IMF）从每个待测试的路由器获取与每个流相关的信息。 IMF与每个路由器相关，获得统计信息的分布，例如每个流的吞吐量或差异; 相对于每个分布计算与参考分布的期望值相关的马氏距离; 并对分布进行综合评估，以进行故障确定。当执行故障确定时，从AFM获取用于比较的分布的正常值，并根据需要通过反馈进行更新。在评估与其他路由器相关的故障确定结果之后，更新用于比较的标准偏差的预期值和参考分布的平均值。

10. 发明申请

US20070277046A1 POWER MANAGEMENT METHOD FOR INFORMATION PLATFORM 失效
标题翻译：信息平台的电源管理方法
公开(公告)号：US20070277046A1
公开(公告)日：2007-11-29
申请号：US11753796
申请日：2007-05-25
申请人： Yoshiko Yasuda , Takashige Baba , Jun Okitsu , Toshiaki Tarui
发明人： Yoshiko Yasuda , Takashige Baba , Jun Okitsu , Toshiaki Tarui
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/3209
摘要： To provide a power management method for an information platform, including: holding system configuration information indicating a correspondence between a logical system and a processing module constituting the logical system; holding power management information indicating a correspondence between information with which a type of the logical system can be specified, an operating condition of the logical system, and first power consumption for operating the logical system; selecting, the processing module which constitutes the logical system specified by a configuration request by referring to the system configuration information when receiving the configuration request of the logical system; calculating the first power consumption for operating the logical system based on the type and the operating condition included in the configuration request, and the power management information; and determining second power consumption to be supplied to the processing module based on the calculated first power consumption and information on the processing modules.
摘要翻译：提供一种用于信息平台的电源管理方法，包括：保持指示逻辑系统和构成逻辑系统的处理模块之间的对应关系的系统配置信息; 保持表示可以指定逻辑系统的类型的信息与逻辑系统的运行状态和操作逻辑系统的第一功耗之间的对应关系的功率管理信息; 在接收到逻辑系统的配置请求时，通过参考系统配置信息来选择构成由配置请求指定的逻辑系统的处理模块; 基于配置请求中包括的类型和操作条件以及电源管理信息，计算用于操作逻辑系统的第一功耗; 以及基于所计算的第一功率消耗和关于处理模块的信息来确定要提供给处理模块的第二功率消耗。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式