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1. 发明申请

US20120037914A1 HETEROJUNCTION BIOPOLAR TRANSISTOR AND MANUFACTURING METHOD 有权
标题翻译：异源双极晶体管和制造方法
公开(公告)号：US20120037914A1
公开(公告)日：2012-02-16
申请号：US13205932
申请日：2011-08-09
申请人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Marie Josephe Fabienne Gridelet
发明人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Marie Josephe Fabienne Gridelet
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/7378 , H01L29/1004 , H01L29/66242
摘要： A method of manufacturing a heterojunction bipolar transistor, including providing a substrate comprising an active region bordered by shallow trench insulation regions; depositing a stack of a dielectric layer and a polysilicon layer over the substrate; forming a base window in the stack, the base window extending over the active region and part of the shallow trench insulation regions, the base window having a trench extending vertically between the active region and one of the shallow trench insulation regions; growing an epitaxial base material inside the base window; forming a spacer on the exposed side walls of the base material; and filling the base window with an emitter material. A HBT manufactured in this manner and an IC including such an HBT.
摘要翻译：一种制造异质结双极晶体管的方法，包括提供包括由浅沟槽绝缘区域界定的有源区的衬底; 在衬底上沉积介电层和多晶硅层的堆叠; 在所述堆叠中形成基窗，所述基窗在所述有源区和所述浅沟槽绝缘区的一部分上延伸，所述基窗具有在所述有源区和所述浅沟绝缘区之间的垂直延伸的沟槽; 在基座窗内生长外延基底材料; 在基材的暴露的侧壁上形成间隔物; 并用发射体材料填充基座窗口。以这种方式制造的HBT和包括这种HBT的IC。

2. 发明授权

US08803156B2 Heterojunction biopolar transistor and manufacturing method 有权
标题翻译：异质结生物极晶体管及其制造方法
公开(公告)号：US08803156B2
公开(公告)日：2014-08-12
申请号：US13205932
申请日：2011-08-09
申请人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Marie Josephe Fabienne Gridelet
发明人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Marie Josephe Fabienne Gridelet
IPC分类号： H01L29/00 , H01L31/036
CPC分类号： H01L29/7378 , H01L29/1004 , H01L29/66242
摘要： A method of manufacturing a heterojunction bipolar transistor, including providing a substrate comprising an active region bordered by shallow trench insulation regions; depositing a stack of a dielectric layer and a polysilicon layer over the substrate; forming a base window in the stack, the base window extending over the active region and part of the shallow trench insulation regions, the base window having a trench extending vertically between the active region and one of the shallow trench insulation regions; growing an epitaxial base material inside the base window; forming a spacer on the exposed side walls of the base material; and filling the base window with an emitter material. A HBT manufactured in this manner and an IC including such an HBT.
摘要翻译：一种制造异质结双极晶体管的方法，包括提供包括由浅沟槽绝缘区域界定的有源区的衬底; 在衬底上沉积介电层和多晶硅层的堆叠; 在所述堆叠中形成基窗，所述基窗在所述有源区和所述浅沟槽绝缘区的一部分上延伸，所述基窗具有在所述有源区和所述浅沟绝缘区之间的垂直延伸的沟槽; 在基座窗内生长外延基体材料; 在基材的暴露的侧壁上形成间隔物; 并用发射体材料填充基座窗口。以这种方式制造的HBT和包括这种HBT的IC。

3. 发明授权

US08871599B2 Method of manufacturing IC comprising a bipolar transistor and IC 有权
标题翻译：制造包括双极晶体管和IC的IC的方法
公开(公告)号：US08871599B2
公开(公告)日：2014-10-28
申请号：US13599389
申请日：2012-08-30
申请人： Johannes Josephus Theodorus Marinus Donkers , Petrus Hubertus Cornelis Magnee , Blandine Duriez , Evelyne Gridelet , Hans Mertens , Tony Vanhoucke
发明人： Johannes Josephus Theodorus Marinus Donkers , Petrus Hubertus Cornelis Magnee , Blandine Duriez , Evelyne Gridelet , Hans Mertens , Tony Vanhoucke
IPC分类号： H01L21/331 , H01L21/8249 , H01L29/737
CPC分类号： H01L29/7378 , H01L21/8249 , H01L27/0623 , H01L29/1004 , H01L29/161 , H01L29/165 , H01L29/456 , H01L29/66242
摘要： Disclosed is an integrated circuit and a method of manufacturing an integrated circuit comprising a bipolar transistor, the method comprising providing a substrate comprising a pair of isolation regions separated by an active region comprising a collector; forming a base layer stack over said substrate; forming a migration layer having a first migration temperature and an etch stop layer; forming a base contact layer having a second migration temperature; etching an emitter window in the base contact layer, thereby forming cavities extending from the emitter window; and exposing the resultant structure to the first migration temperature in a hydrogen atmosphere, thereby filling the cavities with the migration layer material.
摘要翻译：公开了一种集成电路和制造包括双极晶体管的集成电路的方法，所述方法包括提供包括由包括集电极的有源区域分离的一对隔离区域的衬底; 在所述衬底上形成基层堆叠; 形成具有第一迁移温度和蚀刻停止层的迁移层; 形成具有第二迁移温度的基底接触层; 蚀刻基底接触层中的发射器窗口，从而形成从发射器窗口延伸的空腔; 并在氢气氛中将所得结构暴露于第一迁移温度，由此用迁移层材料填充空腔。

4. 发明授权

US08686424B2 Bipolar transistor manufacturing method, bipolar transistor and integrated circuit 有权
标题翻译：双极晶体管制造方法，双极晶体管和集成电路
公开(公告)号：US08686424B2
公开(公告)日：2014-04-01
申请号：US13616400
申请日：2012-09-14
申请人： Evelyne Gridelet , Johannes Josephus Theodorus Marinus Donkers , Tony Vanhoucke , Petrus Hubertus Cornelis Magnee , Hans Mertens , Blandine Duriez
发明人： Evelyne Gridelet , Johannes Josephus Theodorus Marinus Donkers , Tony Vanhoucke , Petrus Hubertus Cornelis Magnee , Hans Mertens , Blandine Duriez
IPC分类号： H01L29/72
CPC分类号： H01L29/732 , H01L29/66242 , H01L29/7378
摘要： Disclosed is a method of manufacturing a bipolar transistor, comprising providing a substrate (10) comprising a first isolation region (12) separated from a second isolation region by an active region (11) comprising a collector impurity; forming a layer stack over said substrate, said layer stack comprising a base layer (14, 14′), a silicon capping layer (15) over said base layer and a silicon-germanium (SiGe) base contact layer (40) over said silicon capping layer; etching the SiGe base contact layer to form an emitter window (50) over the collector impurity, wherein the silicon emitter cap layer is used as etch stop layer; forming sidewall spacers (22) in the emitter window; and filling the emitter window with an emitter material (24). A bipolar transistor manufactured in accordance with this method and an IC comprising one or more of such bipolar transistors are also disclosed.
摘要翻译：公开了一种制造双极晶体管的方法，包括提供包括通过包括集电极杂质的有源区（11）与第二隔离区分离的第一隔离区（12）的衬底（10）在所述衬底上形成层堆叠，所述层堆叠包括基底层（14,14'），所述基底层上的硅覆盖层（15）和位于所述硅上的硅 - 锗（SiGe）基接触层（40）盖层; 蚀刻SiGe基极接触层以在集电极杂质上形成发射极窗口（50），其中硅发射极盖层用作蚀刻停止层; 在发射器窗口中形成侧壁间隔物（22）; 以及用发射体材料（24）填充发射器窗口。还公开了根据该方法制造的双极晶体管和包括一个或多个这样的双极晶体管的IC。

5. 发明授权

US08872237B2 Heterojunction bipolar transistor manufacturing method and integrated circuit comprising a heterojunction bipolar transistor 有权
标题翻译：异质结双极晶体管制造方法和包括异质结双极晶体管的集成电路
公开(公告)号：US08872237B2
公开(公告)日：2014-10-28
申请号：US13299755
申请日：2011-11-18
申请人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Gridelet
发明人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Gridelet
IPC分类号： H01L29/66 , H01L29/737 , H01L29/08
CPC分类号： H01L29/0821 , H01L29/66242 , H01L29/7378
摘要： Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.
摘要翻译：公开了一种制造包括衬底的异质结双极晶体管的方法，所述衬底的上部区域包括由浅沟槽绝缘体界定的双极晶体管的有源区，所述有源区包括延伸到超过深度所述浅沟槽绝缘体，所述方法包括在所述衬底中邻近所述有源区形成沟槽，所述沟槽延伸穿过所述浅沟槽绝缘体; 至少部分地用杂质填充所述沟槽; 以及通过使所述杂质显影而在衬底中形成收集器沉降片，以延伸到衬底中深度超过浅沟槽绝缘深度的深度。还公开了一种包括通过该方法制造的异质结双极晶体管的IC。

6. 发明申请

US20120132961A1 HETEROJUNCTION BIPOLAR TRANSISTOR MANUFACTURING METHOD AND INTEGRATED CIRCUIT COMPRISING A HETEROJUNCTION BIPOLAR TRANSISTOR 有权
标题翻译：异相双极晶体管制造方法和包含异相双极晶体管的集成电路
公开(公告)号：US20120132961A1
公开(公告)日：2012-05-31
申请号：US13299755
申请日：2011-11-18
申请人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Gridelet
发明人： Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez , Evelyne Gridelet
IPC分类号： H01L29/737 , H01L21/328
CPC分类号： H01L29/0821 , H01L29/66242 , H01L29/7378
摘要： Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.
摘要翻译：公开了一种制造包括衬底的异质结双极晶体管的方法，所述衬底的上部区域包括由浅沟槽绝缘体界定的双极晶体管的有源区，所述有源区包括延伸到超过深度所述浅沟槽绝缘体，所述方法包括在所述衬底中邻近所述有源区形成沟槽，所述沟槽延伸穿过所述浅沟槽绝缘体; 至少部分地用杂质填充所述沟槽; 以及通过使所述杂质显影而在衬底中形成收集器沉降片，以延伸到衬底中深度超过浅沟槽绝缘深度的深度。还公开了一种包括通过该方法制造的异质结双极晶体管的IC。

7. 发明授权

US09018681B2 Method of manufacturing a bipolar transistor and bipolar transistor 有权
标题翻译：制造双极晶体管和双极晶体管的方法
公开(公告)号：US09018681B2
公开(公告)日：2015-04-28
申请号：US13303099
申请日：2011-11-22
申请人： Evelyne Gridelet , Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez
发明人： Evelyne Gridelet , Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez
IPC分类号： H01L29/732 , H01L21/8249 , H01L27/06 , H01L29/08 , H01L29/10 , H01L29/66
CPC分类号： H01L21/8249 , H01L27/0623 , H01L29/0813 , H01L29/1004 , H01L29/66287 , H01L29/7322
摘要： Consistent with an example embodiment, there is method of manufacturing a bipolar transistor comprising providing a substrate including an active region; depositing a layer stack; forming a base window over the active region in said layer stack; forming at least one pillar in the base window, wherein a part of the pillar is resistant to polishing; depositing an emitter material over the resultant structure, thereby filling said base window; and planarizing the deposited emitter material by polishing. Consistent with another example embodiment, a bipolar transistor may be manufactured according to the afore-mentioned method.
摘要翻译：与示例实施例一致，存在制造双极晶体管的方法，其包括提供包括有源区的衬底; 沉积层叠; 在所述层叠层中的有源区上形成基窗; 在所述基窗中形成至少一个支柱，其中，所述支柱的一部分抵抗抛光; 在所得结构上沉积发射体材料，从而填充所述基窗; 并通过研磨平坦化沉积的发射体材料。根据另一示例性实施例，可以根据上述方法制造双极晶体管。

8. 发明申请

US20120132999A1 METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR AND BIPOLAR TRANSISTOR 有权
标题翻译：制造双极晶体管和双极晶体管的方法
公开(公告)号：US20120132999A1
公开(公告)日：2012-05-31
申请号：US13303099
申请日：2011-11-22
申请人： Evelyne Gridelet , Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez
发明人： Evelyne Gridelet , Tony Vanhoucke , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Blandine Duriez
IPC分类号： H01L27/06 , H01L29/732 , H01L21/331
CPC分类号： H01L21/8249 , H01L27/0623 , H01L29/0813 , H01L29/1004 , H01L29/66287 , H01L29/7322
摘要： Consistent with an example embodiment, there is method of manufacturing a bipolar transistor comprising providing a substrate including an active region; depositing a layer stack; forming a base window over the active region in said layer stack; forming at least one pillar in the base window, wherein a part of the pillar is resistant to polishing; depositing an emitter material over the resultant structure, thereby filling said base window; and planarizing the deposited emitter material by polishing. Consistent with another example embodiment, a bipolar transistor may be manufactured according to the afore-mentioned method.
摘要翻译：与示例实施例一致，存在制造双极晶体管的方法，其包括提供包括有源区的衬底; 沉积层叠; 在所述层叠层中的有源区上形成基窗; 在所述基窗中形成至少一个支柱，其中，所述支柱的一部分抵抗抛光; 在所得结构上沉积发射体材料，从而填充所述基窗; 并通过研磨平坦化沉积的发射体材料。根据另一示例性实施例，可以根据上述方法制造双极晶体管。

9. 发明授权

US08524551B2 Method of manufacturing heterojunction bipolar transistor and heterojunction bipolar transistor 有权
标题翻译：异质结双极晶体管和异质结双极晶体管的制造方法
公开(公告)号：US08524551B2
公开(公告)日：2013-09-03
申请号：US13547067
申请日：2012-07-12
申请人： Philippe Meunier-Beillard , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Tony Vanhoucke
发明人： Philippe Meunier-Beillard , Johannes Josephus Theodorus Marinus Donkers , Hans Mertens , Tony Vanhoucke
IPC分类号： H01L21/337
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： A method of forming a heterojunction bipolar transistor by depositing a first stack comprising an polysilicon layer and a sacrificial layer on a mono-crystalline silicon substrate surface; patterning that stack to form a trench extending to the substrate; depositing a silicon layer over the resultant structure; depositing a silicon-germanium-carbon layer over the resultant structure; selectively removing the silicon-germanium-carbon layer from the sidewalls of the trench; depositing a boron-doped silicon-germanium-carbon layer over the resultant structure; depositing a further silicon-germanium-carbon layer over the resultant structure; depositing a boron-doped further silicon layer over the resultant structure; forming dielectric spacers on the trench sidewalls; filling the trench with emitter material; exposing polysilicon regions outside the trench side walls by selectively removing the sacrificial layer; implanting boron impurities into the exposed polysilicon regions to define base implants; and exposing the resultant structure to a thermal budget for annealing the boron impurities.
摘要翻译：一种通过在单晶硅衬底表面上沉积包括多晶硅层和牺牲层的第一堆叠来形成异质结双极晶体管的方法; 图案化该叠层以形成延伸到衬底的沟槽; 在所得结构上沉积硅层; 在所得结构上沉积硅 - 锗 - 碳层; 从沟槽的侧壁选择性地去除硅 - 锗 - 碳层; 在所得结构上沉积硼掺杂的硅 - 锗 - 碳层; 在所得结构上沉积另外的硅 - 锗 - 碳层; 在所得结构上沉积硼掺杂的另外的硅层; 在沟槽侧壁上形成电介质间隔物; 用发射体材料填充沟槽; 通过选择性地去除牺牲层来暴露沟槽侧壁外的多晶硅区域; 将硼杂质注入暴露的多晶硅区域以限定基底植入物; 并将所得结构暴露于用于退火硼杂质的热预算。

10. 发明授权

US08101491B2 Heterojunction bipolar transistor 有权
标题翻译：异质结双极晶体管
公开(公告)号：US08101491B2
公开(公告)日：2012-01-24
申请号：US12912030
申请日：2010-10-26
申请人： Johannes Josephus Theodorus Marinus Donkers , Tony Vanhoucke , Hans Mertens
发明人： Johannes Josephus Theodorus Marinus Donkers , Tony Vanhoucke , Hans Mertens
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/7378 , H01L21/8249 , H01L29/66242
摘要： According to an example embodiment, a heterostructure bipolar transistor, HBT, includes shallow trench isolation, STI, structures around a buried collector drift region in contact with a buried collector. A gate stack including a gate oxide and a gate is deposited and etched to define a base window over the buried collector drift region and overlapping the STI structures. The etching process is continued to selectively etch the buried collector drift region between the STI structures to form a base well. SiGeC may be selectively deposited to form epitaxial silicon-germanium in the base well in contact with the buried collector drift region and poly silicon-germanium on the side walls of the base well and base window. Spacers are then formed as well as an emitter.
摘要翻译：根据示例性实施例，异质结双极晶体管HBT包括浅沟槽隔离，STI，与埋藏式集电极接触的掩埋集电极漂移区周围的结构。沉积并蚀刻包括栅极氧化物和栅极的栅极堆叠，以在掩埋集电极漂移区域上限定基极窗并与STI结构重叠。继续蚀刻处理以选择性地蚀刻STI结构之间的掩埋的集电极漂移区域以形成基底阱。可选择性沉积SiGeC，以在基底阱中形成外延硅 - 锗，以与基底阱和基底窗的侧壁上的掩埋集电极漂移区和多晶硅 - 锗接触。然后形成间隔物以及发射体。

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