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1. 发明申请

US20080171424A1 Epitaxial growth of GaN and SiC on silicon using nanowires and nanosize nucleus methodologies 审中-公开
标题翻译：使用纳米线和纳米尺度核方法在硅上外延生长GaN和SiC
公开(公告)号：US20080171424A1
公开(公告)日：2008-07-17
申请号：US11653802
申请日：2007-01-16
申请人： Tingkai Li , Jer-Shen Maa , Douglas J. Tweet , Wei-Wei Zhuang , Sheng Teng Hsu
发明人： Tingkai Li , Jer-Shen Maa , Douglas J. Tweet , Wei-Wei Zhuang , Sheng Teng Hsu
IPC分类号： H01L21/205
CPC分类号： H01L21/02513 , H01L21/02381 , H01L21/0245 , H01L21/02529 , H01L21/0254 , H01L21/02639 , H01L21/02647 , H01L21/0265
摘要： A method of fabricating a continuous layer of a defect sensitive material on a silicon substrate includes preparing a silicon substrate; forming a nanostructure array directly on the silicon substrate; depositing a selective growth enhancing layer on the substrate; smoothing the selective growth enhancing layer; and growing a continuous layer of the defect sensitive material on the nanostructure array.
摘要翻译：在硅衬底上制造缺陷敏感材料的连续层的方法包括制备硅衬底; 在硅衬底上直接形成纳米结构阵列; 在衬底上沉积选择性生长增强层; 平滑选择性生长增强层; 并在纳米结构阵列上生长不连续的缺陷敏感材料层。

2. 发明授权

US07323349B2 Self-aligned cross point resistor memory array 有权
标题翻译：自对准交叉点电阻存储器阵列
公开(公告)号：US07323349B2
公开(公告)日：2008-01-29
申请号：US11120385
申请日：2005-05-02
申请人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet , Wei-Wei Zhuang
发明人： Sheng Teng Hsu , Jong-Jan Lee , Jer-Shen Maa , Douglas J. Tweet , Wei-Wei Zhuang
IPC分类号： H01L21/00 , H01L21/8242
CPC分类号： H01L27/101 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1683
摘要： A method of fabricating resistor memory array includes preparing a silicon substrate; depositing a bottom electrode, a sacrificial layer, and a hard mask layer on a substrate P+ layer; masking, patterning and etching to remove, in a first direction, a portion of the hard mask, the sacrificial material, the bottom electrode; depositing a layer of silicon oxide; masking, patterning and etching to remove, in a second direction perpendicular to the first direction, a portion of the hard mask, the sacrificial material, the bottom electrode;, and over etching to an N+ layer and at least 100 nm of the silicon substrate; depositing of a layer of silicon oxide; etching to remove any remaining hard mask and any remaining sacrificial material; depositing a layer of CMR material; depositing a top electrode; applying photoresist, patterning the photoresist and etching the top electrode; and incorporating the memory array into an integrated circuit.
摘要翻译：制造电阻器存储器阵列的方法包括制备硅衬底; 在衬底P +层上沉积底部电极，牺牲层和硬掩模层; 掩模，图案化和蚀刻以在第一方向上去除硬掩模，牺牲材料，底部电极的一部分; 沉积一层氧化硅; 掩模，图案化和蚀刻以在垂直于第一方向的第二方向上去除硬掩模，牺牲材料，底部电极的一部分，并且对N +层和至少100nm的硅衬底进行过蚀刻 ; 沉积一层氧化硅; 蚀刻以除去任何剩余的硬掩模和任何剩余的牺牲材料; 沉积一层CMR材料; 沉积顶部电极; 施加光致抗蚀剂，图案化光致抗蚀剂并蚀刻顶部电极; 并将存储器阵列并入集成电路中。

3. 发明申请

US20080280426A1 Gallium nitride-on-silicon interface 审中-公开
标题翻译：氮化镓在硅界面
公开(公告)号：US20080280426A1
公开(公告)日：2008-11-13
申请号：US11801210
申请日：2007-05-09
申请人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
发明人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L29/739 , H01L21/20
CPC分类号： C30B29/406 , C30B25/183 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02642 , H01L21/02647 , H01L29/2003 , H01L29/267
摘要： A method is provided for forming a matching thermal expansion interface between silicon (Si) and gallium nitride (GaN) films. The method provides a (111) Si substrate and forms a first aluminum (Al)-containing film in compression overlying the Si substrate. Nano-column holes are formed in the first Al-containing film, which exposes regions of the underlying Si substrate. A layer of GaN layer is selectively grown from the exposed regions, covering the first Al-containing film. The GaN is grown using a lateral nanoheteroepitaxy overgrowth (LNEO) process. The above-mentioned processes are reiterated, forming a second Al-containing film in compression, forming nano-column holes in the second Al-containing film, and selectively growing a second GaN layer. Film materials such as Al2O3, Si1-xGex, InP, GaP, GaAs, AlN, AlGaN, or GaN, may be initially grown at a low temperature. By increasing the growth temperatures, a compressed layer of epitaxial GaN can be formed on a Si substrate.
摘要翻译：提供了一种在硅（Si）和氮化镓（GaN）膜之间形成匹配的热膨胀界面的方法。该方法提供（111）Si衬底并且在压缩覆盖Si衬底上形成第一含铝（Al）的膜。在第一含Al膜中形成纳米柱孔，其暴露下面的Si衬底的区域。从暴露区域选择性地生长GaN层，覆盖第一含Al膜。使用横向纳米外延生长（LNEO）工艺生长GaN。重复上述过程，在压缩中形成第二含Al膜，在第二含Al膜中形成纳米柱孔，并选择性地生长第二GaN层。可以最初在低温下生长诸如Al 2 O 3 3，Si 1-x Ge x，InP，GaP，GaAs，AlN，AlGaN或GaN的膜材料。通过增加生长温度，可以在Si衬底上形成外延GaN的压缩层。

4. 发明授权

US06303502B1 MOCVD metal oxide for one transistor memory 失效
标题翻译： MOCVD金属氧化物用于一个晶体管存储器
公开(公告)号：US06303502B1
公开(公告)日：2001-10-16
申请号：US09588940
申请日：2000-06-06
申请人： Sheng Teng Hsu , David R. Evans , Tingkai Li , Jer-shen Maa , Wei-Wei Zhuang
发明人： Sheng Teng Hsu , David R. Evans , Tingkai Li , Jer-shen Maa , Wei-Wei Zhuang
IPC分类号： H01L2144
CPC分类号： H01L21/28291 , H01L29/78391
摘要： A method of fabricating a one-transistor memory includes, on a single crystal silicon substrate, depositing a bottom electrode structure on a gate oxide layer; implanting ions to form a source region and a drain region and activating the implanted ions spin coating the structure with a first ferroelectric layer; depositing a second ferroelectric layer; and annealing the structure to provide a c-axis ferroelectric orientation.
摘要翻译：制造单晶体管存储器的方法包括在单晶硅衬底上，在栅氧化层上沉积底电极结构; 注入离子以形成源极区域和漏极区域并激活注入的离子旋转涂覆第一铁电层的结构; 沉积第二铁电层; 并退火该结构以提供c轴铁电取向。

5. 发明申请

US20080173895A1 Gallium nitride on silicon with a thermal expansion transition buffer layer 审中-公开
标题翻译：具有热膨胀过渡缓冲层的硅上的氮化镓
公开(公告)号：US20080173895A1
公开(公告)日：2008-07-24
申请号：US11657149
申请日：2007-01-24
申请人： Jer-Shen Maa , Tingkai Li , Douglas J. Tweet , Gregory M. Stecker , Sheng Teng Hsu
发明人： Jer-Shen Maa , Tingkai Li , Douglas J. Tweet , Gregory M. Stecker , Sheng Teng Hsu
IPC分类号： H01L29/267 , H01L21/20
CPC分类号： H01L29/267 , H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/02458 , H01L21/02502 , H01L21/0251 , H01L21/0254 , H01L21/02656 , H01L29/045 , H01L29/2003
摘要： A method is provided for forming a matching thermal expansion interface between silicon (Si) and gallium nitride (GaN) films. The method provides a (111) Si substrate with a first thermal expansion coefficient (TEC), and forms a silicon-germanium (SiGe) film overlying the Si substrate. A buffer layer is deposited overlying the SiGe film. The buffer layer may be aluminum nitride (AlN) or aluminum-gallium nitride (AlGaN). A GaN film is deposited overlying the buffer layer having a second TEC, greater than the first TEC. The SiGe film has a third TEC, with a value in between the first and second TECs. In one aspect, a graded SiGe film may be formed having a Ge content ratio in a range of about 0% to 50%, where the Ge content increases with the graded SiGe film thickness.
摘要翻译：提供了一种在硅（Si）和氮化镓（GaN）膜之间形成匹配的热膨胀界面的方法。该方法提供具有第一热膨胀系数（TEC）的（111）Si衬底，并且形成覆盖Si衬底的硅 - 锗（SiGe）膜。沉积SiGe膜上的缓冲层。缓冲层可以是氮化铝（AlN）或铝 - 氮化镓（AlGaN）。沉积GaN缓冲层，其具有大于第一TEC的第二TEC。 SiGe电影拥有第三个TEC，其值在第一和第二TEC之间。一方面，可以形成具有Ge含量比在约0％至50％的范围内的等级SiGe膜，其中Ge含量随着梯度SiGe膜厚度而增加。

6. 发明授权

US07598108B2 Gallium nitride-on-silicon interface using multiple aluminum compound buffer layers 失效
公开(公告)号：US07598108B2
公开(公告)日：2009-10-06
申请号：US11825427
申请日：2007-07-06
申请人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
发明人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L21/00
CPC分类号： H01L29/155 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L21/02647 , H01L29/2003 , H01L29/205
摘要： A thermal expansion interface between silicon (Si) and gallium nitride (GaN) films using multiple buffer layers of aluminum compounds has been provided, along with an associated fabrication method. The method provides a (111) Si substrate and deposits a first layer of AlN overlying the substrate by heating the substrate to a relatively high temperature of 1000 to 1200° C. A second layer of AlN is deposited overlying the first layer of AlN at a lower temperature of 500 to 800° C. A third layer of AlN is deposited overlying the second layer of AlN by heating the substrate to the higher temperature range. Then, a grading Al1-XGaXN layer is formed overlying the third layer of AlN, where 0

7. 发明申请

US20090008647A1 Gallium nitride-on-silicon interface using multiple aluminum compound buffer layers 失效
标题翻译：使用多个铝化合物缓冲层的氮化镓 - 硅 - 硅界面
公开(公告)号：US20090008647A1
公开(公告)日：2009-01-08
申请号：US11825427
申请日：2007-07-06
申请人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
发明人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L29/15 , H01L21/20
CPC分类号： H01L29/155 , H01L21/02381 , H01L21/02458 , H01L21/02505 , H01L21/0251 , H01L21/0254 , H01L21/0262 , H01L21/02647 , H01L29/2003 , H01L29/205
摘要： A thermal expansion interface between silicon (Si) and gallium nitride (GaN) films using multiple buffer layers of aluminum compounds has been provided, along with an associated fabrication method. The method provides a (111) Si substrate and deposits a first layer of AlN overlying the substrate by heating the substrate to a relatively high temperature of 1000 to 1200° C. A second layer of AlN is deposited overlying the first layer of AlN at a lower temperature of 500 to 800° C. A third layer of AlN is deposited overlying the second layer of AlN by heating the substrate to the higher temperature range. Then, a grading Al1-XGaXN layer is formed overlying the third layer of AlN, where 0
摘要翻译：已经提供了使用多种铝化合物缓冲层的硅（Si）和氮化镓（GaN）膜之间的热膨胀界面，以及相关的制造方法。该方法提供（111）Si衬底，并通过将衬底加热至1000至1200℃的较高温度，将衬底上的第一层AlN沉积在衬底上。在第一层AlN上沉积第二层AlN，较低温度为500至800℃。通过将衬底加热到较高温度范围，沉积第三层AlN，覆盖第二层AlN。然后，形成覆盖在第一层次Al1-XGaXN层上的固定组成Al1-XGaXN层的覆盖在第三层AlN上的分级Al1-XGaXN层，其中0

8. 发明申请

US20080296625A1 Gallium nitride-on-silicon multilayered interface 审中-公开
标题翻译：氮化镓 - 硅多层界面
公开(公告)号：US20080296625A1
公开(公告)日：2008-12-04
申请号：US11810022
申请日：2007-06-04
申请人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
发明人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L29/06 , H01L21/20
CPC分类号： H01L21/02381 , H01L21/0245 , H01L21/02458 , H01L21/02461 , H01L21/02463 , H01L21/02488 , H01L21/02505 , H01L21/0251 , H01L21/0254 , H01L21/02642 , H01L21/02647
摘要： A multilayer thermal expansion interface between silicon (Si) and gallium nitride (GaN) films is provided, along with an associated fabrication method. The method provides a (111) Si substrate and forms a first layer of a first film overlying the substrate. The Si substrate is heated to a temperature in the range of about 300 to 800° C., and the first layer of a second film is formed in compression overlying the first layer of the first film. Using a lateral nanoheteroepitaxy overgrowth (LNEO) process, a first GaN layer is grown overlying the first layer of second film. Then, the above-mentioned processes are repeated: forming a second layer of first film; heating the substrate to a temperature in the range of about 300 to 800° C.; forming a second layer of second film in compression; and, growing a second GaN layer using the LNEO process.
摘要翻译：提供硅（Si）和氮化镓（GaN）膜之间的多层热膨胀界面以及相关的制造方法。该方法提供（111）Si衬底并且形成覆盖衬底的第一膜的第一层。将Si衬底加热至约300至800℃的温度，并且第二膜的第一层以压缩形式覆盖第一膜的第一层。使用横向纳米外延过度生长（LNEO）工艺，生长第一GaN层，覆盖第一层第二层膜。然后，重复上述过程：形成第二层第一膜; 将基板加热至约300至800℃的温度; 在压缩中形成第二层第二膜; 并且使用LNEO工艺生长第二GaN层。

9. 发明申请

US20080296616A1 Gallium nitride-on-silicon nanoscale patterned interface 审中-公开
标题翻译：氮化镓 - 硅纳米尺度图案化界面
公开(公告)号：US20080296616A1
公开(公告)日：2008-12-04
申请号：US11809958
申请日：2007-06-04
申请人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
发明人： Tingkai Li , Douglas J. Tweet , Jer-Shen Maa , Sheng Teng Hsu
IPC分类号： H01L21/20 , H01L29/20
CPC分类号： H01L21/02381 , H01L21/02433 , H01L21/02458 , H01L21/02461 , H01L21/02463 , H01L21/0251 , H01L21/02513 , H01L21/0254 , H01L21/02639 , H01L21/02642 , H01L21/02647
摘要： A method is provided for forming a matching thermal expansion interface between silicon (Si) and gallium nitride (GaN) films. The method provides a (111) Si substrate that is heated to a temperature in a range of about 300 to 800° C., and a first film is formed in compression overlying the Si substrate. The first film material may be InP, SiGe, GaP, GaAs, AlN, AlGaN, an AlN/graded AlGaN (Al1−xGaxN (0
摘要翻译：提供了一种在硅（Si）和氮化镓（GaN）膜之间形成匹配的热膨胀界面的方法。该方法提供加热至约300至800℃范围内的温度的（111）Si衬底，并且第一膜以压缩形式覆盖Si衬底。第一膜材料可以是InP，SiGe，GaP，GaAs，AlN，AlGaN，AlN /分级AlGaN（Al1-xGaxN（0

10. 发明申请

US20080315255A1 Thermal Expansion Transition Buffer Layer for Gallium Nitride on Silicon 审中-公开
标题翻译：硅上氮化镓的热膨胀转变缓冲层
公开(公告)号：US20080315255A1
公开(公告)日：2008-12-25
申请号：US12199144
申请日：2008-08-27
申请人： Jer-Shen Maa , Tingkai Li , Douglas J. Tweet , Gregory M. Stecker , Sheng Teng Hsu
发明人： Jer-Shen Maa , Tingkai Li , Douglas J. Tweet , Gregory M. Stecker , Sheng Teng Hsu
IPC分类号： H01L29/267
CPC分类号： H01L29/267 , H01L21/02381 , H01L21/02433 , H01L21/0245 , H01L21/02458 , H01L21/02502 , H01L21/0251 , H01L21/0254 , H01L21/02656 , H01L29/045 , H01L29/2003
摘要： A method is provided for forming a matching thermal expansion interface between silicon (Si) and gallium nitride (GaN) films. The method provides a (111) Si substrate with a first thermal expansion coefficient (TEC), and forms a silicon-germanium (SiGe) film overlying the Si substrate. A buffer layer is deposited overlying the SiGe film. The buffer layer may be aluminum nitride (AlN) or aluminum-gallium nitride (AlGaN). A GaN film is deposited overlying the buffer layer having a second TEC, greater than the first TEC. The SiGe film has a third TEC, with a value in between the first and second TECs. In one aspect, a graded SiGe film may be formed having a Ge content ratio in a range of about 0% to 50%, where the Ge content increases with the graded SiGe film thickness.
摘要翻译：提供了一种在硅（Si）和氮化镓（GaN）膜之间形成匹配的热膨胀界面的方法。该方法提供具有第一热膨胀系数（TEC）的（111）Si衬底，并且形成覆盖Si衬底的硅 - 锗（SiGe）膜。沉积SiGe膜上的缓冲层。缓冲层可以是氮化铝（AlN）或铝 - 氮化镓（AlGaN）。沉积GaN缓冲层，其具有大于第一TEC的第二TEC。 SiGe电影拥有第三个TEC，其值在第一和第二TEC之间。一方面，可以形成具有Ge含量比在约0％至50％的范围内的等级SiGe膜，其中Ge含量随着梯度SiGe膜厚度而增加。

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