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1. 发明授权

US08183880B2 Devices and methods for driving a signal off an integrated circuit 有权
标题翻译：将信号从集成电路驱动的装置和方法
公开(公告)号：US08183880B2
公开(公告)日：2012-05-22
申请号：US12773505
申请日：2010-05-04
申请人： Timothy Hollis , Brent Keeth
发明人： Timothy Hollis , Brent Keeth
IPC分类号： H03K17/16
CPC分类号： H03K19/018528 , H01L2224/16225 , H01L2924/15174 , H01L2924/15311
摘要： Embodiments of the present invention provide electronic devices, memory devices and methods of driving an on-chip signal off a chip. In one such embodiment, an on-chip signal and a second signal complementary to the on-chip signal are generated and provided to the two inputs of a differential driver. One output of the differential driver circuitry is coupled to an externally-accessible output terminal of the package. The other output may be terminated off the chip, but within the package. By routing the output signal and a second complementary output through the package, crosstalk potentially caused by the output signal can be reduced. Simultaneous switching output noise may also be reduced through use of a current-steering differential driver topology. Signal symmetry may also improve, reducing inter-symbol interference.
摘要翻译：本发明的实施例提供电子设备，存储器件以及驱动芯片上片上信号的方法。在一个这样的实施例中，生成与片上信号互补的片上信号和第二信号，并将其提供给差分驱动器的两个输入。差分驱动器电路的一个输出耦合到封装的外部可访问的输出端子。另一个输出可能会从芯片中脱离，但在封装内。通过将输出信号和通过封装的第二互补输出路由，可以减少由输出信号引起的串扰。通过使用电流转向差动驱动器拓扑，也可以减少同时开关输出噪声。信号对称性也可以提高，减少符号间干扰。

2. 发明申请

US20100213972A1 DEVICES AND METHODS FOR DRIVING A SIGNAL OFF AN INTEGRATED CIRCUIT 有权
标题翻译：用于驱动信号关闭集成电路的装置和方法
公开(公告)号：US20100213972A1
公开(公告)日：2010-08-26
申请号：US12773505
申请日：2010-05-04
申请人： Timothy Hollis , Brent Keeth
发明人： Timothy Hollis , Brent Keeth
IPC分类号： H03K19/003 , H03K19/0175
CPC分类号： H03K19/018528 , H01L2224/16225 , H01L2924/15174 , H01L2924/15311
摘要： Embodiments of the present invention provide electronic devices, memory devices and methods of driving an on-chip signal off a chip. In one such embodiment, an on-chip signal and a second signal complementary to the on-chip signal are generated and provided to the two inputs of a differential driver. One output of the differential driver circuitry is coupled to an externally-accessible output terminal of the package. The other output may be terminated off the chip, but within the package. By routing the output signal and a second complementary output through the package, crosstalk potentially caused by the output signal can be reduced. Simultaneous switching output noise may also be reduced through use of a current-steering differential driver topology. Signal symmetry may also improve, reducing inter-symbol interference.
摘要翻译：本发明的实施例提供电子设备，存储器件以及驱动芯片上片上信号的方法。在一个这样的实施例中，生成与片上信号互补的片上信号和第二信号，并将其提供给差分驱动器的两个输入。差分驱动器电路的一个输出耦合到封装的外部可访问的输出端子。另一个输出可能会从芯片中脱离，但在封装内。通过将输出信号和通过封装的第二互补输出路由，可以减少由输出信号引起的串扰。通过使用电流转向差动驱动器拓扑，也可以减少同时开关输出噪声。信号对称性也可以提高，减少符号间干扰。

3. 发明授权

US07733118B2 Devices and methods for driving a signal off an integrated circuit 有权
标题翻译：将信号从集成电路驱动的装置和方法
公开(公告)号：US07733118B2
公开(公告)日：2010-06-08
申请号：US12043848
申请日：2008-03-06
申请人： Timothy Hollis , Brent Keeth
发明人： Timothy Hollis , Brent Keeth
IPC分类号： H03K17/16
CPC分类号： H03K19/018528 , H01L2224/16225 , H01L2924/15174 , H01L2924/15311
摘要： Embodiments of the present invention provide electronic devices, memory devices and methods of driving an on-chip signal off a chip. In one such embodiment, an on-chip signal and a second signal complementary to the on-chip signal are generated and provided to the two inputs of a differential driver. One output of the differential driver circuitry is coupled to an externally-accessible output terminal of the package. The other output may be terminated off the chip, but within the package. By routing the output signal and a second complementary output through the package, crosstalk potentially caused by the output signal can be reduced. Simultaneous switching output noise may also be reduced through use of a current-steering differential driver topology. Signal symmetry may also improve, reducing inter-symbol interference.
摘要翻译：本发明的实施例提供电子设备，存储器件以及驱动芯片上片上信号的方法。在一个这样的实施例中，生成与片上信号互补的片上信号和第二信号，并将其提供给差分驱动器的两个输入。差分驱动器电路的一个输出耦合到封装的外部可访问的输出端子。另一个输出可能会从芯片中脱离，但在封装内。通过将输出信号和通过封装的第二互补输出路由，可以减少由输出信号引起的串扰。通过使用电流转向差动驱动器拓扑，也可以减少同时开关输出噪声。信号对称性也可以提高，减少符号间干扰。

4. 发明申请

US20090224802A1 DEVICES AND METHODS FOR DRIVING A SIGNAL OFF AN INTEGRATED CIRCUIT 有权
标题翻译：用于驱动信号关闭集成电路的装置和方法
公开(公告)号：US20090224802A1
公开(公告)日：2009-09-10
申请号：US12043848
申请日：2008-03-06
申请人： Timothy Hollis , Brent Keeth
发明人： Timothy Hollis , Brent Keeth
IPC分类号： H03K19/0175
CPC分类号： H03K19/018528 , H01L2224/16225 , H01L2924/15174 , H01L2924/15311
摘要： Embodiments of the present invention provide electronic devices, memory devices and methods of driving an on-chip signal off a chip. In one such embodiment, an on-chip signal and a second signal complementary to the on-chip signal are generated and provided to the two inputs of a differential driver. One output of the differential driver circuitry is coupled to an externally-accessible output terminal of the package. The other output may be terminated off the chip, but within the package. By routing the output signal and a second complementary output through the package, crosstalk potentially caused by the output signal can be reduced. Simultaneous switching output noise may also be reduced through use of a current-steering differential driver topology. Signal symmetry may also improve, reducing inter-symbol interference.
摘要翻译：本发明的实施例提供电子设备，存储器件以及驱动芯片上片上信号的方法。在一个这样的实施例中，生成与片上信号互补的片上信号和第二信号，并将其提供给差分驱动器的两个输入。差分驱动器电路的一个输出耦合到封装的外部可访问的输出端子。另一个输出可能会从芯片中脱离，但在封装内。通过将输出信号和通过封装的第二互补输出路由，可以减少由输出信号引起的串扰。通过使用电流转向差动驱动器拓扑，也可以减少同时开关输出噪声。信号对称性也可以提高，减少符号间干扰。

5. 发明申请

US20210240344A1 WAFER-SCALE MEMORY TECHNIQUES 有权
公开(公告)号：US20210240344A1
公开(公告)日：2021-08-05
申请号：US17162796
申请日：2021-01-29
申请人： Brent Keeth , Bambi L. DeLaRosa , Eiichi Nakano
发明人： Brent Keeth , Bambi L. DeLaRosa , Eiichi Nakano
IPC分类号： G06F3/06
摘要： Techniques for wafer-scale memory device and systems are provided. In an example, a wafer-scale memory device can include a large single substrate, multiple memory circuit areas including dynamic random-access memory (DRAM), the multiple memory circuit areas integrated with the substrate and configured to form an array on the substrate, and multiple streets separating the memory circuit areas. The streets can accommodate attaching the substrate to a wafer-scale processor. In certain examples, the large, single substrate can have a major surface area of more than 20,000 square millimeters (mm2).

6. 发明申请

US20210200464A1 MEMORY DEVICE INTERFACE AND METHOD 有权
公开(公告)号：US20210200464A1
公开(公告)日：2021-07-01
申请号：US17136728
申请日：2020-12-29
申请人： Brent Keeth
发明人： Brent Keeth
IPC分类号： G06F3/06
摘要： Apparatus and methods are disclosed, including memory devices and systems. In an example, a memory module can include a first stack of at least eight memory die including four pairs of memory die, each pair of the four pairs of memory die associated with an individual memory rank of four memory ranks of the memory module, a memory controller configured to receive memory access commands and to access memory locations of the first stack, and a substrate configured to route connections between external terminations of the memory module and the memory controller.

7. 发明授权

US09214449B2 Reconfigurable connections for stacked semiconductor devices 有权
标题翻译：层叠半导体器件的可重构连接
公开(公告)号：US09214449B2
公开(公告)日：2015-12-15
申请号：US13367026
申请日：2012-02-06
申请人： Brent Keeth
发明人： Brent Keeth
IPC分类号： G01R31/26 , H01L25/065 , G11C5/02 , G11C5/06 , G11C29/02 , G11C29/00 , G11C5/04 , G11C29/32
CPC分类号： H01L25/0657 , G11C5/02 , G11C5/04 , G11C5/06 , G11C29/02 , G11C29/022 , G11C29/70 , G11C2029/3202 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06596 , H01L2924/0002 , H01L2924/1531 , H01L2924/00
摘要： Some embodiments include apparatus, systems, and methods comprising semiconductor dice arranged in a stack, a number of connections configured to provide communication among the dice, at least a portion of the connections going through at least one of the dice, and a module configured to check for defects in the connections and to repair defects the connections.
摘要翻译：一些实施例包括包括布置在堆叠中的半导体裸片的装置，系统和方法，被配置为提供骰子之间的通信的多个连接，穿过至少一个骰子的连接的至少一部分，以及被配置为检查连接中的缺陷并修复连接的缺陷。

8. 发明授权

US08712249B2 Optical interconnect in high-speed memory systems 有权
标题翻译：高速存储器系统中的光互连
公开(公告)号：US08712249B2
公开(公告)日：2014-04-29
申请号：US13080376
申请日：2011-04-05
申请人： Russel J. Baker , Brent Keeth
发明人： Russel J. Baker , Brent Keeth
IPC分类号： H04B10/00
CPC分类号： G11C11/4093 , G06F13/16 , G06F13/1668 , G06F13/287 , G06F13/4234 , G11C11/42 , H04B10/802 , H04L12/40013 , H04Q11/0071 , Y02D10/14 , Y02D10/151
摘要： A optical link for achieving electrical isolation between a controller and a memory device is disclosed. The optical link increases the noise immunity of electrical interconnections, and allows the memory device to be placed a greater distance from the processor than is conventional without power-consuming I/O buffers.
摘要翻译：公开了一种用于实现控制器和存储器件之间的电气隔离的光学链路。光链路增加了电互连的抗噪声能力，并且允许存储器件被放置在距离处理器更远的位置，而不需要耗电的I / O缓冲器。

9. 发明申请

US20120246434A1 SYSTEM AND METHOD FOR DECODING COMMANDS BASED ON COMMAND SIGNALS AND OPERATING STATE 有权
标题翻译：基于命令信号和操作状态解码命令的系统和方法
公开(公告)号：US20120246434A1
公开(公告)日：2012-09-27
申请号：US13489246
申请日：2012-06-05
申请人： Jeffrey W. Janzen , Brent Keeth , Jeffrey P. Wright , James S. Cullum
发明人： Jeffrey W. Janzen , Brent Keeth , Jeffrey P. Wright , James S. Cullum
IPC分类号： G06F12/00
CPC分类号： G11C11/4096 , G11C7/1072 , G11C11/40611 , G11C11/4076 , G11C11/4087 , G11C11/4091
摘要： A system and method for decoding command signals that includes a command decoder configured to generate internal control signals to perform an operation based on the command signals and an operating state. The same combination of command signals can request different commands depending on the operating state. A command is selected from a first set of operations according to the command signals when the memory system is in a first operating state and a command is selected from a second set of operations according to the command signals when the memory system is in a second operating state.
摘要翻译：一种用于对命令信号进行解码的系统和方法，该系统和方法包括一个命令解码器，该命令解码器经配置以产生内部控制信号，以根据命令信号和操作状态执行操作。命令信号的相同组合可以根据操作状态请求不同的命令。当存储器系统处于第一操作状态时，根据命令信号从第一组操作中选择命令，并且当存储器系统处于第二操作时根据命令信号从第二组操作中选择命令州。

10. 发明申请

US20120133387A1 RECONFIGURABLE CONNECTIONS FOR STACKED SEMICONDUCTOR DEVICES 有权
标题翻译：堆叠式半导体器件的可重构连接
公开(公告)号：US20120133387A1
公开(公告)日：2012-05-31
申请号：US13367026
申请日：2012-02-06
申请人： Brent Keeth
发明人： Brent Keeth
IPC分类号： G01R31/26
CPC分类号： H01L25/0657 , G11C5/02 , G11C5/04 , G11C5/06 , G11C29/02 , G11C29/022 , G11C29/70 , G11C2029/3202 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06596 , H01L2924/0002 , H01L2924/1531 , H01L2924/00
摘要： Some embodiments include apparatus, systems, and methods comprising semiconductor dice arranged in a stack, a number of connections configured to provide communication among the dice, at least a portion of the connections going through at least one of the dice, and a module configured to check for defects in the connections and to repair defects the connections.
摘要翻译：一些实施例包括包括布置在堆叠中的半导体裸片的装置，系统和方法，被配置为提供骰子之间的通信的多个连接，穿过至少一个骰子的连接的至少一部分，以及被配置为检查连接中的缺陷并修复连接中的缺陷。

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