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1. 发明申请

US20120056762A1 Data Bus Inversion Apparatus, Systems, and Methods 有权
标题翻译：数据总线反转装置，系统和方法
公开(公告)号：US20120056762A1
公开(公告)日：2012-03-08
申请号：US13292276
申请日：2011-11-09
申请人： Timothy Hollis
发明人： Timothy Hollis
IPC分类号： H03M5/00
CPC分类号： H03M5/00 , G06F13/4234 , G11C7/02 , G11C7/1006 , Y02D10/14 , Y02D10/151
摘要： Apparatus, systems, and methods are disclosed such as those that operate to encode data bits transmitted on a plurality of channels according to at least one of multiple Data Bus Inversion (DBI) algorithms. Additional apparatus, systems, and methods are disclosed.
摘要翻译：公开了装置，系统和方法，例如根据多个数据总线反转（DBI）算法中的至少一个，对在多个信道上发送的数据位进行编码的装置，系统和方法。公开了附加装置，系统和方法。

2. 发明授权

US08103898B2 Explicit skew interface for mitigating crosstalk and simultaneous switching noise 有权
标题翻译：用于减轻串扰和同时开关噪声的显式偏移接口
公开(公告)号：US08103898B2
公开(公告)日：2012-01-24
申请号：US11969801
申请日：2008-01-04
申请人： Dragos Dimitriu , Timothy Hollis
发明人： Dragos Dimitriu , Timothy Hollis
IPC分类号： G06F1/00 , H04J1/12 , H04J3/10
CPC分类号： H04L7/04 , G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock signals delayed from the clock signal such that one or more of the clock signals have a delay different from the delays of the other clock signals. The receiver circuit further includes a plurality of data input latches configured to receive a plurality of data elements over two or more different points in time. This configuration at least partially reduces crosstalk and simultaneous switching output noise.
摘要翻译：公开了诸如涉及被配置为接收和处理电子数据的芯片间接口的方法和装置。一个这样的接口包括接收机电路，其包括配置成在时钟树输入处接收时钟信号的时钟树。时钟树分配从时钟信号延迟的多个时钟信号，使得一个或多个时钟信号具有与其它时钟信号的延迟不同的延迟。接收机电路还包括多个数据输入锁存器，其被配置为在两个或多个不同的时间点上接收多个数据元素。该配置至少部分地减少串扰和同时切换输出噪声。

3. 发明授权

US08018232B2 Interleaved gradient coil for magnetic resonance imaging 有权
标题翻译：用于磁共振成像的交错梯度线圈
公开(公告)号：US08018232B2
公开(公告)日：2011-09-13
申请号：US12415956
申请日：2009-03-31
申请人： Timothy Hollis
发明人： Timothy Hollis
IPC分类号： G01V1/00
CPC分类号： G01R33/385 , G01R33/3856
摘要： Gradient coils for generating gradient magnetic fields in a magnetic resonance imaging system are provided. In one embodiment, a gradient coil for a magnetic resonance imaging system may include a plurality of turns formed generally in a figure-eight. The figure-eight may form a first section configured to overly a section of a first adjacent coil, a second section configured to underly another section of the first adjacent coil, a third section configured to overly a section of a second adjacent coil, and a fourth section configured to underly another section of the second adjacent coil.
摘要翻译：提供了用于在磁共振成像系统中产生梯度磁场的梯度线圈。在一个实施例中，用于磁共振成像系统的梯度线圈可以包括通常在图八中形成的多个匝。图八可以形成第一部分，其被配置为过度地覆盖第一相邻线圈的一部分，第二部分被配置为在第一相邻线圈的另一部分的下方，配置成过度地覆盖第二相邻线圈的部分的第三部分，以及第四部分配置成位于第二相邻线圈的另一部分的下方。

4. 发明授权

US07961039B2 Forwarded clock filtering 有权
标题翻译：转发时钟滤波
公开(公告)号：US07961039B2
公开(公告)日：2011-06-14
申请号：US12536224
申请日：2009-08-05
申请人： Bryan K. Casper , Timothy Hollis , James E. Jaussi , Stephen R. Mooney , Frank O'Mahony , Mozhgan Mansuri
发明人： Bryan K. Casper , Timothy Hollis , James E. Jaussi , Stephen R. Mooney , Frank O'Mahony , Mozhgan Mansuri
IPC分类号： H03B1/00
CPC分类号： H03K5/1565 , H03H11/1291 , H03K5/01 , H03K5/1252 , H04L7/027
摘要： Some embodiments include a tunable bandpass filter to provide a filtered output signal; a circuit portion to provide an output signal in response to the filtered output signal; a comparator circuit to provide a comparison signal in response to the output signal from the circuit portion; and a feedback circuit to tune the tunable bandpass filter in response to the comparison signal provided by the comparator circuit. Other embodiments are described and claimed.
摘要翻译：一些实施例包括可调谐带通滤波器以提供经滤波的输出信号; 电路部分，用于响应于滤波的输出信号提供输出信号; 比较器电路，用于响应于来自电路部分的输出信号提供比较信号; 以及响应于由比较器电路提供的比较信号来调谐可调谐带通滤波器的反馈电路。描述和要求保护其他实施例。

5. 发明申请

US20090289700A1 FORWARDED CLOCK FILTERING 有权
标题翻译：前进时钟过滤
公开(公告)号：US20090289700A1
公开(公告)日：2009-11-26
申请号：US12536224
申请日：2009-08-05
申请人： Bryan K. Casper , Timothy Hollis , James E. Jaussi , Stephen R. Mooney , Frank O'Mahony , Mozhgan Mansuri
发明人： Bryan K. Casper , Timothy Hollis , James E. Jaussi , Stephen R. Mooney , Frank O'Mahony , Mozhgan Mansuri
IPC分类号： H03B1/00
CPC分类号： H03K5/1565 , H03H11/1291 , H03K5/01 , H03K5/1252 , H04L7/027
摘要： Some embodiments include a tunable bandpass filter to provide a filtered output signal; a circuit portion to provide an output signal in response to the filtered output signal; a comparator circuit to provide a comparison signal in response to the output signal from the circuit portion; and a feedback circuit to tune the tunable bandpass filter in response to the comparison signal provided by the comparator circuit. Other embodiments are described and claimed.
摘要翻译：一些实施例包括可调谐带通滤波器以提供经滤波的输出信号; 电路部分，用于响应于滤波的输出信号提供输出信号; 比较器电路，用于响应于来自电路部分的输出信号提供比较信号; 以及响应于由比较器电路提供的比较信号来调谐可调谐带通滤波器的反馈电路。描述和要求保护其他实施例。

6. 发明授权

US07573326B2 Forwarded clock filtering 有权
标题翻译：转发时钟滤波
公开(公告)号：US07573326B2
公开(公告)日：2009-08-11
申请号：US11323310
申请日：2005-12-30
申请人： Bryan K. Casper , Timothy Hollis , James E. Jaussi , Stephen R. Mooney , Frank O'Mahony , Mozhgan Mansuri
发明人： Bryan K. Casper , Timothy Hollis , James E. Jaussi , Stephen R. Mooney , Frank O'Mahony , Mozhgan Mansuri
IPC分类号： H03B1/00
CPC分类号： H03K5/1565 , H03H11/1291 , H03K5/01 , H03K5/1252 , H04L7/027
摘要： A tunable bandpass filter to provide a filtered differential clock signal in response to an input differential clock signal, where an embodiment comprises a transistor pair loaded by tunable loads, and a feedback circuit to tune the tunable loads. In some embodiments, the feedback circuit tunes the loads to maximize a small-signal differential gain. In other embodiments, the feedback circuit tunes the loads to minimize a metric indicative of jitter in the filtered differential clock signal. Other embodiments are described and claimed.
摘要翻译：一种可调谐带通滤波器，用于响应于输入差分时钟信号提供经滤波的差分时钟信号，其中实施例包括由可调谐负载加载的晶体管对，以及用于调谐可调负载的反馈电路。在一些实施例中，反馈电路调谐负载以最大化小信号差分增益。在其他实施例中，反馈电路调整负载以最小化指示经滤波的差分时钟信号中的抖动的度量。描述和要求保护其他实施例。

7. 发明申请

US20070152746A1 Forwarded clock filtering 有权
标题翻译：转发时钟滤波
公开(公告)号：US20070152746A1
公开(公告)日：2007-07-05
申请号：US11323310
申请日：2005-12-30
申请人： Bryan Casper , Timothy Hollis , James Jaussi , Stephen Mooney , Frank O'Mahony , Mozhgan Mansuri
发明人： Bryan Casper , Timothy Hollis , James Jaussi , Stephen Mooney , Frank O'Mahony , Mozhgan Mansuri
IPC分类号： H03K5/00
CPC分类号： H03K5/1565 , H03H11/1291 , H03K5/01 , H03K5/1252 , H04L7/027
摘要： A tunable bandpass filter to provide a filtered differential clock signal in response to an input differential clock signal, where an embodiment comprises a transistor pair loaded by tunable loads, and a feedback circuit to tune the tunable loads. In some embodiments, the feedback circuit tunes the loads to maximize a small-signal differential gain. In other embodiments, the feedback circuit tunes the loads to minimize a metric indicative of jitter in the filtered differential clock signal. Other embodiments are described and claimed.
摘要翻译：一种可调谐带通滤波器，用于响应于输入差分时钟信号提供经滤波的差分时钟信号，其中实施例包括由可调谐负载加载的晶体管对，以及用于调谐可调负载的反馈电路。在一些实施例中，反馈电路调谐负载以最大化小信号差分增益。在其他实施例中，反馈电路调整负载以最小化指示经滤波的差分时钟信号中的抖动的度量。描述和要求保护其他实施例。

8. 发明申请

US20060197531A1 Systems, methods and apparatus for inducing electromagnetic mutual inductance in magnetic coils to reduce inhomogeneity in a magnetic field of the magnetic coils 有权
标题翻译：用于在磁线圈中感应电磁互感的系统，方法和装置，以减小磁性线圈磁场的不均匀性
公开(公告)号：US20060197531A1
公开(公告)日：2006-09-07
申请号：US11070012
申请日：2005-03-02
申请人： Timothy Hollis
发明人： Timothy Hollis
IPC分类号： G01V3/00
CPC分类号： G01R33/387
摘要： Systems, methods and apparatus are provided through which inhomogeneity in a magnetic field is reduced by invoking electromagnetic mutual inductance between a main coil and another coil.
摘要翻译：提供了通过在主线圈和另一线圈之间调用电磁互感来减小磁场中的不均匀性的系统，方法和装置。

9. 发明授权

US08341452B2 Explicit skew interface for reducing crosstalk and simultaneous switching noise 有权
标题翻译：显式偏移接口，用于减少串扰和同时开关噪声
公开(公告)号：US08341452B2
公开(公告)日：2012-12-25
申请号：US13353603
申请日：2012-01-19
申请人： Dragos Dimitriu , Timothy Hollis
发明人： Dragos Dimitriu , Timothy Hollis
IPC分类号： G06F1/00 , H04J1/12 , H04J3/10
CPC分类号： H04L7/04 , G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock signals delayed from the clock signal such that one or more of the clock signals have a delay different from the delays of the other clock signals. The receiver circuit further includes a plurality of data input latches configured to receive a plurality of data elements over two or more different points in time. This configuration at least partially reduces crosstalk and simultaneous switching output noise.
摘要翻译：公开了诸如涉及被配置为接收和处理电子数据的芯片间接口的方法和装置。一个这样的接口包括接收机电路，其包括配置成在时钟树输入处接收时钟信号的时钟树。时钟树分配从时钟信号延迟的多个时钟信号，使得一个或多个时钟信号具有与其它时钟信号的延迟不同的延迟。接收机电路还包括多个数据输入锁存器，其被配置为在两个或多个不同的时间点上接收多个数据元素。该配置至少部分地减少串扰和同时切换输出噪声。

10. 发明申请

US20120114087A1 EXPLICIT SKEW INTERFACE FOR REDUCING CROSSTALK AND SIMULTANEOUS SWITCHING NOISE 有权
标题翻译：用于减少摇滚音箱和同时开关噪音的显示切口界面
公开(公告)号：US20120114087A1
公开(公告)日：2012-05-10
申请号：US13353603
申请日：2012-01-19
申请人： Dragos Dimitriu , Timothy Hollis
发明人： Dragos Dimitriu , Timothy Hollis
IPC分类号： H04L7/04
CPC分类号： H04L7/04 , G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： Methods and apparatus are disclosed, such as those involving an inter-chip interface configured to receive and process electronic data. One such interface includes a receiver circuit that includes a clock tree configured to receive a clock signal at a clock tree input. The clock tree distributes a plurality of clock signals delayed from the clock signal such that one or more of the clock signals have a delay different from the delays of the other clock signals. The receiver circuit further includes a plurality of data input latches configured to receive a plurality of data elements over two or more different points in time. This configuration at least partially reduces crosstalk and simultaneous switching output noise.
摘要翻译：公开了诸如涉及被配置为接收和处理电子数据的芯片间接口的方法和装置。一个这样的接口包括接收机电路，其包括配置成在时钟树输入处接收时钟信号的时钟树。时钟树分配从时钟信号延迟的多个时钟信号，使得一个或多个时钟信号具有与其它时钟信号的延迟不同的延迟。接收机电路还包括多个数据输入锁存器，其被配置为在两个或多个不同的时间点上接收多个数据元素。该配置至少部分地减少串扰和同时切换输出噪声。

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