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1. 发明申请

US20220360239A1 TRIMMING OPERATIONAL AMPLIFIERS 有权
公开(公告)号：US20220360239A1
公开(公告)日：2022-11-10
申请号：US17307327
申请日：2021-05-04
申请人： Texas Instruments Incorporated
发明人： Vadim Valerievich Ivanov , Munaf Hussain Shaik , Srinivas Kumar Pulijala , Patrick Forster , Jerry Lee Doorenbos
IPC分类号： H03F3/45 , H03M1/38 , H03M1/66
摘要： Disclosed is a system comprising a plurality of operational amplifiers, each operational amplifier having individually adjustable operational parameters, and a trimming circuit. The trimming circuit includes successive approximation register (SAR) logic that determines associated memory values. The trimming circuit changes the adjustable operational parameters of each operation amplifier based on the associated memory values.

2. 发明授权

US11347249B2 Current limit through reference modulation in linear regulators 有权
公开(公告)号：US11347249B2
公开(公告)日：2022-05-31
申请号：US16934334
申请日：2020-07-21
申请人： Texas Instruments Incorporated
发明人： Avinash Shreepathi Bhat , Vadim Valerievich Ivanov
IPC分类号： G05F1/569 , G05F1/575
摘要： A linear regulator system is described. The linear regulator system includes a linear regulator core circuit including a pass element adapted to provide an output voltage, and a voltage error amplifier circuit coupled to the pass element and adapted to regulate the output voltage to form a regulated output voltage, based on an output reference voltage. The linear regulator core circuit further includes a current limit circuit comprising a current limit switch element coupled to the voltage error amplifier circuit and adapted to selectively modulate the output reference voltage of the voltage error amplifier circuit to form a current limited reference voltage, based on a current limit control signal received at a current limit control terminal associated therewith, in order to limit a load current through the pass element from exceeding a predefined maximum allowable load current limit.

3. 发明授权

US11321543B2 Logarithmic amplifier 有权
公开(公告)号：US11321543B2
公开(公告)日：2022-05-03
申请号：US17179847
申请日：2021-02-19
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Vadim Valerievich Ivanov
IPC分类号： G06G7/24 , H03G7/06 , H03G7/00
摘要： A logarithmic amplifier includes a logarithmic current preamplifier circuit and logarithmic amplifier circuit. The logarithmic current preamplifier circuit includes an inverting input terminal, an output terminal, and a first diode. The first diode is coupled between the inverting input terminal of the logarithmic current preamplifier circuit and the output terminal of the logarithmic current preamplifier circuit. The logarithmic amplifier circuit includes an inverting input terminal, an output terminal, and a second diode. The inverting input terminal of the logarithmic amplifier circuit is coupled to the output terminal of the logarithmic current preamplifier circuit. The second diode is coupled between the inverting input terminal of the logarithmic amplifier circuit and the output terminal of the logarithmic amplifier circuit.

4. 发明授权

US10956687B1 Logarithmic amplifier 有权
公开(公告)号：US10956687B1
公开(公告)日：2021-03-23
申请号：US16711694
申请日：2019-12-12
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Vadim Valerievich Ivanov
IPC分类号： G06G7/24 , H03G7/06 , H03G7/00
摘要： A logarithmic amplifier includes a logarithmic current preamplifier circuit and logarithmic amplifier circuit. The logarithmic current preamplifier circuit includes an inverting input terminal, an output terminal, and a first diode. The first diode is coupled between the inverting input terminal of the logarithmic current preamplifier circuit and the output terminal of the logarithmic current preamplifier circuit. The logarithmic amplifier circuit includes an inverting input terminal, an output terminal, and a second diode. The inverting input terminal of the logarithmic amplifier circuit is coupled to the output terminal of the logarithmic current preamplifier circuit. The second diode is coupled between the inverting input terminal of the logarithmic amplifier circuit and the output terminal of the logarithmic amplifier circuit.

5. 发明授权

US11009900B2 Method and circuitry for compensating low dropout regulators 有权
公开(公告)号：US11009900B2
公开(公告)日：2021-05-18
申请号：US15400976
申请日：2017-01-07
申请人： Texas Instruments Incorporated
发明人： Vadim Valerievich Ivanov , Sahana Sriraj
IPC分类号： G05F1/575
摘要： Low dropout regulators (LDOs) are disclosed herein. An example of an LDO includes an error amplifier having a first input and a second input, wherein the first input is for coupling to an output of the LDO and the second input for coupling to a reference voltage. The error amplifier has an output with a voltage that is proportional to the difference between the output voltage and the reference voltage. A second amplifier is coupled between the error amplifier and the output of the LDO. A gain boost amplifier is coupled between the error amplifier and the second amplifier. The gain boost amplifier increases DC gain of the LDO in response to a load step on the output.

6. 发明授权

US10931247B2 Chopper amplifier 有权
公开(公告)号：US10931247B2
公开(公告)日：2021-02-23
申请号：US16357572
申请日：2019-03-19
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Vadim Valerievich Ivanov , Bharath Karthik Vasan , Piyush Kaslikar , Srinivas K. Pulijala
IPC分类号： H03F1/02 , H03F3/387 , H03F3/19
摘要： A chopper amplifier circuit includes a first amplifier path, a second amplifier path, and a third amplifier path. The first amplifier path includes chopper circuitry configured to modulate an input signal and an offset voltage at a chopping frequency, and ripple reduction circuitry configured to attenuate the chopping frequency in a signal in the first amplifier path. The second amplifier path includes a feedforward gain stage, and is configured to apply higher gain to intermediate signal frequencies than is applied in the first amplifier path. The third amplifier path includes a feedforward gain stage, and is configured to apply higher gain to high signal frequencies than is applied in the first amplifier path and the second amplifier path. The intermediate signal frequencies are lower than the high signal frequencies.

7. 发明授权

US10461707B2 Amplifier class AB output stage 有权
公开(公告)号：US10461707B2
公开(公告)日：2019-10-29
申请号：US15912642
申请日：2018-03-06
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Vadim Valerievich Ivanov
IPC分类号： H03F3/45 , H03F1/02 , H03F1/22
摘要： An amplifier includes an input stage, a folded cascode stage, and a class AB output stage. The folded cascode stage is coupled to the input stage. The class AB output stage is coupled to the folded cascode stage. The class AB output stage includes a high-side output transistor, a low-side output transistor, and a high-side feedback circuit that is coupled to the high-side output transistor. The high-side feedback circuit includes a high-side sense transistor and a high-side feedback transistor. The high-side sense transistor includes a control terminal that is coupled to a control terminal of the high-side output transistor. The high-side feedback transistor is coupled to an output of the high-side sense transistor and to the folded cascode stage. A first output of the folded cascode stage is coupled to the control terminal of the high-side sense transistor and to the control terminal of the high-side output transistor.

8. 发明授权

US09054657B2 Reducing a settling time after a slew condition in an amplifier 有权
标题翻译：在放大器中摆动条件后降低稳定时间
公开(公告)号：US09054657B2
公开(公告)日：2015-06-09
申请号：US14040856
申请日：2013-09-30
申请人： Texas Instruments Incorporated
发明人： Vaibhav Kumar , Vadim Valerievich Ivanov
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45 , H03F3/45183 , H03F3/45475 , H03F2203/45248 , H03F2203/45344 , H03F2203/45511 , H03F2203/45512
摘要： In an amplifier, a first stage receives a differential input voltage, which is formed by first and second input voltages, and outputs a first differential current in response thereto on first and second lines having respective first and second line voltages. A second stage receives the first and second line voltages and outputs a second differential current in response thereto on third and fourth lines having respective third and fourth line voltages. A third stage receives the third and fourth line voltages and outputs an output voltage in response thereto. A slew boost circuit detects a slew condition, in which a threshold difference arises between the first and second input voltages, and outputs a slew current in response thereto for maintaining a slew rate of the output voltage during the slew condition. The first stage includes circuits for reducing a variable difference between the first and second line voltages.
摘要翻译：在放大器中，第一级接收由第一和第二输入电压形成的差分输入电压，并且在具有相应的第一和第二线电压的第一和第二线上响应于此输出第一差分电流。第二级接收第一和第二线电压，并在具有相应的第三和第四线电压的第三和第四线上响应于此输出第二差分电流。第三级接收第三和第四线电压并输出响应于此的输出电压。回转升压电路检测在第一和第二输入电压之间出现阈值差的转换条件，并且响应于此产生一个回转电流，以保持在转换条件期间输出电压的转换速率。第一级包括用于减小第一和第二线电压之间的可变差的电路。

9. 发明申请

US20150028949A1 HIGH VOLTAGE INPUT CIRCUIT FOR A DIFFERENTIAL AMPLIFIER 有权
标题翻译：用于差分放大器的高电压输入电路
公开(公告)号：US20150028949A1
公开(公告)日：2015-01-29
申请号：US13950643
申请日：2013-07-25
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Steven Graham Brantley , Vadim Valerievich Ivanov
IPC分类号： H03F3/45 , H03F1/02
CPC分类号： H03F3/45376 , H03F2203/45568 , H03F2203/45571
摘要： A differential input circuit (FIG. 3A) is disclosed. The circuit includes a first input terminal (drain of 310) and a second input terminal (drain of 312). A first input transistor (310) has a first control terminal and has a current path coupled to the first input terminal. A second input transistor (312) has a second control terminal and has a current path coupled to the second input terminal. A third transistor (306) has a third control terminal and has a current path between a first differential input terminal (Vin+) and the first control terminal. A fourth transistor (308) has a fourth control terminal and has a current path between a second differential input terminal (Vin−) and the second control terminal.
摘要翻译：公开了一种差分输入电路（图3A）。电路包括第一输入端（310的漏极）和第二输入端（312的漏极）。第一输入晶体管（310）具有第一控制端并具有耦合到第一输入端的电流通路。第二输入晶体管（312）具有第二控制端子并且具有耦合到第二输入端子的电流通路。第三晶体管（306）具有第三控制端子，并且在第一差分输入端（Vin +）和第一控制端之间具有电流路径。第四晶体管（308）具有第四控制端子，并且在第二差分输入端子（Vin-）和第二控制端子之间具有电流路径。

10. 发明授权

US08836377B1 Sampled reference supply voltage supervisor 有权
标题翻译：采样参考电源电压监控器
公开(公告)号：US08836377B1
公开(公告)日：2014-09-16
申请号：US13869634
申请日：2013-04-24
申请人： Texas Instruments Incorporated
发明人： Vadim Valerievich Ivanov , Ravi Balasingam , Ritu Shree
IPC分类号： H03K5/153
CPC分类号： H03K3/01 , G01R19/16542 , G01R19/16576 , G06F1/1626 , G06F1/28 , H02H3/207
摘要： A power supervisor circuit is provided. The circuit includes a first sample circuit that periodically samples a first reference voltage derived from a high output rail of a voltage source and generates a first sampled output voltage. The circuit includes second sample circuit that periodically samples a second reference voltage associated with a low output rail of the voltage source and generates a second sampled output voltage. A voltage supervisor in the circuit generates a trip point signal when a combination of the first and second sampled output voltage crosses a predetermined threshold indicating that the voltage source output voltage has fallen below a desired output voltage.
摘要翻译：提供电源管理电路。电路包括第一采样电路，其周期性地对从电压源的高输出轨导出的第一参考电压进行采样，并产生第一采样输出电压。电路包括第二采样电路，周期性地对与电压源的低输出轨相关联的第二参考电压进行采样，并产生第二采样输出电压。当第一和第二采样输出电压的组合跨过预定阈值，指示电压源输出电压已经低于期望输出电压时，电路中的电压监控器产生跳变点信号。

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