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1. 发明申请

US20050003636A1 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20050003636A1
公开(公告)日：2005-01-06
申请号：US10815934
申请日：2004-04-02
申请人： Shinya Takyu , Tetsuya Kurosawa , Kinya Mochida , Kenichi Watanabe
发明人： Shinya Takyu , Tetsuya Kurosawa , Kinya Mochida , Kenichi Watanabe
IPC分类号： H01L21/301 , H01L21/304 , H01L21/58 , H01L21/68 , H01L21/78 , H01L21/44 , H01L21/46 , H01L21/48 , H01L21/50
CPC分类号： H01L21/6835 , H01L21/304 , H01L21/3043 , H01L21/6836 , H01L21/78 , H01L24/27 , H01L24/29 , H01L24/83 , H01L2221/68327 , H01L2221/6834 , H01L2221/68363 , H01L2221/68381 , H01L2221/6839 , H01L2224/274 , H01L2224/2919 , H01L2224/83191 , H01L2224/8385 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/0665 , H01L2924/07802 , H01L2924/09701 , H01L2924/12042 , H01L2924/00 , H01L2924/3512
摘要： A manufacturing method of a semiconductor device includes: providing a groove having a thickness equal to or larger than a finishing thickness on a first surface of a semiconductor wafer on which a semiconductor element is formed; affixing a PSA tape onto the first surface of the semiconductor wafer in which the groove is formed; reducing the thickness of the semiconductor wafer by processing a second surface opposite to the first surface of the semiconductor wafer onto which the PSA tape is affixed, so as to separate the semiconductor wafer into a plurality of semiconductor chips on which the semiconductor element is formed; affixing an adhesive layer onto an entire rear surface of the separated semiconductor wafer; cutting the adhesive layer so as to separate the adhesive layer for each of the semiconductor chips; and peeling off the PSA tape from the semiconductor wafer while fixing the semiconductor wafer under suction by use of a porous member segmented into at least two sucking areas.
摘要翻译：半导体器件的制造方法包括：在其上形成有半导体元件的半导体晶片的第一表面上设置具有等于或大于精加工厚度的厚度的凹槽; 将PSA胶带固定到形成有所述凹槽的所述半导体晶片的所述第一表面上; 通过处理与固定有PSA带的半导体晶片的第一表面相对的第二表面来减小半导体晶片的厚度，以将半导体晶片分离成形成半导体元件的多个半导体芯片; 将粘合剂层附着在所分离的半导体晶片的整个后表面上; 切割粘合剂层以分离每个半导体芯片的粘合剂层; 以及通过使用分段在至少两个吸引区域中的多孔构件将半导体晶片固定在吸力下，同时从半导体晶片剥离PSA带。

2. 发明授权

US07223319B2 Semiconductor manufacturing apparatus and method of manufacturing semiconductor device 有权
标题翻译：半导体制造装置及半导体装置的制造方法
公开(公告)号：US07223319B2
公开(公告)日：2007-05-29
申请号：US10808298
申请日：2004-03-25
申请人： Tetsuya Kurosawa , Shinya Takyu , Kinya Mochida , Kenichi Watanabe
发明人： Tetsuya Kurosawa , Shinya Takyu , Kinya Mochida , Kenichi Watanabe
IPC分类号： B32B38/10
CPC分类号： H01L21/6838 , H01L21/67132 , H01L21/6835 , H01L21/6836 , H01L2221/68327 , H01L2221/6839 , Y10S156/941 , Y10S438/976 , Y10T156/1052 , Y10T156/1179 , Y10T156/12 , Y10T156/19
摘要： A semiconductor manufacturing apparatus includes: a peeling mechanism to peel a pressure sensitive adhesive (PSA) tape from a semiconductor wafer constituted by a plurality of semiconductor chips which are separated therefrom, the semiconductor wafer having an element formation surface to form an element thereon and a rear surface opposite to the element formation surface, the PSA tape adhering to the element formation surface of the semiconductor wafer, each of the semiconductor chips having an adhesive layer formed on the rear surface; wherein the peeling mechanism has a sucking section which have a porous member to hold the semiconductor wafer by suction, the porous member being segmented into at least two sucking areas in the direction in which the PSA tape is peeled.
摘要翻译：半导体制造装置包括：剥离机构，用于从由分离的多个半导体芯片构成的半导体晶片剥离压敏粘合剂（PSA）带，该半导体晶片具有元件形成表面以在其上形成元件，与所述元件形成表面相对的后表面，所述PSA带粘附到所述半导体晶片的元件形成表面，每个所述半导体芯片具有形成在所述后表面上的粘合层; 其特征在于，所述剥离机构具有吸引部，所述吸引部具有通过抽吸保持所述半导体晶片的多孔部件，所述多孔部件沿所述PSA带剥离的方向分割为至少两个吸引区域。

3. 发明授权

US07060532B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07060532B2
公开(公告)日：2006-06-13
申请号：US10815934
申请日：2004-04-02
申请人： Shinya Takyu , Tetsuya Kurosawa , Kinya Mochida , Kenichi Watanabe
发明人： Shinya Takyu , Tetsuya Kurosawa , Kinya Mochida , Kenichi Watanabe
IPC分类号： H01L21/44
CPC分类号： H01L21/6835 , H01L21/304 , H01L21/3043 , H01L21/6836 , H01L21/78 , H01L24/27 , H01L24/29 , H01L24/83 , H01L2221/68327 , H01L2221/6834 , H01L2221/68363 , H01L2221/68381 , H01L2221/6839 , H01L2224/274 , H01L2224/2919 , H01L2224/83191 , H01L2224/8385 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/0665 , H01L2924/07802 , H01L2924/09701 , H01L2924/12042 , H01L2924/00 , H01L2924/3512
摘要： A manufacturing method of a semiconductor device includes: providing a groove having a thickness equal to or larger than a finishing thickness on a first surface of a semiconductor wafer on which a semiconductor element is formed; affixing a PSA tape onto the first surface of the semiconductor wafer in which the groove is formed; reducing the thickness of the semiconductor wafer by processing a second surface opposite to the first surface of the semiconductor wafer onto which the PSA tape is affixed, so as to separate the semiconductor wafer into a plurality of semiconductor chips on which the semiconductor element is formed; affixing an adhesive layer onto an entire rear surface of the separated semiconductor wafer; cutting the adhesive layer so as to separate the adhesive layer for each of the semiconductor chips; and peeling off the PSA tape from the semiconductor wafer while fixing the semiconductor wafer under suction by use of a porous member segmented into at least two sucking areas.
摘要翻译：半导体器件的制造方法包括：在其上形成有半导体元件的半导体晶片的第一表面上设置具有等于或大于精加工厚度的厚度的凹槽; 将PSA胶带固定到形成有所述凹槽的所述半导体晶片的所述第一表面上; 通过处理与固定有PSA带的半导体晶片的第一表面相对的第二表面来减小半导体晶片的厚度，以将半导体晶片分离成形成半导体元件的多个半导体芯片; 将粘合剂层附着在所分离的半导体晶片的整个后表面上; 切割粘合剂层以分离每个半导体芯片的粘合剂层; 以及通过使用分段在至少两个吸引区域中的多孔构件将半导体晶片固定在吸力下，同时从半导体晶片剥离PSA带。

4. 发明申请

US20050019980A1 Semiconductor manufacturing apparatus and method of manufacturing semiconductor device 有权
标题翻译：半导体制造装置及半导体装置的制造方法
公开(公告)号：US20050019980A1
公开(公告)日：2005-01-27
申请号：US10808298
申请日：2004-03-25
申请人： Tetsuya Kurosawa , Shinya Takyu , Kinya Mochida , Kenichi Watanabe
发明人： Tetsuya Kurosawa , Shinya Takyu , Kinya Mochida , Kenichi Watanabe
IPC分类号： H01L21/60 , H01L21/00 , H01L21/68 , H01L21/44
CPC分类号： H01L21/6838 , H01L21/67132 , H01L21/6835 , H01L21/6836 , H01L2221/68327 , H01L2221/6839 , Y10S156/941 , Y10S438/976 , Y10T156/1052 , Y10T156/1179 , Y10T156/12 , Y10T156/19
摘要： A semiconductor manufacturing apparatus includes: a peeling mechanism to peel a pressure sensitive adhesive (PSA) tape from a semiconductor wafer constituted by a plurality of semiconductor chips which are separated therefrom, the semiconductor wafer having an element formation surface to form an element thereon and a rear surface opposite to the element formation surface, the PSA tape adhering to the element formation surface of the semiconductor wafer, each of the semiconductor chips having an adhesive layer formed on the rear surface; wherein the peeling mechanism has a sucking section which have a porous member to hold the semiconductor wafer by suction, the porous member being segmented into at least two sucking areas in the direction in which the PSA tape is peeled.
摘要翻译：半导体制造装置包括：剥离机构，用于从由分离的多个半导体芯片构成的半导体晶片剥离压敏粘合剂（PSA）带，该半导体晶片具有元件形成表面以在其上形成元件，与所述元件形成表面相对的后表面，所述PSA带粘附到所述半导体晶片的元件形成表面，每个所述半导体芯片具有形成在所述后表面上的粘合层; 其特征在于，所述剥离机构具有吸引部，所述吸引部具有通过抽吸保持所述半导体晶片的多孔部件，所述多孔部件沿所述PSA带剥离的方向分割为至少两个吸引区域。

5. 发明授权

US10778860B2 Power supply device configured to automatically restore power after recovery from a power failure, image forming apparatus, and control method 有权
公开(公告)号：US10778860B2
公开(公告)日：2020-09-15
申请号：US16299707
申请日：2019-03-12
申请人： Kenichi Watanabe , Tomohiro Shuta , Yuuya Mori
发明人： Kenichi Watanabe , Tomohiro Shuta , Yuuya Mori
IPC分类号： H04N1/00 , G06F1/26
摘要： A power supply device installed in an electronic apparatus includes a first power supply outputting power upon a plug being connected to a system power supply, a second power supply outputting power upon receiving of a power supply control signal, a third power supply outputting power from a battery, a controller operating using the power from the second power supply and configured to control the electronic apparatus, a flip-flop configured to operate using the power from the third power supply and configured to store, upon activating the electronic apparatus, first logic data or upon shutting down the electronic apparatus, second logic data, and a power supply control switch operating using the power from the first power supply, to output the power supply control signal to the second power supply, in response to activating the electronic apparatus or in response to storing the first logic data in the flip-flop.

6. 发明授权

US09796590B2 Carbon fiber manufacturing method and carbon fiber 有权
公开(公告)号：US09796590B2
公开(公告)日：2017-10-24
申请号：US14235494
申请日：2012-08-02
申请人： Takayuki Kiriyama , Masahiro Hata , Hiroyuki Nakao , Nobuyuki Yamamoto , Masashi Shimahara , Kenichi Watanabe , Yasunori Murano , Hiroshi Tategaki
发明人： Takayuki Kiriyama , Masahiro Hata , Hiroyuki Nakao , Nobuyuki Yamamoto , Masashi Shimahara , Kenichi Watanabe , Yasunori Murano , Hiroshi Tategaki
IPC分类号： C01B31/02 , D06M11/34 , D06M23/06 , D01F11/12 , D06M101/40
CPC分类号： C01B32/05 , D01F11/122 , D06M11/34 , D06M23/06 , D06M2101/40 , D06M2200/50
摘要： Provided is a carbon fiber manufacturing method including a surface treatment step of ejecting an ozone solution in which ozone is dissolved in solvent from a fluid ejecting port toward a carbon fiber bundle and causing the ozone solution to pass between single fibers of the carbon fiber bundle so as to contact surfaces of the single fibers so that the surfaces of carbon fibers are treated by the ozone solution. Also, provided is a carbon fiber subjected to a surface treatment by the carbon fiber manufacturing method.

7. 发明授权

US08937007B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08937007B2
公开(公告)日：2015-01-20
申请号：US13398254
申请日：2012-02-16
申请人： Kenichi Watanabe , Nobuhiro Misawa , Satoshi Otsuka
发明人： Kenichi Watanabe , Nobuhiro Misawa , Satoshi Otsuka
IPC分类号： H01L21/44 , H01L21/4763 , H01L21/311 , H01L23/00 , H01L23/31
CPC分类号： H01L23/562 , H01L23/3192 , H01L23/564 , H01L24/05 , H01L2224/02166 , H01L2224/05567 , H01L2924/00014 , H01L2924/0002 , H01L2924/12044 , H01L2224/05552
摘要： A method of manufacturing a semiconductor device, including: forming a moisture resistant ring surrounding a multilayer interconnection structure in a layered body formed of stacked layers of a plurality of interlayer insulating films lower in dielectric constant than a SiO2 film and including the multilayer interconnection structure; forming a groove in the layered body between the moisture resistant ring and a scribe line, the groove reaching a surface of a semiconductor substrate; forming a film including Si and C as principal components and covering sidewall surfaces and a bottom surface of the groove; and forming a protection film on the film along the sidewall surfaces and the bottom surface of the groove.
摘要翻译：一种制造半导体器件的方法，包括：在由SiO 2膜介电常数低于介电常数的多个层间绝缘膜的叠层形成的层叠体中形成包围多层互连结构的防潮环，并且包括所述多层互连结构; 在所述层叠体之间在所述防潮环和划线之间形成凹槽，所述凹槽到达半导体衬底的表面; 形成包括Si和C作为主要成分并覆盖所述槽的侧壁表面和底表面的膜; 以及沿着所述凹槽的侧壁表面和所述底表面在所述膜上形成保护膜。

8. 发明授权

US08861245B2 Control circuit board, control system, and copying method 有权
标题翻译：控制电路板，控制系统和复印方法
公开(公告)号：US08861245B2
公开(公告)日：2014-10-14
申请号：US13804948
申请日：2013-03-14
申请人： Kenichi Watanabe
发明人： Kenichi Watanabe
IPC分类号： G11C5/06 , G06F13/00
CPC分类号： G11C5/06 , G06F13/00 , G06F13/1668
摘要： A control circuit board includes a first storage unit configured to store therein predetermined data; a connecting unit configured to be connected to another control circuit board including a second storage unit; a switching unit configured to switch between a first state and a second state, the first state being a state in which data read from the first storage unit is enabled but data read from the second storage unit is disabled, the second state being a state in which data read from the first storage unit is disabled but data read from the second storage unit is enabled; and a storage control unit configured to write or read data to or from the first storage unit in the first state, and perform a copying operation that reads the data from the second storage unit and stores the read data in the first storage unit in the second state.
摘要翻译：控制电路板包括配置成在其中存储预定数据的第一存储单元; 连接单元，被配置为连接到包括第二存储单元的另一个控制电路板; 切换单元，被配置为在第一状态和第二状态之间切换，所述第一状态是其中从所述第一存储单元读取的数据被使能但从所述第二存储单元读取的数据被禁用的状态，所述第二状态是从第一存储单元读取的数据被禁用，但是从第二存储单元读取的数据被使能; 以及存储控制单元，被配置为在所述第一状态下向所述第一存储单元写入数据或从所述第一存储单元读取数据，并执行从所述第二存储单元读取所述数据的复制操作，并将所读取的数据存储在所述第一存储单元中州。

9. 发明授权

US08842309B2 Facsimile control apparatus 有权
标题翻译：传真控制装置
公开(公告)号：US08842309B2
公开(公告)日：2014-09-23
申请号：US13410890
申请日：2012-03-02
申请人： Kenichi Watanabe
发明人： Kenichi Watanabe
IPC分类号： G06K15/00 , H04N1/327 , H04N1/00
CPC分类号： H04N1/00891 , H04N1/32793 , H04N2201/0093
摘要： A facsimile control apparatus includes a main control unit configured so that power supply to the main control unit is shut off while the facsimile control apparatus is in an energy-saving mode; a first switching unit configured to switch the power supply to the main control unit on/off; and a detection circuit configured to output a switch control signal for turning the first switching unit on when detecting an input signal input from a public network.
摘要翻译：一种传真控制装置，包括：主控制单元，其构造成在所述传真控制装置处于节能模式时关闭所述主控制单元的电力供应; 第一切换单元，被配置为开/关的主控制单元的电源; 以及检测电路，被配置为当检测到从公共网络输入的输入信号时，输出用于使所述第一开关单元接通的开关控制信号。

10. 发明授权

US08791576B2 Semiconductor device having groove-shaped via-hole 有权
公开(公告)号：US08791576B2
公开(公告)日：2014-07-29
申请号：US13548911
申请日：2012-07-13
申请人： Kenichi Watanabe
发明人： Kenichi Watanabe
IPC分类号： H01L23/522 , H01L23/48 , H01L23/52 , H01L23/532
CPC分类号： H01L21/76877 , H01L21/76804 , H01L21/76843 , H01L23/481 , H01L23/485 , H01L23/522 , H01L23/5226 , H01L23/5227 , H01L23/528 , H01L23/5283 , H01L23/53204 , H01L23/53223 , H01L23/53228 , H01L23/53266 , H01L23/5329 , H01L23/53295 , H01L23/562 , H01L23/58 , H01L23/585 , H01L29/0607 , H01L29/0611 , H01L29/0619 , H01L2924/0002 , H01L2924/00
摘要： The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.

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