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1. 发明授权

US5818655A Signal processing circuit and information recording/reproducing apparatus using the same, and method for optimizing coefficients of equalizer circuit 失效
公开(公告)号：US5818655A
公开(公告)日：1998-10-06
申请号：US506635
申请日：1995-07-25
申请人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
发明人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
IPC分类号： G11B5/035 , G11B5/09 , G11B20/10
CPC分类号： G11B20/10055 , G11B20/10009 , G11B20/10481 , G11B5/035 , G11B5/09
摘要： A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.

2. 发明授权

US5659309A Data recording/reproducing apparatus having viterbi decoder and method thereof 失效
标题翻译：具有维特比解码器的数据记录/再现装置及其方法
公开(公告)号：US5659309A
公开(公告)日：1997-08-19
申请号：US389773
申请日：1995-02-16
申请人： Terumi Takashi , Yasuhide Ouchi , Seiichi Mita , Akihiko Hirano , Naoki Satoh
发明人： Terumi Takashi , Yasuhide Ouchi , Seiichi Mita , Akihiko Hirano , Naoki Satoh
IPC分类号： G11B20/18 , G11B20/10 , H03M13/23 , H03M13/41 , H03M7/00
CPC分类号： H03M13/6343 , G11B20/10009 , H03M13/41
摘要： A data recording/reproducing apparatus and method therefor having a Viterbi decoder which stores operation result values of an inputted reproduced signal and the reference value when the peak value of the reproduced signal is updated, compares this value with the reproduced signal in amplitude, updates the stored value when the result satisfies the predetermined condition, detects a change in the polarity of the comparison result, controls the clock counter depending on the status of the peak value updating signal, sets 1 in the shift register at the position indicated by the counter according to the detected polarity inversion signal when the peak value is updated, and accordingly makes the updating and detecting operations independent of operations of addition and subtraction of the current reproduced signal and reference value and operations of addition and subtraction of amplitude comparison.
摘要翻译：一种数据记录/再现装置和方法，其具有维特比解码器，其在再现信号的峰值被更新时存储输入的再现信号的运算结果值和参考值，将该值与振幅的再现信号进行比较，更新当结果满足预定条件时，存储值检测比较结果的极性的变化，根据峰值更新信号的状态来控制时钟计数器，根据计数器指示的位置在移位寄存器中设置1 当更新峰值时检测到的极性反转信号，并且因此使得更新和检测操作与当前再现信号的加法和减法操作无关，参考值和幅度比较的相加和减法操作。

3. 发明授权

US06661594B2 Signal processing circuit and information recording/reproducing apparatus using the same, and method for optimizing coefficients of equalizer circuit 有权
标题翻译：信号处理电路和使用该信号的信息记录/再现装置，以及用于优化均衡器电路的系数的方法
公开(公告)号：US06661594B2
公开(公告)日：2003-12-09
申请号：US10277695
申请日：2002-10-23
申请人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
发明人： Naoki Satoh , Seiichi Mita , Shoichi Miyazawa , Terumi Takashi , Yosuke Hori , Yoshiju Watanabe , Akihiko Hirano , Satoshi Minoshima , Hideki Miyasaka , Toshihiro Nitta , Tomoaki Hirai , Ryushi Shimokawa , Koji Shida , Yasuhide Ouchi
IPC分类号： G11B535
CPC分类号： G11B20/10055 , G11B5/035 , G11B5/09 , G11B20/10009 , G11B20/10481
摘要： A signal processing circuit for a magnetic recording/reproducing apparatus, including at least an AGC, a PLL, a LPF, an equalizer circuit and a detection circuit, wherein a coefficient compensation circuit is formed by defining a constitution of the equalizer circuit, an error detection circuit is provided which operates by receiving input from the detection circuit, and the LSI is formed by a plurality of analog and digital chips, and the analog and digital chips are connected by current-output type D/A converters connected to at least the AGC and the PLL.
摘要翻译：一种用于至少包括AGC，PLL，LPF，均衡器电路和检测电路的磁记录/再现装置的信号处理电路，其中通过定义均衡器电路的结构形成系数补偿电路，错误提供检测电路，其通过接收来自检测电路的输入而工作，并且LSI由多个模拟和数字芯片形成，并且模拟和数字芯片通过电流输出型D / A转换器连接至少至少 AGC和PLL。

4. 发明授权

US6104331A Reproduced signal processing method, reproduced signal processing circuit, and a magnetic storage apparatus 有权
标题翻译：再现信号处理方法，再现信号处理电路和磁存储装置
公开(公告)号：US6104331A
公开(公告)日：2000-08-15
申请号：US161734
申请日：1998-09-29
申请人： Yoshiteru Ishida , Naoki Satoh , Terumi Takashi , Akihiko Hirano , Seiichi Mita
发明人： Yoshiteru Ishida , Naoki Satoh , Terumi Takashi , Akihiko Hirano , Seiichi Mita
IPC分类号： G11B5/09 , G11B5/012 , G11B19/04 , G11B20/10 , G11B20/24 , G11B23/00 , H03M1/12 , G11B5/02
CPC分类号： G11B19/04 , G11B20/10009 , G11B20/24 , G11B5/012 , G11B23/0007 , G11B5/09
摘要： A reproduced signal processing circuit includes a variable gain amplifier to which a signal read from a medium by a reproducing head is inputted; an analog-to-digital converter for converting a signal outputted from the variable gain amplifier into a digital signal; and a variable frequency oscillator for supplying an operation clock signal to the analog-to-digital converter. A reproduced signal processing method includes the steps of operating a first control loop for controlling the variable gain amplifier; operating at least either one of a second control loop and a third control loop, the second control loop controlling the variable frequency oscillator, the third control loop controlling the variable frequency oscillator; filtering by analog filter means the read signal inputted to the variable gain amplifier; operating at least one of first, second, and third noise detecting operations, the first noise detecting operation detecting presence or absence of a noise by comparing an amplitude of the output signal from the variable gain amplifier with a predetermined threshold value, the second noise detecting operation detecting a noise during an operation period of the second control loop, the third noise detecting operation detecting a noise during an operation period of the third control loop; and changing the range of cutoff frequency of the analog filter means in accordance with a result from at least one of the first, second, and third noise detecting operations, thereby controlling at least one of the first, second, and third control loops.
摘要翻译：再现信号处理电路包括可变增益放大器，从再现头从介质读取的信号被输入到该可变增益放大器; 用于将从可变增益放大器输出的信号转换为数字信号的模拟 - 数字转换器; 以及用于向模数转换器提供操作时钟信号的可变频率振荡器。再现信号处理方法包括以下步骤：操作用于控制可变增益放大器的第一控制环路; 操作第二控制回路和第三控制回路中的至少一个，控制可变频率振荡器的第二控制回路，控制可变频率振荡器的第三控制回路; 通过模拟滤波器滤波意味着输入到可变增益放大器的读取信号; 操作第一，第二和第三噪声检测操作中的至少一个，所述第一噪声检测操作通过将来自可变增益放大器的输出信号的幅度与预定阈值进行比较来检测噪声的存在或不存在，第二噪声检测操作在第二控制回路的操作期间检测噪声，第三噪声检测操作在第三控制回路的操作期间检测噪声; 以及根据第一，第二和第三噪声检测操作中的至少一个的结果改变模拟滤波器装置的截止频率的范围，从而控制第一，第二和第三控制回路中的至少一个。

5. 发明授权

US06725418B2 Decoding circuit using path sequence including feed-back type path sequence storing blocks 有权
标题翻译：使用包括反馈型路径序列存储块的路径序列的解码电路
公开(公告)号：US06725418B2
公开(公告)日：2004-04-20
申请号：US09994062
申请日：2001-11-27
申请人： Hideki Sawaguchi , Akihiko Hirano , Seiichi Mita , Terumi Takashi
发明人： Hideki Sawaguchi , Akihiko Hirano , Seiichi Mita , Terumi Takashi
IPC分类号： H03M1341
CPC分类号： G11B20/10296 , G11B20/10009 , H03M13/3961 , H03M13/41 , H03M13/6343 , H03M13/6502
摘要： A maximum likelihood decoding circuit is arranged to reduce the power consumption through the effect of the Viterbi algorithm. A plurality of storing elements 61a to 61h located vertically in a column and for storing each state survivor path information at the same time point are treated as storing element blocks 60(1) to 60(D) in a manner to correspond to the combination (state) of intra-code interferences. The outputs from the storing elements 61a to 61h are again applied into the inputs of the corresponding storing elements contained in the same storing element block through the path history selecting circuits 62a to 62h. Each of the storing element block 60(1) to 60(D) is periodically started on the input timing of a receiving signal at each processing time point by starting points (pointers) 63(1) to 63(D) outputted from a starting signal (pointer) generating circuit 68. A storing element block output circuit 64 and storing element block output terminals 65(1) to 65(D) are provided in each of the storing element blocks 60(1) to 60(D) so that a path memory circuit output 67 may be outputted through an OR circuit 66.
摘要翻译：布置最大似然解码电路，通过维特比算法的效果来降低功耗。在同一时间点垂直定位并用于存储每个状态幸存者路径信息的多个存储元件61a至61h以对应于组合的方式被视为存储元件块60（1）至60（D）状态）的代码间干扰。存储元件61a至61h的输出通过路径历史选择电路62a至62h再次应用于包含在相同存储元件块中的相应存储元件的输入。存储元件块60（1）〜（D）中的每一个在每个处理时间点的接收信号的输入定时通过起始点（指针）63（1）至63（D）从起始点信号（指针）产生电路68.存储元件块输出电路64和存储元件块输出端子65（1）至65（D）中的每一个都设置在每个存储元件块60（1）至60（D）中，使得可以通过OR电路66输出路径存储器电路输出67。

6. 发明授权

US06334201B1 Decoding circuit and information processing apparatus 失效
标题翻译：解码电路和信息处理装置
公开(公告)号：US06334201B1
公开(公告)日：2001-12-25
申请号：US09093931
申请日：1998-06-09
申请人： Hideki Sawaguchi , Akihiko Hirano , Seiichi Mita , Terumi Takashi
发明人： Hideki Sawaguchi , Akihiko Hirano , Seiichi Mita , Terumi Takashi
IPC分类号： H03M1341
CPC分类号： G11B20/10296 , G11B20/10009 , H03M13/3961 , H03M13/41 , H03M13/6343 , H03M13/6502
摘要： A maximum likelihood decoding circuit is arranged to reduce power consumption through the effect of a Viterbi algorithm. A plurality of storing elements located vertically in a column and for storing each state survivor path information at the same time point are treated as storing element blocks in a manner to correspond to the combination (state) of intracode interferences. The outputs from the storing elements are again applied into the inputs of the corresponding storing elements contained in the same storing element block through path history selecting circuits. Each of the storing blocks is periodically started on the input timing of a receiving signal at each processing time point by starting signals (pointers) outputted from a starting signal (pointer) generated circuit. A storing element block output circuit and storing element block output terminals are provided in each of the storing element blocks so that a path memory circuit output may be outputted through an OR circuit.
摘要翻译：布置最大似然解码电路以通过维特比算法的效果来降低功耗。垂直定位在列中并用于在同一时间点存储每个状态幸存者路径信息的多个存储元件被视为对应于帧内干扰的组合（状态）的存储元件块。来自存储元件的输出通过路径历史选择电路再次应用于包含在相同存储元件块中的相应存储元件的输入。通过开始从起始信号（指针）产生电路输出的信号（指针），在每个处理时间点，通过接收信号的输入定时周期性地开始每个存储块。存储元件块输出电路和存储元件块输出端子设置在每个存储元件块中，使得路径存储器电路输出可以通过OR电路输出。

7. 发明授权

US06069856A Information recording/reproduction method and apparatus using EPRML connection processing system using concatenated demodulators 失效
标题翻译：使用连接解调器的EPRML连接处理系统的信息记录/再现方法和装置
公开(公告)号：US06069856A
公开(公告)日：2000-05-30
申请号：US975670
申请日：1997-11-28
申请人： Seiichi Mita , Terumi Takashi , Naoki Satoh
发明人： Seiichi Mita , Terumi Takashi , Naoki Satoh
IPC分类号： G11B20/14 , G11B5/012 , G11B5/09 , G11B20/10 , G11B20/18 , G11B7/005
CPC分类号： G11B20/10009 , G11B5/012 , G11B5/09
摘要： An information recording/reproducing apparatus includes first and second data demodulators having different data discriminating capabilities. The first data demodulator has a lower data discriminating capability and the second data demodulator has a higher data discriminating capability. When the reliability of reliability information for demodulation data generated by the first data demodulator, the second data demodulator is operated so that demodulation data generated by the first data demodulator is replaced by demodulation data generated by the second data demodulator during a period of time when the reliability of the reliability information is deteriorated.
摘要翻译：信息记录/再现装置包括具有不同数据鉴别能力的第一和第二数据解调器。第一数据解调器具有较低的数据鉴别能力，第二数据解调器具有较高的数据识别能力。当由第一数据解调器产生的解调数据的可靠性信息的可靠性操作时，第二数据解调器被操作，使得由第一数据解调器产生的解调数据被第二数据解调器产生的解调数据替换为在第可靠性信息的可靠性恶化。

8. 发明授权

US06215744B1 Information recording/reproducing method and apparatus using EPRML connection processing system 失效
标题翻译：使用EPRML连接处理系统的信息记录/再现方法和装置
公开(公告)号：US06215744B1
公开(公告)日：2001-04-10
申请号：US09504796
申请日：2000-02-15
申请人： Seiichi Mita , Terumi Takashi , Naoki Satoh
发明人： Seiichi Mita , Terumi Takashi , Naoki Satoh
IPC分类号： G11B7005
CPC分类号： G11B20/10009 , G11B5/012 , G11B5/09
摘要： An information recording/reproducing apparatus includes first and second data demodulators having different data discriminating capabilities. The first data demodulator has a lower data discriminating capability and the second data demodulator has a higher data discriminating capability. When the reliability of reliability information for demodulation data generated by the first data demodulator, the second data demodulator is operated so that demodulation data generated by the first data demodulator is replaced by demodulation data generated by the second data demodulator during a period of time when the reliability of the reliability information is deteriorated.
摘要翻译：信息记录/再现装置包括具有不同数据鉴别能力的第一和第二数据解调器。第一数据解调器具有较低的数据鉴别能力，第二数据解调器具有较高的数据识别能力。当由第一数据解调器产生的解调数据的可靠性信息的可靠性操作时，第二数据解调器被操作，使得由第一数据解调器产生的解调数据被第二数据解调器产生的解调数据替换为在第可靠性信息的可靠性恶化。

9. 发明授权

US5703855A Optical disk apparatus and recording and reading method for an optical disk using the same 失效
标题翻译：光盘装置以及使用其的光盘的记录和读取方法
公开(公告)号：US5703855A
公开(公告)日：1997-12-30
申请号：US220428
申请日：1994-03-30
申请人： Fumiyoshi Kirino , Tsuyoshi Toda , Horishi Ide , Hisataka Sugiyama , Atsushi Saito , Hiroyuki Tsuchinaga , Takeshi Maeda , Fumio Kugiya , Toshimitsu Kaku , Seiichi Mita , Kazuo Shigematsu , Yasuhide Ouchi
发明人： Fumiyoshi Kirino , Tsuyoshi Toda , Horishi Ide , Hisataka Sugiyama , Atsushi Saito , Hiroyuki Tsuchinaga , Takeshi Maeda , Fumio Kugiya , Toshimitsu Kaku , Seiichi Mita , Kazuo Shigematsu , Yasuhide Ouchi
IPC分类号： G11B7/0045 , G11B7/095 , G11B7/125 , G11B11/105 , G11B20/12 , G11B20/18 , G11B7/00
CPC分类号： G11B7/126 , G11B11/1053 , G11B11/10595 , G11B7/0045 , G11B7/0956 , G11B20/1258 , G11B20/182
摘要： A super high density optical disk apparatus is obtained by using an exchangeable recording medium having a recording capacity of at least 1.5 Gb/in.sup.2 in an optical recording and reading apparatus for recording or reading at least using a laser beam or by using one of an element which can record on a recording medium only once and another element which can record at least two times repeatedly as recording elements to be used.
摘要翻译：通过在至少使用激光束的记录或读取的光学记录和读取装置中使用具有至少1.5Gb / in2的记录容量的可交换记录介质来获得超高密度光盘装置，或者通过使用元件其可以在记录介质上记录一次，另一个可以重复记录至少两次的元素作为要使用的记录元素。

10. 发明授权

US5848045A Method for recording and reading an optical disk 失效
标题翻译：记录和读取光盘的方法
公开(公告)号：US5848045A
公开(公告)日：1998-12-08
申请号：US968526
申请日：1997-11-12
申请人： Fumiyoshi Kirino , Tsuyoshi Toda , Hiroshi Ide , Hisataka Sugiyama , Atsushi Saito , Hiroyuki Tsuchinaga , Takeshi Maeda , Fumio Kugiya , Toshimitsu Kaku , Seiichi Mita , Kazuo Shigematsu , Yasuhide Ouchi
发明人： Fumiyoshi Kirino , Tsuyoshi Toda , Hiroshi Ide , Hisataka Sugiyama , Atsushi Saito , Hiroyuki Tsuchinaga , Takeshi Maeda , Fumio Kugiya , Toshimitsu Kaku , Seiichi Mita , Kazuo Shigematsu , Yasuhide Ouchi
IPC分类号： G11B7/0045 , G11B7/095 , G11B7/125 , G11B11/105 , G11B20/12 , G11B20/18 , G11B7/00
CPC分类号： G11B7/126 , G11B11/1053 , G11B11/10595 , G11B7/0045 , G11B7/0956 , G11B20/1258 , G11B20/182
摘要： A super high density optical disk apparatus is obtained by using an exchangeable recording medium having a recording capacity of at least 1.5 Gb/in.sup.2 in an optical recording and reading apparatus for recording or reading at least using a laser beam or by using one of means which can record on a recording medium only once and means which can record at least two times repeatedly as recording means to be used.
摘要翻译：通过在至少使用激光束进行记录或读取的光学记录和读取装置中使用具有至少1.5Gb / in2的记录容量的可交换记录介质来获得超高密度光盘装置，或者通过使用可以在记录介质上记录一次，并且可以重复记录至少两次作为要使用的记录装置的装置。

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