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    • 5. 发明授权
    • Reverse blocking semiconductor device and a method for manufacturing the same
    • 反向阻挡半导体器件及其制造方法
    • US07307330B2
    • 2007-12-11
    • US11397478
    • 2006-04-04
    • Michio NemotoManabu TakeiTatsuya Naito
    • Michio NemotoManabu TakeiTatsuya Naito
    • H01L23/58
    • H01L29/0646H01L29/0619H01L29/0638H01L29/0834H01L29/404H01L29/7395
    • A reverse blocking semiconductor device that shows no adverse effect of an isolation region on reverse recovery peak current, that has a breakdown withstanding structure exhibiting satisfactory soft recovery, that suppresses aggravation of reverse leakage current, which essentially accompanies a conventional reverse blocking IGBT, and that retains satisfactorily low on-state voltage is disclosed. The device includes a MOS gate structure formed on a n− drift layer, the MOS gate structure including a p+ base layer formed in a front surface region of the drift layer, an n+ emitter region formed in a surface region of the base layer, a gate insulation film covering a surface area of the base layer between the emitter region and the drift layer, and a gate electrode formed on the gate insulation film. An emitter electrode is in contact with both the emitter region and the base layer of the MOS gate structure. A p+ isolation region surrounds the MOS gate structure through the drift layer and extends across whole thickness of the drift layer. A p+ collector layer is formed on a rear surface of the drift layer and connects to a rear side of the isolation region. A distance W is greater than a thickness d, in which the distance W is a distance from an outermost position of a portion of the emitter electrode, the portion being in contact with the base layer, to an innermost position of the isolation region, and the thickness d is a dimension in a depth direction of the drift layer.
    • 没有显示隔离区域对反向恢复峰值电流的不利影响的反向阻挡半导体器件,其具有显示令人满意的软恢复的击穿耐受结构,其抑制基本上伴随常规反向阻断IGBT的反向漏电流的恶化,并且 公开了令人满意的低导通电压。 该器件包括形成在n漂移层上的MOS栅极结构,该MOS栅极结构包括形成在该漂移层的前表面区域中的p +基极层,形成在该基极层的表面区域中的n +发射极区域, 覆盖发射极区域和漂移层之间的基底层的表面区域的栅极绝缘膜,以及形成在栅极绝缘膜上的栅电极。 发射极电极与MOS栅极结构的发射极区域和基极层接触。 p +隔离区域通过漂移层包围MOS栅极结构,并延伸穿过漂移层的整个厚度。 p +集电极层形成在漂移层的后表面上并连接到隔离区的后侧。 距离W大于厚度d,其中距离W是距离发射电极的一部分的最外侧位置(与基层接触的部分)到隔离区域的最内位置的距离,以及 厚度d是漂移层的深度方向的尺寸。