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1. 发明申请

US20070074806A1 Production method of multilayer ceramic electronic device 审中-公开
标题翻译：多层陶瓷电子器件的生产方法
公开(公告)号：US20070074806A1
公开(公告)日：2007-04-05
申请号：US11527574
申请日：2006-09-27
申请人： Tatsuya Kojima , Raitaro Masaoka , Takako Murosawa
发明人： Tatsuya Kojima , Raitaro Masaoka , Takako Murosawa
IPC分类号： C03B29/00
CPC分类号： C04B35/4682 , C04B35/638 , C04B2235/3206 , C04B2235/3208 , C04B2235/3225 , C04B2235/3236 , C04B2235/3239 , C04B2235/3241 , C04B2235/3418 , C04B2235/5445 , C04B2235/6562 , C04B2235/6565 , C04B2235/6567 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/663 , H01G4/0085 , H01G4/12 , H01G4/30
摘要： By a production method for producing a multilayer ceramic electronic device including dielectric layers and internal electrode layers comprising the steps of forming a green sheet to be said dielectric layer after firing, forming a pre-fired electrode layer to be said internal electrode layer after firing in a predetermined pattern on said green sheet by using a conductive material paste, forming a green chip by successively stacking said green sheets and said pre-fired electrode layers, and firing said green chip: wherein the conductive material paste for forming said pre-fired electrode layer is composed at least of conductive material particles, a first common material composed of ceramic powder and a second common material composed of ceramic powder having a larger average particle diameter than that of said first common material; an average particle diameter of said first common material is 1/20 to ½ of an average particle diameter of said conductive material particles; and the average particle diameter of said second common material is 1/10 to ½ of an average thickness of said internal electrode layers after firing; a multilayer ceramic electronic device, such as a multilayer ceramic capacitor, wherein arising of cracks is effectively prevented, having a low short-circuit defect rate, a low voltage resistance defect rate and high capacitance is produced.
摘要翻译：通过制造包括电介质层和内部电极层的多层陶瓷电子器件的制造方法，包括以下步骤：在烧成后形成作为所述电介质层的生片，在烧成后形成作为所述内部电极层的预烧电极层通过使用导电材料浆料在所述生片上的预定图案，通过连续堆叠所述生片和所述预烧电极层形成绿色芯片，并烧制所述生芯片：其中用于形成所述预烧电极的导电材料糊至少由导电材料颗粒构成的第一普通材料，由陶瓷粉末组成的第一普通材料和平均粒径大于所述第一普通材料的陶瓷粉末的第二普通材料; 所述第一普通材料的平均粒径为所述导电材料颗粒的平均粒径的1/20至1/2; 所述第二普通材料的平均粒径为烧成后的内部电极层的平均厚度的1/10〜1/2; 可以有效地防止出现裂纹的多层陶瓷电子器件，如多层陶瓷电容器，具有低的短路缺陷率，低电压电阻缺陷率和高电容。

2. 再颁专利

USRE40665E1 Multilayer ceramic capacitor 有权
标题翻译：多层陶瓷电容器
公开(公告)号：USRE40665E1
公开(公告)日：2009-03-17
申请号：US11431158
申请日：2006-05-10
申请人： Takako Murosawa , Kazunori Noguchi , Mari Miyauchi , Akira Sato
发明人： Takako Murosawa , Kazunori Noguchi , Mari Miyauchi , Akira Sato
IPC分类号： H01G4/20 , H01G4/06
CPC分类号： H01G4/30 , H01G4/12
摘要： A multilayer ceramic capacitor 1 having internal electrode layers 3, internal dielectric layers 2 having the thickness of less than 2 μm, and external dielectric layers 20 wherein; the internal dielectric layers 2 and the external dielectric layers 20 include a plural number of dielectric particles 2a, 20a, and when y1 is ratio(D50a/D50b) of D50a and D50b where D50a is an average particle size of dielectric particles 2a included in the internal dielectric layers 2 and D50b is an average particle size of dielectric particles 20a included in the external dielectric layer 20 and located at least 5 μm away from an internal electrode layer 3a, arranged outermost part of all the internal electrode layers, to the stacked direction, and x is thickness of the internal dielectric layer 2, y1 and x satisfy the following equations, y1≦−0.75x+2.275 and y1≧−0.75x+1.675. According to the present invention, even when thickness of internal dielectric layers 2 were made thinner, a multilayer ceramic capacitor 1 wherein improvements in all kinds of electric characteristics, specially an improvement in TC bias characteristic while having sufficient dielectric constant can be expected.
摘要翻译：具有内部电极层3，厚度小于2μm的内部电介质层2和外部电介质层20的多层陶瓷电容器1，其中：内部电介质层2和外部电介质层20包括多个电介质粒子2a，20a，当y1是D50a和D50b的比率（D50a / D50b）时，D50a是包含在电介质粒子2a中的电介质粒子2a的平均粒径内部电介质层2和D50b是外部电介质层20中包含的绝缘粒子20a的平均粒径，并且位于离所有内部电极层的最外侧的内部电极层3a至少5m的层叠方向，x是内部电介质层2的厚度，y1和x满足下列等式，y1 <= - 0.75x + 2.275和y1> = - 0.75x + 1.675。根据本发明，即使使内部电介质层2的厚度变薄，也可以期望具有各种电特性的改善的多层陶瓷电容器1，特别是具有足够介电常数的TC偏置特性的改善。

3. 发明申请

US20050219795A1 MULTILAYER CERAMIC CAPACITOR 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US20050219795A1
公开(公告)日：2005-10-06
申请号：US11094604
申请日：2005-03-31
申请人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
发明人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
IPC分类号： H01G4/12 , H01G4/30 , H01G4/06
CPC分类号： H01G4/12 , H01G4/30
摘要： A multilayer ceramic capacitor comprising an internal electrode layer, an internal dielectric layer having a thickness of less than 2 μm, and an external dielectric layer is provided, wherein the internal dielectric layer and external dielectric layer contain a plurality of dielectric particles, and when assuming that an average particle diameter of the entire dielectric particles in the internal dielectric layer is D50a (unit: μm), an average particle diameter of the entire dielectric particles existing at a position being away at least by 5 μm from the outermost internal electrode layer in the thickness direction is D50b (unit: μm), a ratio (D50a/D50b) of the D50a and D50b is y (no unit), standard deviation of a particle size distribution of the entire dielectric particles in the internal dielectric layer is σ (no unit), and a ratio that dielectric particles (coarse particles) having an average particle diameter of 2.25 times of the D50a exist in the entire dielectric particles is p (unit: %), the y and x satisfy a relationship of y −0.75x+1.740, the σ satisfies σ
摘要翻译：提供了包括内部电极层，厚度小于2μm的内部电介质层和外部电介质层的多层陶瓷电容器，其中内部电介质层和外部电介质层包含多个电介质颗粒，并且当假定内部电介质层中的整个电介质颗粒的平均粒径为D50a（单位：mum），存在于距离最外部内部电极层至少离开5μm的位置的整个电介质粒子的平均粒径厚度方向为D50b（单位：mum），D50a和D50b的比率（D50a / D50b）为y（无单位），内部电介质层中的整个电介质粒子的粒度分布的标准偏差为σ（无单位），并且在整个电介质粒子中存在平均粒径为D25a的2.25倍的电介质粒子（粗粒子）的比例 es是p（单位：％），y和x满足y <-0.75x + 2.015和y> -0.75x + 1.740的关系，σ满足σ<0.091，p满足p <2.85％。即使当内部电介质层变薄时，也可以期望改善TC偏压特性，同时保持各种电特性，特别是足够的介电常数。

4. 发明授权

US06975502B2 Multilayer ceramic capacitor 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US06975502B2
公开(公告)日：2005-12-13
申请号：US11094604
申请日：2005-03-31
申请人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
发明人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
IPC分类号： H01G4/12 , H01G4/30 , H01G4/06 , H01G4/20
CPC分类号： H01G4/12 , H01G4/30
摘要： A multilayer ceramic capacitor including an internal electrode layer, an internal dielectric layer having a thickness of less than 2 μm, and an external dielectric layer is provided, wherein the internal dielectric layer and external dielectric layer contain a plurality of dielectric particles, and when assuming that an average particle diameter of the entire dielectric particles in the internal dielectric layer is D50a (unit: μm), an average particle diameter of the entire dielectric particles existing at a position being away at least by 5 μm from the outermost internal electrode layer in the thickness direction is D50b (unit: μm), a ratio (D50a/D50b) of the D50a and D50b is y (no unit), standard deviation of a particle size distribution of the entire dielectric particles in the internal dielectric layer is σ (no unit), and a ratio that dielectric particles (coarse particles) having an average particle diameter of 2.25 times of the D50a exist in the entire dielectric particles is p (unit: %), the y and x satisfy a relationship of y −0.75x+1.740, the σ satisfies σ
摘要翻译：提供包括内部电极层，厚度小于2μm的内部电介质层和外部电介质层的多层陶瓷电容器，其中内部电介质层和外部电介质层包含多个电介质颗粒，并且当假定内部电介质层中的整个电介质颗粒的平均粒径为D50a（单位：mum），存在于距离最外部内部电极层至少离开5μm的位置的整个电介质粒子的平均粒径厚度方向为D50b（单位：mum），D50a和D50b的比率（D50a / D50b）为y（无单位），内部电介质层中的整个电介质粒子的粒度分布的标准偏差为σ（无单位），并且在整个电介质粒子中存在平均粒径为D50a的2.25倍的电介质粒子（粗粒子）的比例 s为p（单位：％），y和x满足y <-0.75x + 2.015和y> -0.75x + 1.740的关系，σ满足σ<0.091，p满足p <2.85％即使当内部电介质层变薄时，也可以期望改善TC偏压特性，同时保持各种电特性，特别是足够的介电常数。

5. 发明申请

US20060254693A1 Method of production of multilayer ceramic electronic device 审中-公开
标题翻译：多层陶瓷电子器件的生产方法
公开(公告)号：US20060254693A1
公开(公告)日：2006-11-16
申请号：US11411867
申请日：2006-04-27
申请人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
发明人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
IPC分类号： H01G4/12 , C03B29/00
CPC分类号： H01G4/1227 , B32B18/00 , B32B2311/22 , C04B35/4682 , C04B35/6303 , C04B35/64 , C04B2235/3206 , C04B2235/3208 , C04B2235/3215 , C04B2235/3224 , C04B2235/3225 , C04B2235/3239 , C04B2235/3251 , C04B2235/3256 , C04B2235/3258 , C04B2235/3262 , C04B2235/3418 , C04B2235/5445 , C04B2235/6025 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/663 , C04B2235/72 , C04B2235/721 , C04B2235/724 , C04B2235/726 , C04B2235/727 , C04B2235/761 , C04B2235/79 , C04B2237/12 , C04B2237/346 , C04B2237/405 , C04B2237/704 , C04B2237/706 , H01G4/30
摘要： A method of production of a multilayer ceramic electronic device having internal electrode layers and dielectric layers having thicknesses of less than 2 μm, having a step of firing a stack formed using a dielectric layer paste including a dielectric paste dielectric material and an internal electrode layer paste including a sintering inhibiting dielectric material, the dielectric paste dielectric material including a main ingredient material and sub ingredient material, the sintering inhibiting dielectric material in the internal electrode paste including at least a sintering inhibiting main ingredient material, the sintering inhibiting main ingredient material being substantially the same in composition as the main ingredient material included in the dielectric paste dielectric material and having a lattice constant over 3.991 Å and less than 4.064 Å.
摘要翻译：一种具有内部电极层和厚度小于2μm的电介质层的多层陶瓷电子器件的制造方法，其特征在于，具有使用包含电介质膏介电材料和内部电极层糊剂的电介质层糊料形成的叠层的烧成步骤包括烧结抑制介电材料，所述电介质糊介质材料包括主要成分材料和副成分材料，所述内部电极糊料中的所述烧结抑制介电材料至少包含烧结抑制性主要成分材料，所述烧结抑制主要成分材料基本上与包含在电介质糊状电介质材料中的主要成分材料的组成相同，晶格常数大于3.991且小于4.064埃。

6. 发明授权

US07046502B2 Multilayer ceramic capacitor 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US07046502B2
公开(公告)日：2006-05-16
申请号：US11092730
申请日：2005-03-30
申请人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
发明人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
IPC分类号： H01G4/06
CPC分类号： H01G4/12 , H01G4/30
摘要： A multilayer ceramic capacitor having an internal electrode layer and a dielectric layer having a thickness of less than 2 μm is provided, wherein the dielectric layer contains a plurality of dielectric particles, and when it is assumed that standard deviation of a particle distribution of the entire dielectric particles in the dielectric layer is σ (no unit), an average particle diameter of the entire dielectric particles in the dielectric layer is D50 (unit: μm), and a rate that dielectric particles (coarse particles) having an average particle diameter of 2.25 times of the D50 exist in the entire dielectric particles is p (unit: %), the σ and p satisfy σ
摘要翻译：提供了具有内部电极层和厚度小于2μm的电介质层的多层陶瓷电容器，其中介电层包含多个电介质颗粒，并且当假定整个电介质层的粒子分布的标准偏差电介质层中的电介质粒子是σ（无单位），电介质层中的整个电介质粒子的平均粒径为D 50（单位：mum），并且具有平均粒径在整个电介质颗粒中存在的D50的2.25倍是p（单位：％），σ和p满足σ<0.130和p <12％; 即使层间电介质层薄，也可以预期可以提高TC偏置特性，同时保持各种电特性，特别是足够的介电常数。

7. 发明申请

US20050254197A1 Multilayer ceramic capacitor 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US20050254197A1
公开(公告)日：2005-11-17
申请号：US11092730
申请日：2005-03-30
申请人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
发明人： Takako Murosawa , Mari Miyauchi , Kazunori Noguchi , Akira Sato
IPC分类号： H01G4/12 , H01G4/30 , H01G4/06
CPC分类号： H01G4/12 , H01G4/30
摘要： A multilayer ceramic capacitor comprising an internal electrode layer and a dielectric layer having a thickness of less than 2 μm is provided, wherein the dielectric layer contains a plurality of dielectric particles, and when it is assumed that standard deviation of a particle distribution of the entire dielectric particles in the dielectric layer is σ (no unit), an average particle diameter of the entire dielectric particles in the dielectric layer is D50 (unit: μm), and a rate that dielectric particles (coarse particles) having an average particle diameter of 2.25 times of the D50 exist in the entire dielectric particles is p (unit: %), the σ and p satisfy σ
摘要翻译：提供了包括内部电极层和厚度小于2μm的电介质层的多层陶瓷电容器，其中介电层包含多个电介质颗粒，并且当假定整个电极的颗粒分布的标准偏差电介质层中的电介质粒子是σ（无单位），电介质层中的整个电介质粒子的平均粒径为D 50（单位：mum），并且具有平均粒径在整个电介质颗粒中存在的D50的2.25倍是p（单位：％），σ和p满足σ<0.130和p <12％; 即使层间电介质层薄，也可以预期可以提高TC偏置特性，同时保持各种电特性，特别是足够的介电常数。

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