专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07480731B2 Data transfer scheme using caching technique for reducing network load 失效
标题翻译：数据传输方案采用缓存技术减少网络负载
公开(公告)号：US07480731B2
公开(公告)日：2009-01-20
申请号：US12058820
申请日：2008-03-31
申请人： Toshibumi Seki , Tatsunori Kanai , Kenichiro Yoshii , Hideki Yoshida , Haruhiko Toyama , Hideaki Sato , Yasuhiro Kimura , Takayuki Miyazawa
发明人： Toshibumi Seki , Tatsunori Kanai , Kenichiro Yoshii , Hideki Yoshida , Haruhiko Toyama , Hideaki Sato , Yasuhiro Kimura , Takayuki Miyazawa
IPC分类号： G06F15/16
CPC分类号： H04L67/2819 , H04L29/06 , H04L67/2828 , H04L67/288 , H04L69/329
摘要： In a data transfer scheme using a caching technique and/or a compression technique which is capable of reducing the network load of a network connecting between data transfer devices, correspondences between data and their names are registered at the data transfer devices and the corresponding names are transferred, instead of transferring the data, for those data for which the correspondences are registered, so that it is possible to reduce the amount of transfer data among the data transfer devices. Server side data transfer devices and client side data transfer devices can be provided in multiple-to-one, one-to-multiple, or multiple-to-multiple manners.
摘要翻译：在使用缓存技术和/或压缩技术的数据传输方案中，能够减少在数据传输设备之间连接的网络的网络负载，数据和它们的名称之间的对应关系被登记在数据传输设备上，并且相应的名称是而是传送数据，而不是传送数据，对于其对应被登记的那些数据，使得可以减少数据传送装置之间的传送数据量。服务器端数据传输设备和客户端数据传输设备可以以多对一，一对多或多对多的方式提供。

2. 发明申请

US20080189434A1 DATA TRANSFER SCHEME USING CACHING TECHNIQUE FOR REDUCING NETWORK LOAD 失效
标题翻译：使用缓存技术减少网络负载的数据传输方案
公开(公告)号：US20080189434A1
公开(公告)日：2008-08-07
申请号：US12058820
申请日：2008-03-31
申请人： Toshibumi Seki , Tatsunori Kanai , Kenichiro Yoshii , Hideki Yoshida , Haruhiko Toyama , Hideaki Sato , Yasuhiro Kimura , Takayuki Miyazawa
发明人： Toshibumi Seki , Tatsunori Kanai , Kenichiro Yoshii , Hideki Yoshida , Haruhiko Toyama , Hideaki Sato , Yasuhiro Kimura , Takayuki Miyazawa
IPC分类号： G06F15/173
CPC分类号： H04L67/2819 , H04L29/06 , H04L67/2828 , H04L67/288 , H04L69/329
摘要： In a data transfer scheme using a caching technique and/or a compression technique which is capable of reducing the network load of a network connecting between data transfer devices, correspondences between data and their names are registered at the data transfer devices and the corresponding names are transferred, instead of transferring the data, for those data for which the correspondences are registered, so that it is possible to reduce the amount of transfer data among the data transfer devices. Server side data transfer devices and client side data transfer devices can be provided in multiple-to-one, one-to-multiple, or multiple-to-multiple manners.
摘要翻译：在使用缓存技术和/或压缩技术的数据传输方案中，能够减少在数据传输设备之间连接的网络的网络负载，数据和它们的名称之间的对应关系被登记在数据传输设备上，并且相应的名称是而是传送数据，而不是传送数据，对于其对应被登记的那些数据，使得可以减少数据传送装置之间的传送数据量。服务器端数据传输设备和客户端数据传输设备可以以多对一，一对多或多对多的方式提供。

3. 发明授权

US07441248B2 Data transfer scheme using caching technique for reducing network load 失效
标题翻译：数据传输方案采用缓存技术减少网络负载
公开(公告)号：US07441248B2
公开(公告)日：2008-10-21
申请号：US10253517
申请日：2002-09-25
申请人： Hideaki Sato , Tatsunori Kanai , Hideki Yoshida , Toshibumi Seki , Kenichiro Yoshii , Takayuki Miyazawa , Yasuhiro Kimura , Haruhiko Toyama
发明人： Hideaki Sato , Tatsunori Kanai , Hideki Yoshida , Toshibumi Seki , Kenichiro Yoshii , Takayuki Miyazawa , Yasuhiro Kimura , Haruhiko Toyama
IPC分类号： G06F3/00 , G06F9/44 , G06F9/46 , G06F13/00 , G06F15/16
CPC分类号： H04L67/2819 , H04L67/2842 , H04L67/288 , H04L69/22 , H04L69/329
摘要： In a data transfer device, presence/absence of a prescribed header in the received request message is analyzed, and information indicating the presence/absence of the prescribed header, or information indicating either presence or absence of the prescribed header when the prescribed header is either present or absent as a result of analysis is stored. Then, when a reply message corresponding to the request message is received, the presence/absence of the prescribed header is checked by referring to the stored information, and the reply message is transferred according to a result of checking.
摘要翻译：在数据传送装置中，分析所接收到的请求消息中规定的报头的存在/不存在，以及指示规定标题的存在/不存在的信息，或者当规定报头是作为分析结果存在或不存在。然后，当接收到与请求消息对应的回复消息时，通过参考所存储的信息来检查规定报头的存在/不存在，并且根据检查结果传送回复消息。

4. 发明申请

US20080155153A1 Device control apparatus 失效
标题翻译：设备控制装置
公开(公告)号：US20080155153A1
公开(公告)日：2008-06-26
申请号：US11896848
申请日：2007-09-06
申请人： Kenichiro Yoshii , Tatsunori Kanai , Hiroshi Yao
发明人： Kenichiro Yoshii , Tatsunori Kanai , Hiroshi Yao
IPC分类号： G06F13/24
CPC分类号： G06F21/575 , G06F9/45537 , G06F9/4812
摘要： A device control apparatus includes a processor that operates according to software, a storage unit that stores privileged software which manages an interrupt to the processor from a device included in the device control apparatus, an OS storage unit that stores an Operation System for calling the privileged software from the storage unit when an interrupt from the device is detected during an execution of the software, a detecting unit that detects an interrupt to the Operation System from the device while the Operation System is operating on the processor, a judging unit that judges whether the Operation System has called the privileged software from the storage unit in a first predetermined time from detection of the interrupt to the Operation System from the device, and a resetting unit that resets the processor when the judging unit judges that the Operation System has not called the privileged software from the storage unit.
摘要翻译：一种设备控制装置，包括根据软件进行操作的处理器，存储单元，其存储从包含在所述设备控制装置中的设备向所述处理器管理中断的特许软件; OS存储单元，其存储用于呼叫所述特权的操作系统在软件执行期间检测到来自设备的中断时来自存储单元的软件;检测单元，其在所述操作系统在所述处理器上操作时从所述设备检测到所述操作系统的中断;判断单元，其判断是否所述操作系统在从所述设备检测到所述中断到所述操作系统的第一预定时间中从所述存储单元中调用所述特权软件;以及复位单元，当所述判断单元判断所述操作系统未被调用时，复位所述处理器来自存储单元的特权软件。

5. 发明授权

US07383348B2 Data transfer scheme using caching technique for reducing network load 失效
标题翻译：数据传输方案采用缓存技术减少网络负载
公开(公告)号：US07383348B2
公开(公告)日：2008-06-03
申请号：US10167413
申请日：2002-06-13
申请人： Toshibumi Seki , Tatsunori Kanai , Kenichiro Yoshii , Hideki Yoshida , Haruhiko Toyama , Hideaki Sato , Yasuhiro Kimura , Takayuki Miyazawa
发明人： Toshibumi Seki , Tatsunori Kanai , Kenichiro Yoshii , Hideki Yoshida , Haruhiko Toyama , Hideaki Sato , Yasuhiro Kimura , Takayuki Miyazawa
IPC分类号： G06F15/16
CPC分类号： H04L67/2819 , H04L29/06 , H04L67/2828 , H04L67/288 , H04L69/329
摘要： In a data transfer scheme using a caching technique and/or a compression technique which is capable of reducing the network load of a network connecting between data transfer devices, correspondences between data and their names are registered at the data transfer devices and the corresponding names are transferred, instead of transferring the data, for those data for which the correspondences are registered, so that it is possible to reduce the amount of transfer data among the data transfer devices. Server side data transfer devices and client side data transfer devices can be provided in multiple-to-one, one-to-multiple, or multiple-to-multiple manners.
摘要翻译：在使用缓存技术和/或压缩技术的数据传输方案中，能够减少在数据传输设备之间连接的网络的网络负载，数据和它们的名称之间的对应关系被登记在数据传输设备上，并且相应的名称是而是传送数据，而不是传送数据，对于其对应被登记的那些数据，使得可以减少数据传送装置之间的传送数据量。服务器端数据传输设备和客户端数据传输设备可以以多对一，一对多或多对多的方式提供。

6. 发明申请

US20070221724A1 Access control apparatus, access control system, processor, access control method, memory access control apparatus, memory access control system, and memory access control method 失效
标题翻译：访问控制装置，访问控制系统，处理器，访问控制方法，存储器访问控制装置，存储器访问控制系统和存储器访问控制方法
公开(公告)号：US20070221724A1
公开(公告)日：2007-09-27
申请号：US11523003
申请日：2006-09-19
申请人： Tatsunori Kanai , Kenichiro Yoshii
发明人： Tatsunori Kanai , Kenichiro Yoshii
IPC分类号： G06K5/00 , G06K7/00
CPC分类号： G06F12/1466 , G06F11/1016 , G06F12/1408 , G06F21/79
摘要： An access control apparatus includes a writer syndrome generator that generates a writer syndrome of writer mask data to mask the parity-added data, the writer syndrome being associated with a writer access ID used when a writer that requests writing of the write data in the memory accesses the memory; a write mask generator that generates the writer mask data based on the writer syndrome, the writer access ID, and a write address in the memory at which the writer writes the write data; a first XOR calculator that obtains first post-operation data by calculating an XOR between the parity-added data and the writer mask data; and a write address converter that converts the write address into another address determined by the writer access ID.
摘要翻译：一种访问控制装置，包括：写入器校验发生器，其生成写入器掩码数据的写入器校验器以掩蔽奇偶校验相加数据;写入器校验器与写入器访问ID相关联，当写入器请求写入数据到存储器中时访问内存写入掩码生成器，其基于写入器综合符，写入器访问ID和写入器写入写入数据的存储器中的写入地址生成写入器掩模数据; 第一XOR计算器，通过计算奇偶校验相加数据和写入器掩码数据之间的异或来获得第一后操作数据; 以及将写入地址转换成由写入器访问ID确定的另一地址的写入地址转换器。

7. 发明授权

US08495651B2 Method and system for performing real-time operation including plural chained tasks using plural processors 失效
标题翻译：用于使用多个处理器执行包括多个链接任务的实时操作的方法和系统
公开(公告)号：US08495651B2
公开(公告)日：2013-07-23
申请号：US10895040
申请日：2004-07-21
申请人： Tatsunori Kanai , Seiji Maeda , Hirokuni Yano , Kenichiro Yoshii
发明人： Tatsunori Kanai , Seiji Maeda , Hirokuni Yano , Kenichiro Yoshii
IPC分类号： G06F9/46
CPC分类号： G06F9/45537 , G06F9/4887 , G06F9/5066
摘要： An information processing system periodically performs a real-time operation including a plurality of chained tasks. The system includes a plurality of processors, a unit for dividing the chained tasks into a first task group and a second task group based on a relationship in order of execution among the tasks, the second task group being executed after the first task group, and a unit for performing a scheduling operation of periodically assigning each of the first task group and the second task group to at least one of the processors to periodically execute the first task group at regular time intervals and periodically execute the second task group at the regular time intervals with a one-period delay relative to the first task group.
摘要翻译：信息处理系统周期性地执行包括多个链接任务的实时操作。该系统包括多个处理器，用于基于在任务之间的执行顺序的关系将链接任务划分为第一任务组和第二任务组的单元，在第一任务组之后执行的第二任务组，以及用于执行将所述第一任务组和所述第二任务组中的每一个周期性地分配给所述处理器中的至少一个的调度操作的单元，以定期的时间间隔周期性地执行所述第一任务组，并且以规则时间周期性地执行所述第二任务组间隔相对于第一个任务组具有一个周期的延迟。

8. 发明授权

US08171477B2 Method and system for performing real-time operation 有权
标题翻译：执行实时操作的方法和系统
公开(公告)号：US08171477B2
公开(公告)日：2012-05-01
申请号：US12172285
申请日：2008-07-14
申请人： Tatsunori Kanai , Seiji Maeda , Kenichiro Yoshii , Hirokuni Yano
发明人： Tatsunori Kanai , Seiji Maeda , Kenichiro Yoshii , Hirokuni Yano
IPC分类号： G06F9/46
CPC分类号： G06F9/4881 , G06F9/5066
摘要： An information processing system performs a real-time operation including a combination of a plurality of tasks. The system includes a plurality of processors, a unit which stores structural description information and a plurality of programs describing procedures corresponding to the tasks, the structural description information indicating a relationship in input/output between the programs and including cost information concerning time required for executing each of the programs, a unit which determines an execution start timing and execution term of each of a plurality of threads for execution of the programs based on the structural description information, and a unit which performs a scheduling operation of assigning the threads to at least one of the processors according to a result of the determining.
摘要翻译：信息处理系统执行包括多个任务的组合的实时操作。该系统包括多个处理器，存储结构描述信息的单元和描述与任务相对应的过程的多个程序，表示程序之间的输入/输出中的关系的结构性描述信息，并且包括关于执行所需时间的成本信息每个程序，基于结构描述信息确定用于执行程序的多个线程中的每一个的执行开始时间和执行项的单元，以及执行将线程分配至少的调度操作的单元根据确定的结果，处理器中的一个。

9. 发明授权

US08060925B2 Processor, memory, computer system, and method of authentication 有权
标题翻译：处理器，内存，计算机系统和验证方法
公开(公告)号：US08060925B2
公开(公告)日：2011-11-15
申请号：US11508935
申请日：2006-08-24
申请人： Kenichiro Yoshii , Tatsunori Kanai
发明人： Kenichiro Yoshii , Tatsunori Kanai
IPC分类号： G06F15/16
CPC分类号： G06F12/1466 , G06F21/445 , G06F21/57 , G06F2221/2129
摘要： A processor communicating with a first memory configured to store first information and first data, and communicating with a second memory configured to store second information and second data, includes a computing unit configured to perform computation using the first data and the second data; an storing unit configured integrally with the computing unit to store first authentication information and second authentication information; a reading unit configured to read out the first information and the second information; an authenticating unit configured to authenticate the first memory by comparing the first information and the first authentication information, and to authenticate the second memory by comparing the second information and the second authentication information; and an controlling unit configured to control an access of the computing unit to the first memory and the second memory based on a result of the authentications.
摘要翻译：与被配置为存储第一信息和第一数据的第一存储器通信并与被配置为存储第二信息和第二数据的第二存储器通信的处理器包括被配置为使用第一数据和第二数据执行计算的计算单元; 存储单元，与所述计算单元一体地配置以存储第一认证信息和第二认证信息; 读取单元，被配置为读出第一信息和第二信息; 认证单元，被配置为通过比较第一信息和第一认证信息来认证第一存储器，并且通过比较第二信息和第二认证信息来认证第二存储器; 以及控制单元，被配置为基于所述认证的结果来控制所述计算单元对所述第一存储器和所述第二存储器的访问。

10. 发明授权

US07971014B2 Information processing apparatus and data recovering method 失效
标题翻译：信息处理装置和数据恢复方法
公开(公告)号：US07971014B2
公开(公告)日：2011-06-28
申请号：US12198473
申请日：2008-08-26
申请人： Kenichiro Yoshii , Hiroshi Yao , Tomohide Jokan , Tatsunori Kanai
发明人： Kenichiro Yoshii , Hiroshi Yao , Tomohide Jokan , Tatsunori Kanai
IPC分类号： G06F12/16 , G06F13/00
CPC分类号： G06F11/1441 , G06F11/141
摘要： In an information processing apparatus, when an instruction is issued to write back storage contents of a main memory unit that is non-volatile, data and a write destination address included in a backup data that is set with a read permission are extracted from the backup data stored in a backup memory unit that is non-volatile. Further, according to the data and the write destination address extracted from the backup data, the data is written to a storage area of the main-memory unit indicated by the write destination address.
摘要翻译：在信息处理装置中，当发出写入非易失性的主存储单元的存储内容的指令时，从备份中提取包含在具有读取许可的设置的备份数据中的数据和写入目的地地址存储在非易失性的备份存储单元中的数据。此外，根据从备份数据提取的数据和写入目的地地址，将数据写入由写入目的地址指示的主存储单元的存储区域。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式