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1. 发明授权

US06727026B2 Semiconductor integrated circuit patterns 失效
标题翻译：半导体集成电路模式
公开(公告)号：US06727026B2
公开(公告)日：2004-04-27
申请号：US09815004
申请日：2001-03-23
申请人： Tatsuaki Kuji , Koji Hashimoto , Satoshi Usui , Shigeki Nojima
发明人： Tatsuaki Kuji , Koji Hashimoto , Satoshi Usui , Shigeki Nojima
IPC分类号： G03F900
CPC分类号： G03F1/36 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： In a method of designing patterns of a semiconductor integrated circuit, the shape of each of a plurality of opening patterns formed by a plurality of contact holes is formed into a rectangular shape; and the contact holes are arranged in such a manner that a long side of each of the rectangular opening patterns is opposite to a long side of an adjacent rectangular opening pattern, and the positions of both ends of the long sides are trued up. Furthermore, a photomask is used for manufacturing a semiconductor integrated circuit as designed by the above method of designing patterns of a semiconductor integrated circuit, in which a plurality of rectangular opening patterns are provided thereon as a plurality of rectangular opening patterns for contact holes; and the a plurality of rectangular opening patterns are arranged in such a manner that adjacent long sides thereof are opposite to each other, and the position of both ends of each long side is trued up. Besides, a semiconductor device comprises a semiconductor integrated circuit designed by using a method of designing a semiconductor integrated circuit.
摘要翻译：在设计半导体集成电路的图案的方法中，由多个接触孔形成的多个开口图案中的每一个的形状形成为矩形; 并且接触孔被布置成使得每个矩形开口图案的长边与相邻的矩形开口图案的长边相对，并且长边的两端的位置被修整。此外，光掩模用于制造半导体集成电路，如上述设计的半导体集成电路的图案的方法所设计的，其中多个矩形开口图案设置在其上，作为用于接触孔的多个矩形开口图案; 并且多个矩形开口图案被布置成使得其相邻的长边彼此相对，并且每个长边的两端的位置被修整。此外，半导体器件包括通过使用设计半导体集成电路的方法设计的半导体集成电路。

2. 发明授权

US07498630B2 Nonvolatile semiconductor memory 失效
标题翻译：非易失性半导体存储器
公开(公告)号：US07498630B2
公开(公告)日：2009-03-03
申请号：US11559785
申请日：2006-11-14
申请人： Masayuki Ichige , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
发明人： Masayuki Ichige , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
IPC分类号： H01L29/76
CPC分类号： H01L27/11521 , G11C16/0483 , H01L27/0207 , H01L27/115 , H01L27/11519 , H01L27/11524
摘要： A nonvolatile semiconductor memory which is configured to include a plurality of word lines disposed in a row direction; a plurality of bit lines disposed in a column direction perpendicular to the word lines; memory cell transistors having a charge storage layer, provided in the column direction and an electronic storage condition of the memory cell transistor configured to be controlled by one of the plurality of the word lines connected to the memory cell; a plurality of first select transistors, each including a gate electrode, selecting the memory cell transistors provided in the column direction, arranged in the column direction and adjacent to the memory cell transistors at a first end of the memory cell transistors; and a first select gate line connected to each of the gate electrodes of the first select transistors.
摘要翻译：一种非易失性半导体存储器，被配置为包括沿行方向布置的多个字线; 沿垂直于字线的列方向布置的多个位线; 具有沿列方向设置的电荷存储层的存储单元晶体管和存储单元晶体管的电子存储状态，其被配置为由连接到存储单元的多条字线之一控制; 多个第一选择晶体管，每个包括栅极，选择沿列方向设置的存储单元晶体管，其布置在存储单元晶体管的第一端处并与存储单元晶体管相邻; 以及连接到第一选择晶体管的每个栅电极的第一选择栅极线。

3. 发明申请

US20050099847A1 Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems 有权
公开(公告)号：US20050099847A1
公开(公告)日：2005-05-12
申请号：US11008531
申请日：2004-12-10
申请人： Masayuki Ichige , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
发明人： Masayuki Ichige , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
IPC分类号： G11C16/00 , G06K17/00 , G06K19/077 , G11C11/34 , G11C14/00 , G11C16/02 , G11C16/04 , G11C16/06 , H01L21/82 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , G11C16/0483 , H01L27/0207 , H01L27/115 , H01L27/11519 , H01L27/11524
摘要： A nonvolatile semiconductor memory which is configured to include a plurality of word lines disposed in a row direction; a plurality of bit lines disposed in a column direction perpendicular to the word lines; memory cell transistors having a charge storage layer, provided in the column direction and an electronic storage condition of the memory cell transistor configured to be controlled by one of the plurality of the word lines connected to the memory cell; a plurality of first select transistors, each including a gate electrode, selecting the memory cell transistors provided in the column direction, arranged in the column direction and adjacent to the memory cell transistors at a first end of the memory cell transistors; and a first select gate line connected to each of the gate electrodes of the first select transistors.

4. 发明授权

US06845042B2 Nonvolatile semiconductor memory, fabrication method for the same, semiconductor integrated circuits and systems 失效
标题翻译：非易失性半导体存储器，其制造方法，半导体集成电路和系统
公开(公告)号：US06845042B2
公开(公告)日：2005-01-18
申请号：US10359216
申请日：2003-02-06
申请人： Masayuki Ichige , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
发明人： Masayuki Ichige , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
IPC分类号： G11C16/00 , G06K17/00 , G06K19/077 , G11C11/34 , G11C14/00 , G11C16/02 , G11C16/04 , G11C16/06 , H01L21/82 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , G11C16/0483 , H01L27/0207 , H01L27/115 , H01L27/11519 , H01L27/11524
摘要： A nonvolatile semiconductor memory which is configured to include a plurality of word lines disposed in a row direction; a plurality of bit lines disposed in a column direction perpendicular to the word lines; memory cell transistors having a charge storage layer, provided in the column direction and an electronic storage condition of the memory cell transistor configured to be controlled by one of the plurality of the word lines connected to the memory cell; a plurality of first select transistors, each including a gate electrode, selecting the memory cell transistors provided in the column direction, arranged in the column direction and adjacent to the memory cell transistors at a first end of the memory cell transistors; and a first select gate line connected to each of the gate electrodes of the first select transistors.
摘要翻译：一种非易失性半导体存储器，被配置为包括沿行方向布置的多个字线; 沿垂直于字线的列方向布置的多个位线; 具有沿列方向设置的电荷存储层的存储单元晶体管和存储单元晶体管的电子存储状态，其被配置为由连接到存储单元的多条字线之一控制; 多个第一选择晶体管，每个包括栅极，选择沿列方向设置的存储单元晶体管，其布置在存储单元晶体管的第一端处并与存储单元晶体管相邻; 以及连接到第一选择晶体管的每个栅电极的第一选择栅极线。

5. 发明申请

US20070070708A1 NONVOLATILE SEMICONDUCTOR MEMORY, FABRICATION METHOD FOR THE SAME, SEMICONDUCTOR INTEGRATED CIRCUITS AND SYSTEMS 失效
标题翻译：非线性半导体存储器，其制造方法，半导体集成电路和系统
公开(公告)号：US20070070708A1
公开(公告)日：2007-03-29
申请号：US11559785
申请日：2006-11-14
申请人： Masayuki ICHIGE , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
发明人： Masayuki ICHIGE , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
IPC分类号： G11C16/04
CPC分类号： H01L27/11521 , G11C16/0483 , H01L27/0207 , H01L27/115 , H01L27/11519 , H01L27/11524
摘要： A nonvolatile semiconductor memory which is configured to include a plurality of word lines disposed in a row direction; a plurality of bit lines disposed in a column direction perpendicular to the word lines; memory cell transistors having a charge storage layer, provided in the column direction and an electronic storage condition of the memory cell transistor configured to be controlled by one of the plurality of the word lines connected to the memory cell; a plurality of first select transistors, each including a gate electrode, selecting the memory cell transistors provided in the column direction, arranged in the column direction and adjacent to the memory cell transistors at a first end of the memory cell transistors; and a first select gate line connected to each of the gate electrodes of the first select transistors.
摘要翻译：一种非易失性半导体存储器，被配置为包括沿行方向布置的多个字线; 沿垂直于字线的列方向布置的多个位线; 具有沿列方向设置的电荷存储层的存储单元晶体管和存储单元晶体管的电子存储状态，其被配置为由连接到存储单元的多条字线之一控制; 多个第一选择晶体管，每个包括栅极，选择沿列方向设置的存储单元晶体管，其布置在存储单元晶体管的第一端处并与存储单元晶体管相邻; 以及连接到第一选择晶体管的每个栅电极的第一选择栅极线。

6. 发明授权

US07141474B2 Fabrication method of a nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器的制造方法
公开(公告)号：US07141474B2
公开(公告)日：2006-11-28
申请号：US11008531
申请日：2004-12-10
申请人： Masayuki Ichige , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
发明人： Masayuki Ichige , Koji Hashimoto , Tatsuaki Kuji , Seiichi Mori , Riichiro Shirota , Yuji Takeuchi , Koji Sakui
IPC分类号： H01L21/336
CPC分类号： H01L27/11521 , G11C16/0483 , H01L27/0207 , H01L27/115 , H01L27/11519 , H01L27/11524
摘要： A method of fabricating a nonvolatile semiconductor memory including the steps of: sequentially forming a gate insulating layer and a first conductive layer of a floating gate on a semiconductor substrate; depositing an inter-gate insulating layer; forming an opening in a part of the inter-gate insulating layer; depositing a control gate electrode on the inter-gate insulating layer and an exposed portion of the first conductive layer by the opening; and forming the gate electrodes of the memory cell transistors and the gate electrodes of the select transistors by utilizing the etching processes of the control gate electrode, the inter-gate insulating layer and the first conductive layer, wherein the select transistors include at least a part of the exposed portion of the first conductive layer.
摘要翻译：一种制造非易失性半导体存储器的方法，包括以下步骤：在半导体衬底上依次形成栅极绝缘层和浮置栅极的第一导电层; 沉积栅极间绝缘层; 在所述栅极绝缘层的一部分中形成开口; 通过所述开口在所述栅极间绝缘层上沉积控制栅极电极和所述第一导电层的暴露部分; 以及通过利用所述控制栅电极，所述栅极间绝缘层和所述第一导电层的蚀刻工艺，形成所述存储单元晶体管的栅电极和所述选择晶体管的栅电极，其中所述选择晶体管至少包括一部分的第一导电层的暴露部分。

7. 发明申请

US20050068478A1 Liquid crystal display 有权
标题翻译：液晶显示器
公开(公告)号：US20050068478A1
公开(公告)日：2005-03-31
申请号：US10944782
申请日：2004-09-21
申请人： Tatsuaki Kuji
发明人： Tatsuaki Kuji
IPC分类号： G02B5/02 , G02B5/30 , G02F1/1335 , G02F1/139
CPC分类号： G02F1/133504
摘要： A single-domain TN mode liquid crystal display includes an array substrate, an counter substrate, a liquid crystal layer that is includes liquid crystal molecules, polarizer plates, and a diffusion layer that is disposed between a surface of the counter substrate and a surface of the polarizer plate. Inversion of luminance at respective gray levels occurs within four levels of 64 gray levels in a case where an off-axis angle toward a major-axis direction of the liquid crystal molecules relative to a normal of the counter substrate is within 50°.
摘要翻译：单域TN模式液晶显示器包括阵列基板，对置基板，包括液晶分子的液晶层，偏振片和扩散层，该扩散层设置在对置基板的表面和偏光板。在相对于对置基板的法线朝向液晶分子的长轴方向的偏轴角度在50°以内的情况下，在各灰度级的亮度的反转发生在64个灰度级的四个水平内。

8. 发明申请

US20090128749A1 LIQUID CRYSTAL DISPLAY INCLUDING CIRCULAR OR POLYGONAL POLARIZING PLATES EACH WHOSE ABSORPTION AND TRANSMISSION AXES HAVE IMPROVED PRECISION IN DIRECTION 有权
标题翻译：液晶显示器，包括圆形或多极偏振板，每个吸收和传输轴线都有改进的精确度
公开(公告)号：US20090128749A1
公开(公告)日：2009-05-21
申请号：US12267861
申请日：2008-11-10
申请人： Atsuko Oono , Tatsuaki Kuji , Yoshitaka Yamada
发明人： Atsuko Oono , Tatsuaki Kuji , Yoshitaka Yamada
IPC分类号： G02F1/1335
CPC分类号： G02F1/133528 , G02F1/1309 , G02F2001/133638
摘要： A peripheral part of a substrate 1A includes a straight line part 1a. Similarly, a peripheral part of a substrate 1B includes a straight line part. A peripheral part of a polarizing plate 2 is formed of a curved part, and includes a straight line part 2a.
摘要翻译：基板1A的周边部分包括直线部分1a。类似地，基板1B的周边部分包括直线部分。偏光板2的周边部分由弯曲部分形成，并且包括直线部分2a。

9. 发明授权

US07079205B2 Liquid crystal display including a diffusion layer for improving gray level inversion 有权
标题翻译：包括用于改善灰度级反转的扩散层的液晶显示器
公开(公告)号：US07079205B2
公开(公告)日：2006-07-18
申请号：US10944782
申请日：2004-09-21
申请人： Tatsuaki Kuji
发明人： Tatsuaki Kuji
IPC分类号： G02F1/1335 , G02B5/02
CPC分类号： G02F1/133504
摘要： A single-domain TN mode liquid crystal display includes an array substrate, an counter substrate, a liquid crystal layer that is includes liquid crystal molecules, polarizer plates, and a diffusion layer that is disposed between a surface of the counter substrate and a surface of the polarizer plate. Inversion of luminance at respective gray levels occurs within four levels of 64 gray levels in a case where an off-axis angle toward a major-axis direction of the liquid crystal molecules relative to a normal of the counter substrate is within 50°.
摘要翻译：单域TN模式液晶显示器包括阵列基板，对置基板，包括液晶分子的液晶层，偏振片和扩散层，该扩散层设置在对置基板的表面和偏光板。在相对于对置基板的法线朝向液晶分子的长轴方向的偏轴角度在50°以内的情况下，在各灰度级的亮度的反转发生在64个灰度级的四个水平内。

10. 发明授权

US07990494B2 Liquid crystal display including circular or polygonal polarizing plates each whose absorption and transmission axes have improved precision in direction 有权
标题翻译：液晶显示器包括圆形或多边形偏振片，其吸收和透射轴的方向精度提高
公开(公告)号：US07990494B2
公开(公告)日：2011-08-02
申请号：US12267861
申请日：2008-11-10
申请人： Atsuko Oono , Tatsuaki Kuji , Yoshitaka Yamada
发明人： Atsuko Oono , Tatsuaki Kuji , Yoshitaka Yamada
IPC分类号： G02F1/1335
CPC分类号： G02F1/133528 , G02F1/1309 , G02F2001/133638
摘要： A peripheral part of a substrate 1A includes a straight line part 1a. Similarly, a peripheral part of a substrate 1B includes a straight line part. A peripheral part of a polarizing plate 2 is formed of a curved part, and includes a straight line part 2a.
摘要翻译：基板1A的周边部分包括直线部分1a。类似地，基板1B的周边部分包括直线部分。偏光板2的周边部分由弯曲部分形成，并且包括直线部分2a。

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