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    • 2. 发明授权
    • Synchronous semiconductor memory device capable of selecting column at high speed
    • 能够高速选择色谱柱的同步半导体存储器件
    • US06243320B1
    • 2001-06-05
    • US09265856
    • 1999-03-11
    • Takeshi HamamotoZenya KawaguchiMotoko Hara
    • Takeshi HamamotoZenya KawaguchiMotoko Hara
    • G11C800
    • G11C7/1072G11C8/18
    • A command decoder receives an externally supplied command independently of an internal clock signal, decodes the command, generates a column access mode instruction signal, and activates a column address activation signal when the internal clock signal rises. An internal column address signal generating circuit generates an internal column address signal from an externally supplied address signal according to the column address activation signal. Accordingly, the internal column address is generated at an advanced timing to enable a following column selecting operation to be started at a faster timing. A synchronous semiconductor memory device capable of performing the column selecting operation at a high speed is thus provided.
    • 命令解码器独立于内部时钟信号接收外部提供的命令,解码该命令,产生列存取模式指令信号,并且当内部时钟信号上升时激活列地址激活信号。 内部列地址信号发生电路根据列地址激活信号从外部提供的地址信号产生内部列地址信号。 因此,在高级定时产生内部列地址,以使得能够以更快的定时开始以下列选择操作。 因此提供了能够高速执行列选择操作的同步半导体存储器件。
    • 3. 发明授权
    • Buffer circuit capable of correctly transferring small amplitude signal in synchronization with high speed clock signal
    • 缓冲电路能够与高速时钟信号同步正确传送小振幅信号
    • US06603817B1
    • 2003-08-05
    • US09531504
    • 2000-03-21
    • Takeshi HamamotoZenya Kawaguchi
    • Takeshi HamamotoZenya Kawaguchi
    • H03H730
    • G11C7/065
    • Complementary signals on a pair of first signal lines are transferred onto a pair of second signal lines in synchronization with a clock signal by a buffer circuit. The buffer circuit includes an equalize circuit to equalize a pair of internal nodes to a prescribed potential, a transfer gate circuit activated, when the equalize circuit completes equalization, to couple the pair of first signal lines and the pair of internal nodes, an amplifier circuit to differentially amplify the signals on the internal nodes when the transfer gate completes the transfer operation, an output transfer circuit to transmit the signals on the pair of internal nodes onto the pair of second signal lines in synchronization with the clock signal, and a control circuit to control the operation of the equalize circuit, the transfer gate circuit and the amplifier circuit. After the pair of internal nodes is equalized to the prescribed potential, the signals from the pair of first signal lines are received and amplified. Even if the signals are small amplitude signals, therefore, they can be correctly amplified and transferred in synchronization with the clock signal without destroying the signal amplitude.
    • 一对第一信号线上的互补信号通过缓冲电路与时钟信号同步地传送到一对第二信号线上。 缓冲电路包括均衡电路,以将一对内部节点均衡到规定电位,当均衡电路完成均衡时,传输门电路被激活,耦合该对第一信号线和一对内部节点,放大器电路 当传输门完成传送操作时,差分地放大内部节点上的信号;输出传送电路,用于与时钟信号同步地将一对内部节点上的信号传输到一对第二信号线;以及控制电路 控制均衡电路,传输门电路和放大电路的工作。 在一对内部节点等于规定电位之后,来自该对第一信号线的信号被接收和放大。 因此,即使信号是小振幅信号,也可以与时钟信号同步地进行正确的放大和传输,而不会破坏信号幅度。
    • 7. 发明授权
    • Image sensing apparatus, image capturing method, and program related to face detection
    • 图像感测装置,图像拍摄方法以及与面部检测相关的程序
    • US08208035B2
    • 2012-06-26
    • US12510873
    • 2009-07-28
    • Zenya Kawaguchi
    • Zenya Kawaguchi
    • H04N5/228H04N5/222G06K9/46G06K9/66
    • H04N5/232H04N5/23219
    • An image sensing apparatus comprises an image sensing unit configured to sense an object and generate image data, a face detection unit configured to detect a face region of a person contained in the image data generated by the image sensing unit, and a facial expression determination unit configured to determine a plurality of facial expressions in the face region determined by the face detection unit. When both a first facial expression and a second facial expression are determined, the facial expression determination unit corrects a condition to determine the second facial expression so as to become difficult as compared to the determination condition when the first facial expression is not determined and the second facial expression is determined.
    • 一种图像感测装置,包括被配置为感测对象并生成图像数据的图像感测单元,被配置为检测由图像感测单元生成的图像数据中包含的人物的脸部区域的面部检测单元,以及面部表情确定单元 被配置为确定由面部检测单元确定的面部区域中的多个面部表情。 当确定第一面部表情和第二面部表情两者时,与未确定第一面部表情的确定条件相比,面部表情确定单元校正确定第二面部表情的条件以使其变得困难,并且第二面部表情 确定面部表情。
    • 9. 发明申请
    • Image capturing apparatus, control method therefor, program, and storage medium
    • 图像捕获装置,其控制方法,程序和存储介质
    • US20050231628A1
    • 2005-10-20
    • US11095888
    • 2005-03-31
    • Zenya KawaguchiYoshihiro Kobayashi
    • Zenya KawaguchiYoshihiro Kobayashi
    • G02B7/28G03B7/08G03B13/36G06K9/00G06K9/46H04N5/225H04N5/232H04N5/235H04N9/04H04N101/00
    • H04N5/23219G06K9/00255H04N5/23212H04N5/2351H04N5/2352
    • An image capturing apparatus having an auto focus function or an auto exposure function stores digital image data output from an A/D conversion unit as first image data directly or after performing predetermined processing, and stores the digital image data serving as a base of the first image data as second image data after performing predetermined processing for the digital image data. The apparatus then detects a face region from the second image data, and displays the image on the basis of the image data output from the A/D conversion unit while the face region is detected form the second image data. After completion of detection of the face region from the second image data, the apparatus extracts information for auto focus, auto exposure, or white balance by using, of the first image data, data at a portion corresponding to the face region that is detected by said face detection means, and performs auto focus control, auto exposure control, or white balance control.
    • 具有自动对焦功能或自动曝光功能的摄像装置将从A / D转换单元输出的数字图像数据直接作为第一图像数据或在执行预定处理之后,存储用作第一图像的基础的数字图像数据 在对数字图像数据执行预定处理之后,将图像数据作为第二图像数据。 然后,该装置从第二图像数据检测面部区域,并且在从第二图像数据检测到面部区域的同时,基于从A / D转换单元输出的图像数据来显示图像。 在完成从第二图像数据检测到脸部区域之后,该装置通过使用第一图像数据来提取用于自动对焦,自动曝光或白平衡的信息,在与由第一图像数据检测到的面部区域相对应的部分处的数据 所述脸部检测装置进行自动聚焦控制,自动曝光控制或白平衡控制。