专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08969168B2 Method for manufacturing variable resistance element 有权
标题翻译：制造可变电阻元件的方法
公开(公告)号：US08969168B2
公开(公告)日：2015-03-03
申请号：US13809473
申请日：2012-01-30
申请人： Takeki Ninomiya , Yukio Hayakawa , Takumi Mikawa , Takeshi Takagi
发明人： Takeki Ninomiya , Yukio Hayakawa , Takumi Mikawa , Takeshi Takagi
IPC分类号： H01L45/00 , G11C13/00
CPC分类号： H01L45/1641 , G11C13/0007 , H01L45/08 , H01L45/146 , H01L45/1608 , H01L45/1675
摘要： Provided is a method for manufacturing a variable resistance element, the method including: forming a first electrode material layer above a substrate; forming a first tantalum oxide material layer; forming a second tantalum oxide material layer; forming a second electrode material layer; and annealing at least the first tantalum oxide material layer after forming the first tantalum oxide material layer and before forming the second electrode material layer, wherein an oxygen content percentage of one of the first tantalum oxide material layer and the second tantalum oxide material layer is higher than an oxygen content percentage of the other.
摘要翻译：提供一种制造可变电阻元件的方法，该方法包括：在衬底上形成第一电极材料层; 形成第一钽氧化物材料层; 形成第二钽氧化物材料层; 形成第二电极材料层; 以及在形成所述第一钽氧化物材料层之后并且在形成所述第二电极材料层之前至少退火所述第一钽氧化物材料层，其中所述第一钽氧化物材料层和所述第二氧化钽材料层中的一个的氧含量百分比较高比另一个的氧含量百分比。

2. 发明申请

US20130178042A1 METHOD FOR MANUFACTURING VARIABLE RESISTANCE ELEMENT 有权
标题翻译：制造可变电阻元件的方法
公开(公告)号：US20130178042A1
公开(公告)日：2013-07-11
申请号：US13809473
申请日：2012-01-30
申请人： Takeki Ninomiya , Yukio Hayakawa , Takumi Mikawa , Takeshi Takagi
发明人： Takeki Ninomiya , Yukio Hayakawa , Takumi Mikawa , Takeshi Takagi
IPC分类号： H01L45/00
CPC分类号： H01L45/1641 , G11C13/0007 , H01L45/08 , H01L45/146 , H01L45/1608 , H01L45/1675
摘要： Provided is a method for manufacturing a variable resistance element, the method including: forming a first electrode material layer above a substrate; forming a first tantalum oxide material layer; forming a second tantalum oxide material layer; forming a second electrode material layer; and annealing at least the first tantalum oxide material layer after forming the first tantalum oxide material layer and before forming the second electrode material layer, wherein an oxygen content percentage of one of the first tantalum oxide material layer and the second tantalum oxide material layer is higher than an oxygen content percentage of the other.
摘要翻译：提供一种制造可变电阻元件的方法，该方法包括：在衬底上形成第一电极材料层; 形成第一钽氧化物材料层; 形成第二钽氧化物材料层; 形成第二电极材料层; 以及在形成所述第一钽氧化物材料层之后并且在形成所述第二电极材料层之前至少退火所述第一钽氧化物材料层，其中所述第一钽氧化物材料层和所述第二氧化钽材料层中的一个的氧含量百分比较高比另一个的氧含量百分比。

3. 发明申请

US20120327702A1 NONVOLATILE MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储元件和非易失性存储器件
公开(公告)号：US20120327702A1
公开(公告)日：2012-12-27
申请号：US13599286
申请日：2012-08-30
申请人： Takeshi Takagi , Zhiqiang Wei , Takeki Ninomiya , Shunsaku Muraoka , Yoshihiko Kanzawa
发明人： Takeshi Takagi , Zhiqiang Wei , Takeki Ninomiya , Shunsaku Muraoka , Yoshihiko Kanzawa
IPC分类号： H01L45/00 , G11C11/21
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2213/31 , G11C2213/32 , G11C2213/56 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675
摘要： A nonvolatile memory element includes: a first electrode layer; a second electrode layer; and a variable resistance layer which is placed between the electrode layers, and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a polarity of a voltage applied between the electrode layers. The variable resistance layer is formed by stacking a first oxide layer including an oxide of a first transition metal and a second oxide layer including an oxide of a second transition metal which is different from the first transition metal. At least one of the following conditions is satisfied: (1) a dielectric constant of the second oxide layer is larger than a dielectric constant of the first oxide layer; and (2) a band gap of the second oxide layer is smaller than a band gap of the first oxide layer.
摘要翻译：非易失性存储元件包括：第一电极层; 第二电极层; 以及可变电阻层，其设置在电极层之间，并且其电阻状态基于施加在电极层之间的电压的极性而在高电阻状态和低电阻状态之间可逆地变化。可变电阻层通过堆叠包括第一过渡金属的氧化物的第一氧化物层和包含与第一过渡金属不同的第二过渡金属的氧化物的第二氧化物层而形成。满足以下条件中的至少一个：（1）第二氧化物层的介电常数大于第一氧化物层的介电常数; 和（2）第二氧化物层的带隙小于第一氧化物层的带隙。

4. 发明授权

US08405076B2 Nonvolatile memory element 有权
标题翻译：非易失性存储元件
公开(公告)号：US08405076B2
公开(公告)日：2013-03-26
申请号：US12920154
申请日：2010-02-03
申请人： Takeki Ninomiya , Takeshi Takagi , Zhiqiang Wei
发明人： Takeki Ninomiya , Takeshi Takagi , Zhiqiang Wei
IPC分类号： H01L29/12
CPC分类号： H01L45/146 , G11C13/0007 , G11C2213/32 , G11C2213/34 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1625 , H01L45/1675
摘要： A nonvolatile memory element (100) includes a variable resistance layer (107) including a first metal oxide MOx and a second metal oxide MOy, and reaction energy of chemical reaction related to the first metal oxide, the second metal oxide, oxygen ions, and electrons is 2 eV or less. The chemical reaction is expressed by a formula 13, where a combination (MOx, MOy) of MOx and MOy is selected from a group including (Cr2O3, CrO3), (Co3O4, Co2O3), (Mn3O4, Mn2O3), (VO2, V2O5), (Ce2O3, CeO2), (W3O8, WO3), (Cu2O, CuO), (SnO, SnO2), (NbO2, Nb2O5), and (Ti2O3, TiO2). [Mathematical Expression 13] MOx+(y−x)O2−MOy+2(y−x)e− (Formula 13)
摘要翻译：非易失性存储元件（100）包括可变电阻层（107），其包括第一金属氧化物MOx和第二金属氧化物MOy，以及与第一金属氧化物，第二金属氧化物，氧离子和电子为2eV以下。化学反应由式13表示，其中MOx和MOy的组合（MOx，MOy）选自（Cr 2 O 3，CrO 3），（Co 3 O 4，Co 2 O 3），（Mn 3 O 4，Mn 2 O 3），（VO 2，V 2 O 5）），（Ce 2 O 3，CeO 2），（W3O 8，WO 3），（Cu 2 O，CuO），（SnO，SnO 2），（NbO 2，Nb 2 O 5）和（Ti 2 O 3，TiO 2）。 [数学表达式13] MOx +（y-x）O2-MOy + 2（y-x）e-（式13）

5. 发明申请

US20110001109A1 NONVOLATILE MEMORY ELEMENT 有权
标题翻译：非易失性存储元件
公开(公告)号：US20110001109A1
公开(公告)日：2011-01-06
申请号：US12920154
申请日：2010-02-03
申请人： Takeki Ninomiya , Takeshi Takagi , Zhiqiang Wei
发明人： Takeki Ninomiya , Takeshi Takagi , Zhiqiang Wei
IPC分类号： H01L45/00
CPC分类号： H01L45/146 , G11C13/0007 , G11C2213/32 , G11C2213/34 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/1625 , H01L45/1675
摘要： A nonvolatile memory element (100) includes a variable resistance layer (107) including a first metal oxide MOx and a second metal oxide MOy, and reaction energy of chemical reaction related to the first metal oxide, the second metal oxide, oxygen ions, and electrons is 2 eV or less. The chemical reaction is expressed by a formula 13, where a combination (MOx, MOy) of MOx and MOy is selected from a group including (Cr2O3, CrO3), (Co3O4, Co2O3), (Mn3O4, Mn2O3), (VO2, V2O5), (Ce2O3, CeO2), (W3O8, WO3), (Cu2O, CuO), (SnO, SnO2), (NbO2, Nb2O5), and (Ti2O3, TiO2). [Mathematical Expression 13] MOX+(y−x)O2−MOy+2(y−x)e− (Formula 13)
摘要翻译：非易失性存储元件（100）包括可变电阻层（107），其包括第一金属氧化物MOx和第二金属氧化物MOy，以及与第一金属氧化物，第二金属氧化物，氧离子和电子为2eV以下。化学反应由式13表示，其中MOx和MOy的组合（MOx，MOy）选自（Cr 2 O 3，CrO 3），（Co 3 O 4，Co 2 O 3），（Mn 3 O 4，Mn 2 O 3），（VO 2，V 2 O 5）），（Ce 2 O 3，CeO 2），（W3O 8，WO 3），（Cu 2 O，CuO），（SnO，SnO 2），（NbO 2，Nb 2 O 5）和（Ti 2 O 3，TiO 2）。 [数学表达式13] MOX +（y-x）O 2 -Moy + 2（y-x）e-（式13）

6. 发明授权

US08565005B2 Nonvolatile memory element and nonvolatile memory device 有权
标题翻译：非易失性存储器元件和非易失性存储器件
公开(公告)号：US08565005B2
公开(公告)日：2013-10-22
申请号：US13599286
申请日：2012-08-30
申请人： Takeshi Takagi , Zhiqiang Wei , Takeki Ninomiya , Shunsaku Muraoka , Yoshihiko Kanzawa
发明人： Takeshi Takagi , Zhiqiang Wei , Takeki Ninomiya , Shunsaku Muraoka , Yoshihiko Kanzawa
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2213/31 , G11C2213/32 , G11C2213/56 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675
摘要： A nonvolatile memory element includes: a first electrode layer; a second electrode layer; and a variable resistance layer which is placed between the electrode layers, and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a polarity of a voltage applied between the electrode layers. The variable resistance layer is formed by stacking a first oxide layer including an oxide of a first transition metal and a second oxide layer including an oxide of a second transition metal which is different from the first transition metal. At least one of the following conditions is satisfied: (1) a dielectric constant of the second oxide layer is larger than a dielectric constant of the first oxide layer; and (2) a band gap of the second oxide layer is smaller than a band gap of the first oxide layer.
摘要翻译：非易失性存储元件包括：第一电极层; 第二电极层; 以及可变电阻层，其设置在电极层之间，并且其电阻状态基于施加在电极层之间的电压的极性而在高电阻状态和低电阻状态之间可逆地变化。可变电阻层通过堆叠包括第一过渡金属的氧化物的第一氧化物层和包含与第一过渡金属不同的第二过渡金属的氧化物的第二氧化物层而形成。满足以下条件中的至少一个：（1）第二氧化物层的介电常数大于第一氧化物层的介电常数; 和（2）第二氧化物层的带隙小于第一氧化物层的带隙。

7. 发明授权

US08279657B2 Nonvolatile memory element and nonvolatile memory device 有权
标题翻译：非易失性存储器元件和非易失性存储器件
公开(公告)号：US08279657B2
公开(公告)日：2012-10-02
申请号：US12990323
申请日：2009-12-04
申请人： Takeshi Takagi , Zhiqiang Wei , Takeki Ninomiya , Shunsaku Muraoka , Yoshihiko Kanzawa
发明人： Takeshi Takagi , Zhiqiang Wei , Takeki Ninomiya , Shunsaku Muraoka , Yoshihiko Kanzawa
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2213/31 , G11C2213/32 , G11C2213/56 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675
摘要： Provided is a nonvolatile memory element which is capable of performing a stable resistance change operation at a low breakdown voltage.A nonvolatile memory element (100) includes: a first electrode layer (103); a second electrode layer (105); and a variable resistance layer (104) which is placed between the electrodes (103 and 105), and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a polarity of a voltage applied between the electrodes (103 and 105). The variable resistance layer (104) is formed by stacking a first oxide layer (104a) including an oxide of a first transition metal and a second oxide layer (104b) including an oxide of a second transition metal which is different from the first transition metal. At least one of the following conditions is satisfied: (1) a dielectric constant of the second oxide layer (104b) is larger than a dielectric constant of the first oxide layer (104a); and (2) a band gap of the second oxide layer (104b) is smaller than a band gap of the first oxide layer (104a).
摘要翻译：提供一种能够在低击穿电压下进行稳定的电阻变化操作的非易失性存储元件。非易失性存储元件（100）包括：第一电极层（103）; 第二电极层（105）; 和位于电极（103和105）之间的可变电阻层（104），并且其电阻状态基于在电极（103和103）之间施加的电压的极性而在高电阻状态和低电阻状态之间可逆地变化 105）。可变电阻层（104）通过堆叠包括第一过渡金属的氧化物的第一氧化物层（104a）和包含与第一过渡金属不同的第二过渡金属的氧化物的第二氧化物层（104b）。满足以下条件中的至少一个：（1）第二氧化物层（104b）的介电常数大于第一氧化物层（104a）的介电常数; 和（2）第二氧化物层（104b）的带隙小于第一氧化物层（104a）的带隙。

8. 发明申请

US20110051500A1 NONVOLATILE MEMORY ELEMENT AND NONVOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储元件和非易失性存储器件
公开(公告)号：US20110051500A1
公开(公告)日：2011-03-03
申请号：US12990323
申请日：2009-12-04
申请人： Takeshi Takagi , Zhiqiang Wei , Takeki Ninomiya , Shunsaku Muraoka , Yoshihiko Kanzawa
发明人： Takeshi Takagi , Zhiqiang Wei , Takeki Ninomiya , Shunsaku Muraoka , Yoshihiko Kanzawa
IPC分类号： G11C11/21 , G11C11/36 , G11C11/40
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2013/0083 , G11C2213/31 , G11C2213/32 , G11C2213/56 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675
摘要： Provided is a nonvolatile memory element which is capable of performing a stable resistance change operation at a low breakdown voltage.A nonvolatile memory element (100) includes: a first electrode layer (103); a second electrode layer (105); and a variable resistance layer (104) which is placed between the electrodes (103 and 105), and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a polarity of a voltage applied between the electrodes (103 and 105). The variable resistance layer (104) is formed by stacking a first oxide layer (104a) including an oxide of a first transition metal and a second oxide layer (104b) including an oxide of a second transition metal which is different from the first transition metal. At least one of the following conditions is satisfied: (1) a dielectric constant of the second oxide layer (104b) is larger than a dielectric constant of the first oxide layer (104a); and (2) a band gap of the second oxide layer (104b) is smaller than a band gap of the first oxide layer (104a).
摘要翻译：提供一种能够在低击穿电压下进行稳定的电阻变化操作的非易失性存储元件。非易失性存储元件（100）包括：第一电极层（103）; 第二电极层（105）; 和位于电极（103和105）之间的可变电阻层（104），并且其电阻状态基于在电极（103和103）之间施加的电压的极性而在高电阻状态和低电阻状态之间可逆地变化 105）。可变电阻层（104）通过堆叠包括第一过渡金属的氧化物的第一氧化物层（104a）和包含与第一过渡金属不同的第二过渡金属的氧化物的第二氧化物层（104b）。满足以下条件中的至少一个：（1）第二氧化物层（104b）的介电常数大于第一氧化物层（104a）的介电常数; 和（2）第二氧化物层（104b）的带隙小于第一氧化物层（104a）的带隙。

9. 发明授权

US08796660B2 Nonvolatile memory element comprising a resistance variable element and a diode 有权
标题翻译：非易失性存储元件包括电阻可变元件和二极管
公开(公告)号：US08796660B2
公开(公告)日：2014-08-05
申请号：US12375881
申请日：2007-09-21
申请人： Takeshi Takagi , Takumi Mikawa
发明人： Takeshi Takagi , Takumi Mikawa
IPC分类号： H01L29/02 , H01L47/00 , H01L29/04 , H01L29/06 , H01L29/08 , H01L31/0352 , H01L45/00 , H01L27/24 , H01L27/10 , H01L21/00 , G11C11/00
CPC分类号： H01L45/04 , H01L27/101 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L45/1233 , H01L45/1273 , H01L45/146 , H01L45/1683
摘要： A nonvolatile memory element (20) of the present invention comprises a resistance variable element (14) and a diode (18) which are formed on a substrate (10) such that the resistance variable element (14) has a resistance variable layer (11) sandwiched between a lower electrode (12) and an upper electrode (13), and the diode (18) which is connected in series with the resistance variable element (14) in the laminating direction and has an insulating layer or semiconductor layer (15) sandwiched between a first electrode (16) at the lower side and a second electrode (17) at the upper side. The resistance variable layer (11) is embedded in a first contact hole (21) formed on the lower electrode (12). A first area (22) where insulating layer or semiconductor layer (15) of the diode (18) is in contact with a first electrode (16) of the diode (18) is larger than at least one of a second area (23) where the resistance variable layer (11) is in contact with the upper electrode (13) and a third area (24) where the resistance variable layer (11) is in contact with the lower electrode (12).
摘要翻译：本发明的非易失性存储元件（20）包括形成在基板（10）上的电阻可变元件（14）和二极管（18），使得电阻可变元件（14）具有电阻变化层（11 ）和位于下电极（12）和上电极（13）之间的二极管（18），以及与电阻可变元件（14）在层叠方向上串联连接并具有绝缘层或半导体层（15）的二极管）夹在下侧的第一电极（16）和上侧的第二电极（17）之间。电阻变化层（11）嵌入形成在下电极（12）上的第一接触孔（21）中。二极管（18）的绝缘层或半导体层（15）与二极管（18）的第一电极（16）接触的第一区域（22）大于第二区域（23）中的至少一个，其中电阻变化层（11）与上电极（13）接触，电阻变化层（11）与下电极（12）接触的第三区域（24）。

10. 发明授权

US08258493B2 Nonvolatile semiconductor memory apparatus and manufacturing method thereof 有权
标题翻译：非易失性半导体存储装置及其制造方法
公开(公告)号：US08258493B2
公开(公告)日：2012-09-04
申请号：US12515379
申请日：2007-11-13
申请人： Takumi Mikawa , Takeshi Takagi
发明人： Takumi Mikawa , Takeshi Takagi
IPC分类号： H01L29/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/32 , G11C2213/72 , G11C2213/73 , H01L27/0688 , H01L27/112 , H01L27/115 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1683
摘要： A nonvolatile semiconductor memory apparatus (10) of the present invention comprises a substrate (10), lower-layer electrode wires (15) provided on the substrate (11), an interlayer insulating layer (16) which is disposed on the substrate (11) including the lower-layer electrode wires (15) and is provided with contact holes at locations respectively opposite to the lower-layer electrode wires (15), resistance variable layers (18) which are respectively connected to the lower-layer electrode wires (15); and non-ohmic devices (20) which are respectively provided on the resistance variable layers (18) such that the non-ohmic devices are respectively connected to the resistance variable layers (18). The non-ohmic devices (20) each has a laminated-layer structure including plural semiconductor layers, a laminated-layer structure including a metal electrode layer and an insulator layer, or a laminated-layer structure including a metal electrode layer and a semiconductor layer. One layer of the laminated-layer structure is embedded to fill each of the contact holes and the semiconductor layer or the insulator layer which is the other layer of the laminated-layer structure has a larger area than an opening of each of the contact holes and is provided on the interlayer insulating layer (16).
摘要翻译：本发明的非易失性半导体存储装置（10）具备基板（10），设置在基板（11）上的下层电极布线（15），设置在基板（11）上的层间绝缘层（16）），并且在分别与下层电极线（15）相对的位置设置接触孔，电阻变化层（18）分别与下层电极线（15）连接 15）; 和非欧姆器件（20），其分别设置在电阻变化层（18）上，使得非欧姆器件分别连接到电阻变化层（18）。非欧姆装置（20）各自具有包括多个半导体层的层叠层结构，包括金属电极层和绝缘体层的层叠层结构，或者包括金属电极层和半导体层的层叠层结构。嵌入层叠层结构的一层以填充每个接触孔，作为层叠层结构的另一层的半导体层或绝缘体层的面积比每个接触孔的开口大，设置在层间绝缘层（16）上。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式