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    • 5. 发明授权
    • Semiconductor device having fuse and its manufacture method
    • 具有保险丝的半导体器件及其制造方法
    • US07248529B2
    • 2007-07-24
    • US10935426
    • 2004-09-08
    • Takayuki KamiyaMasayoshi Omura
    • Takayuki KamiyaMasayoshi Omura
    • G11C7/00G11C8/00
    • H01L23/5256H01L2924/0002H01L2924/00
    • A semiconductor device has: a fuse having one end applied with a first voltage, and a MOS transistor having source, gate and drain and a connection point between the other end of the fuse and one of the source and drain, a second voltage lower than the first voltage applied to the other of the source and drain, wherein: the first and second voltages, characteristics of the MOS transistor and a resistance of the fuse are selected so that the fuse can be broken down when a predetermined program voltage is applied to the gate; and the resistance of the fuse is set to such a value as a voltage difference between a voltage at the connection point and the second voltage is lower than a drain voltage of the MOS transistor at which a drain current starts saturating, when the program voltage is applied to the gate.
    • 半导体器件具有:具有施加第一电压的一端的熔丝和具有源极,栅极和漏极的MOS晶体管以及熔丝另一端与源极和漏极中的一个之间的连接点,第二电压低于 施加到源极和漏极中的另一个的第一电压,其中:选择第一和第二电压,MOS晶体管的特性和熔丝的电阻,使得当将预定的编程电压施加到 大门; 并且熔断器的电阻被设定为如下值:当连接点和第二电压之间的电压差低于漏极电流开始饱和的MOS晶体管的漏极电压时,当编程电压为 应用于门。
    • 6. 发明申请
    • Capacitor device having low dependency of capacitance value change upon voltage
    • 具有低电容值依赖性的电容器件随电压而变化
    • US20060284227A1
    • 2006-12-21
    • US11453886
    • 2006-06-16
    • Takayuki Kamiya
    • Takayuki Kamiya
    • H01L29/94
    • H01L27/016H01L28/40
    • Capacitors are formed on an insulating film covering the surface of a semiconductor substrate. Each capacitor is constituted of a lower electrode layer of doped silicon, a dielectric film of silicon oxide formed on the lower electrode and an upper electrode layer of polycide formed on the dielectric film. Capacitors are divided into first and second groups. In the first group, the lower electrode layers are interconnected to form a first terminal and the upper electrode layers are interconnected to form a second terminal. In the second group, the upper electrodes are all connected to the first terminal and the lower electrodes are all connected to the second terminal. A capacitor device is provided which mitigates a capacitance value change dependency upon an applied voltage and is easy to be manufactured.
    • 电容器形成在覆盖半导体衬底表面的绝缘膜上。 每个电容器由掺杂硅的下电极层,形成在下电极上的氧化硅的电介质膜和形成在电介质膜上的多晶硅化物的上电极层构成。 电容器分为第一组和第二组。 在第一组中,下部电极层互连形成第一端子,并且上部电极层互连以形成第二端子。 在第二组中,上电极都连接到第一端子,下电极都连接到第二端子。 提供一种电容器装置,其减小了施加电压时的电容值变化依赖性并且易于制造。
    • 7. 发明授权
    • Semiconductor device having fuse and its manufacture method
    • 具有保险丝的半导体器件及其制造方法
    • US06804159B2
    • 2004-10-12
    • US10288493
    • 2002-11-06
    • Takayuki KamiyaMasayoshi Omura
    • Takayuki KamiyaMasayoshi Omura
    • G11C700
    • H01L23/5256H01L2924/0002H01L2924/00
    • A semiconductor device has: a fuse having one end applied with a first voltage, and a MOS transistor having source, gate and drain and a connection point between the other end of the fuse and one of the source and drain, a second voltage lower than the first voltage applied to the other of the source and drain, wherein: the first and second voltages, characteristics of the MOS transistor and a resistance of the fuse are selected so that the fuse can be broken down when a predetermined program voltage is applied to the gate; and the resistance of the fuse is set to such a value as a voltage difference between a voltage at the connection point and the second voltage is lower than a drain voltage of the MOS transistor at which a drain current starts saturating, when the program voltage is applied to the gate.
    • 半导体器件具有:具有施加第一电压的一端的熔丝和具有源极,栅极和漏极的MOS晶体管以及熔丝另一端与源极和漏极中的一个之间的连接点,第二电压低于 施加到源极和漏极中的另一个的第一电压,其中:选择第一和第二电压,MOS晶体管的特性和熔丝的电阻,使得当将预定的编程电压施加到 大门; 并且熔断器的电阻被设定为如下值:当连接点和第二电压之间的电压差低于漏极电流开始饱和的MOS晶体管的漏极电压时,当编程电压为 应用于门。