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1. 发明授权

US07443279B2 Coil package and bias tee package 失效
标题翻译：线圈封装和偏置三通封装
公开(公告)号：US07443279B2
公开(公告)日：2008-10-28
申请号：US11366625
申请日：2006-03-03
申请人： Takatoshi Yagisawa , Tadashi Ikeuchi , Yasuhide Kuroda , Tszshing Cheung
发明人： Takatoshi Yagisawa , Tadashi Ikeuchi , Yasuhide Kuroda , Tszshing Cheung
IPC分类号： H01F27/28 , H03H7/00
CPC分类号： H01F5/00 , H01F27/027 , H01F2005/006 , H01Q1/36 , H01Q19/09 , H05K1/0243
摘要： A coil package which makes it easy to handle a high-frequency cone/pyramid-shaped coil and enhance frequency characteristics without degrading the characteristics of the coil. The cone/pyramid-shaped coil has a conical or pyramidal shape formed by wiring a conductor wire around an outer peripheral surface of a core such that the winding diameter of the coil progressively decreases from one end to the other end of the coil. The coil and a dielectric substrate are integrated with each other by forming a hole for inserting a tip portion of the coil in the dielectric substrate, making the bottom of the hole and a back surface of the dielectric substrate electrically continuous by a via, placing the coil in the hole by directing a small-diameter side of the cone/pyramid-shaped coil to the hole, electrically connecting the bottom of the hole and a tip-side lead wire extending from the coil to each other, and connecting an electrode on a large-diameter side of the coil to an electrode on the dielectric substrate.
摘要翻译：一种线圈封装，使其易于处理高频锥/棱锥形线圈并增强频率特性，而不会降低线圈的特性。锥形/棱锥形线圈具有锥形或棱锥形状，其通过将导体线布置在芯的外周表面上而形成，使得线圈的卷绕直径从线圈的一端逐渐减小到另一端。线圈和电介质基板通过形成用于将线圈的尖端部分插入电介质基板的孔而彼此一体化，使得孔的底部和电介质基板的后表面通过通孔电连续，通过将锥形/锥体形的线圈的小直径侧引导到孔中，将孔的底部电连接到彼此的线圈和从线圈延伸的尖端侧引线，并将电极线圈的大直径侧到电介质基板上的电极。

2. 发明申请

US20070164843A1 Coil package and bias tee package 失效
标题翻译：线圈封装和偏置三通封装
公开(公告)号：US20070164843A1
公开(公告)日：2007-07-19
申请号：US11366625
申请日：2006-03-03
申请人： Takatoshi Yagisawa , Tadashi Ikeuchi , Yasuhide Kuroda , Tszshing Cheung
发明人： Takatoshi Yagisawa , Tadashi Ikeuchi , Yasuhide Kuroda , Tszshing Cheung
IPC分类号： H01F27/02
CPC分类号： H01F5/00 , H01F27/027 , H01F2005/006 , H01Q1/36 , H01Q19/09 , H05K1/0243
摘要： A coil package which makes it easy to handle a high-frequency cone/pyramid-shaped coil and enhance frequency characteristics without degrading the characteristics of the coil. The cone/pyramid-shaped coil has a conical or pyramidal shape formed by wiring a conductor wire around an outer peripheral surface of a core such that the winding diameter of the coil progressively decreases from one end to the other end of the coil. The coil and a dielectric substrate are integrated with each other by forming a hole for inserting a tip portion of the coil in the dielectric substrate, making the bottom of the hole and a back surface of the dielectric substrate electrically continuous by a via, placing the coil in the hole by directing a small-diameter side of the cone/pyramid-shaped coil to the hole, electrically connecting the bottom of the hole and a tip-side lead wire extending from the coil to each other, and connecting an electrode on a large-diameter side of the coil to an electrode on the dielectric substrate.
摘要翻译：一种线圈封装，使其易于处理高频锥/棱锥形线圈并增强频率特性，而不会降低线圈的特性。锥形/棱锥形线圈具有锥形或棱锥形状，其通过将导体线布置在芯的外周表面上而形成，使得线圈的卷绕直径从线圈的一端逐渐减小到另一端。线圈和电介质基板通过形成用于将线圈的尖端部分插入电介质基板的孔而彼此一体化，使得孔的底部和电介质基板的后表面通过通孔电连续，通过将锥形/锥体形的线圈的小直径侧引导到孔中，将孔的底部电连接到彼此的线圈和从线圈延伸的尖端侧引线，并将电极线圈的大直径侧到电介质基板上的电极。

3. 发明授权

US07696628B2 Relay substrate and substrate assembly 有权
标题翻译：继电器基板和基板组件
公开(公告)号：US07696628B2
公开(公告)日：2010-04-13
申请号：US12010878
申请日：2008-01-30
申请人： Tadashi Ikeuchi , Takatoshi Yagisawa , Tszshing Cheung
发明人： Tadashi Ikeuchi , Takatoshi Yagisawa , Tszshing Cheung
IPC分类号： H01L23/48
CPC分类号： H01P1/047 , H01L24/73 , H01L2224/48091 , H01L2924/12041 , H01L2924/14 , H01L2924/15787 , H05K1/0219 , H05K1/117 , H05K1/141 , H05K1/147 , H05K2201/09618 , H05K2201/09727 , H05K2201/10121 , H05K2201/10446 , H01L2924/00014 , H01L2924/00
摘要： According to an aspect of an embodiment, a substrate for connecting circuit boards comprises: a substrate member having a first surface and a second surface facing each other and a first end and a second end facing each other; a first signal line formed on the first surface of the first end; a second signal line formed on the second surface of the second end; a third signal line connecting the first signal line with the second signal line; a first ground plane arranged on the first surface and surrounding the first signal line; and a portion of the second signal line formed over the first ground, the portion comprising narrower than an other portion of the second signal line.
摘要翻译：根据实施例的一个方面，一种用于连接电路板的基板包括：具有彼此面对的第一表面和第二表面以及彼此相对的第一端和第二端的基板构件; 形成在第一端的第一表面上的第一信号线; 形成在第二端的第二表面上的第二信号线; 连接所述第一信号线与所述第二信号线的第三信号线; 布置在第一表面上并围绕第一信号线的第一接地平面; 以及形成在第一接地上的第二信号线的一部分，该部分包括比第二信号线的另一部分窄的部分。

4. 发明申请

US20090029570A1 Relay substrate and substrate assembly 有权
标题翻译：继电器基板和基板组件
公开(公告)号：US20090029570A1
公开(公告)日：2009-01-29
申请号：US12010878
申请日：2008-01-30
申请人： Tadashi Ikeuchi , Takatoshi Yagisawa , Tszshing Cheung
发明人： Tadashi Ikeuchi , Takatoshi Yagisawa , Tszshing Cheung
IPC分类号： H01R12/12
CPC分类号： H01P1/047 , H01L24/73 , H01L2224/48091 , H01L2924/12041 , H01L2924/14 , H01L2924/15787 , H05K1/0219 , H05K1/117 , H05K1/141 , H05K1/147 , H05K2201/09618 , H05K2201/09727 , H05K2201/10121 , H05K2201/10446 , H01L2924/00014 , H01L2924/00
摘要： According to an aspect of an embodiment, a substrate for connecting circuit boards comprises: a substrate member having a first surface and a second surface facing each other and a first end and a second end facing each other; a first signal line formed on the first surface of the first end; a second signal line formed on the second surface of the second end; a third signal line connecting the first signal line with the second signal line; a first ground plane arranged on the first surface and surrounding the first signal line; and a portion of the second signal line formed over the first ground, the portion comprising narrower than an other portion of the second signal line.
摘要翻译：根据实施例的一个方面，用于连接电路板的基板包括：具有彼此面对的第一表面和第二表面的基板构件和彼此面对的第一端和第二端; 形成在第一端的第一表面上的第一信号线; 形成在第二端的第二表面上的第二信号线; 连接所述第一信号线与所述第二信号线的第三信号线; 布置在第一表面上并围绕第一信号线的第一接地平面; 以及形成在第一接地上的第二信号线的一部分，该部分包括比第二信号线的另一部分窄的部分。

5. 发明授权

US07436056B2 Electronic component package 有权
标题翻译：电子元件包装
公开(公告)号：US07436056B2
公开(公告)日：2008-10-14
申请号：US11456870
申请日：2006-07-12
申请人： Tszshing Cheung , Tadashi Ikeuchi , Takatoshi Yagisawa
发明人： Tszshing Cheung , Tadashi Ikeuchi , Takatoshi Yagisawa
IPC分类号： H01L23/04 , H01L23/12
CPC分类号： H01L23/50 , H01L23/10 , H01L23/13 , H01L23/49822 , H01L23/49838 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6616 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/48227 , H01L2224/49175 , H01L2924/00014 , H01L2924/01019 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15174 , H01L2924/15311 , H01L2924/16152 , H01L2924/1617 , H01L2924/19051 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electronic component package includes a dielectric substrate having a first surface where an electronic component is sealed. A first signal line connecting to the electronic component and a first ground conductor are formed on the first surface of the dielectric substrate. A second signal line connected to an outside connection electrode and a second ground conductor are formed on a second surface of the dielectric substrate. The first ground conductor and the second ground conductor are connected by a plurality of ground conductor via-holes. A substrate-buried signal line connected to the first signal line and the second signal line is provided inside of the dielectric substrate so as to be put between the first ground conductor and the second ground conductor above and below and between the ground conductor via-holes on the right and left.
摘要翻译：电子部件封装包括电介质基板，其具有电子部件被密封的第一表面。连接到电子部件的第一信号线和第一接地导体形成在电介质基板的第一表面上。连接到外部连接电极和第二接地导体的第二信号线形成在电介质基板的第二表面上。第一接地导体和第二接地导体通过多个接地导体通孔连接。连接到第一信号线和第二信号线的衬底埋入信号线设置在电介质衬底的内部，以便放置在第一接地导体和第二接地导体之间和之下并且在接地导体通孔之间在右边和左边。

6. 发明申请

US20070241447A1 ELECTRONIC COMPONENT PACKAGE 有权
标题翻译：电子元件包装
公开(公告)号：US20070241447A1
公开(公告)日：2007-10-18
申请号：US11456870
申请日：2006-07-12
申请人： Tszshing Cheung , Tadashi Ikeuchi , Takatoshi Yagisawa
发明人： Tszshing Cheung , Tadashi Ikeuchi , Takatoshi Yagisawa
IPC分类号： H01L23/12
CPC分类号： H01L23/50 , H01L23/10 , H01L23/13 , H01L23/49822 , H01L23/49838 , H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6616 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/48227 , H01L2224/49175 , H01L2924/00014 , H01L2924/01019 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15174 , H01L2924/15311 , H01L2924/16152 , H01L2924/1617 , H01L2924/19051 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： An electronic component package includes a dielectric substrate having a first surface where an electronic component is sealed. A first signal line connecting to the electronic component and a first ground conductor are formed on the first surface of the dielectric substrate. A second signal line connected to an outside connection electrode and a second ground conductor are formed on a second surface of the dielectric substrate. The first ground conductor and the second ground conductor are connected by a plurality of ground conductor via-holes. A substrate-buried signal line connected to the first signal line and the second signal line is provided inside of the dielectric substrate so as to be put between the first ground conductor and the second ground conductor above and below and between the ground conductor via-holes on the right and left.
摘要翻译：电子部件封装包括电介质基板，其具有电子部件被密封的第一表面。连接到电子部件的第一信号线和第一接地导体形成在电介质基板的第一表面上。连接到外部连接电极和第二接地导体的第二信号线形成在电介质基板的第二表面上。第一接地导体和第二接地导体通过多个接地导体通孔连接。连接到第一信号线和第二信号线的衬底埋入信号线设置在电介质衬底的内部，以便放置在第一接地导体和第二接地导体之间和之下并且在接地导体通孔之间在右边和左边。

7. 发明申请

US20100264969A1 PHASE INTERPOLATOR WITH ADAPTIVE DELAY ADJUSTMENT 有权
标题翻译：具有自适应延迟调整的相位插值器
公开(公告)号：US20100264969A1
公开(公告)日：2010-10-21
申请号：US12828779
申请日：2010-07-01
申请人： Tszshing Cheung
发明人： Tszshing Cheung
IPC分类号： H03L7/06
CPC分类号： H03L7/081 , H03K2005/00052 , H03L7/091 , H04L7/0337
摘要： The phase interpolator includes two adjustable delays 30 and 31, phase comparator 32 which detects a phase difference between a signal delayed by the adjustable delay 30 and a signal delayed by the adjustable delay 31, an integrator 33 which integrates the outputs of the phase comparator 32 and multipliers 34-1 and 34-2 which set a control voltage for the adjustable delays 30 and 31. The feedback loop comprising phase comparator 32 and integrator 33 controls a delay amount of the adjustable delay 30 thereby securing a phase relation between {ACK1, ACK2} and ICK to achieve a stable ICK phase.
摘要翻译：相位插值器包括两个可调节延迟30和31，相位比较器32，其检测延迟了可调节延迟30的信号与由可调延迟31延迟的信号之间的相位差;积分器33，其对相位比较器32的输出进行积分以及为可调节延迟30和31设置控制电压的乘法器34-1和34-2。包括相位比较器32和积分器33的反馈回路控制可调节延迟30的延迟量，从而确保{ACK1， ACK2}和ICK以实现稳定的ICK阶段。

8. 发明授权

US08718126B2 Adaptive equalizer and adaptive equalizing method 有权
标题翻译：自适应均衡器和自适应均衡方法
公开(公告)号：US08718126B2
公开(公告)日：2014-05-06
申请号：US12984788
申请日：2011-01-05
申请人： Tszshing Cheung
发明人： Tszshing Cheung
IPC分类号： H03K5/156
CPC分类号： H04B3/06 , H04B3/142
摘要： An adaptive equalizer includes an equalization circuit and an operation number change unit. The equalization circuit includes a plurality of cascade-coupled delay taps. The equalization circuit equalizes an input signal by adding calculation results of the plurality of delay taps. The operation number change unit changes a number of operations of the plurality of delay taps according to an equalization error of the equalization circuit.
摘要翻译：自适应均衡器包括均衡电路和操作数改变单元。均衡电路包括多个级联耦合的延迟抽头。均衡电路通过添加多个延迟抽头的计算结果来均衡输入信号。操作数改变单元根据均衡电路的均衡误差来改变多个延迟抽头的操作次数。

9. 发明授权

US07772898B2 Phase interpolator with adaptive delay adjustment 有权
标题翻译：具有自适应延迟调整的相位插值器
公开(公告)号：US07772898B2
公开(公告)日：2010-08-10
申请号：US11489341
申请日：2006-07-19
申请人： Tszshing Cheung
发明人： Tszshing Cheung
IPC分类号： H03L7/06
CPC分类号： H03L7/081 , H03K2005/00052 , H03L7/091 , H04L7/0337
摘要： The phase interpolator includes two adjustable delays 30 and 31, phase comparator 32 which detects a phase difference between a signal delayed by the adjustable delay 30 and a signal delayed by the adjustable delay 31, an integrator 33 which integrates the outputs of the phase comparator 32 and multipliers 34-1 and 34-2 which set a control voltage for the adjustable delays 30 and 31. The feedback loop comprising phase comparator 32 and integrator 33 controls a delay amount of the adjustable delay 30 thereby securing a phase relation between {ACK1, ACK2} and ICK to achieve a stable ICK phase.
摘要翻译：相位插值器包括两个可调节延迟30和31，相位比较器32，其检测延迟了可调节延迟30的信号与由可调延迟31延迟的信号之间的相位差;积分器33，其对相位比较器32的输出进行积分以及为可调节延迟30和31设置控制电压的乘法器34-1和34-2。包括相位比较器32和积分器33的反馈回路控制可调节延迟30的延迟量，从而确保{ACK1， ACK2}和ICK以实现稳定的ICK阶段。

10. 发明授权

US08183943B2 Oscillator and phase synchronizing circuit 失效
标题翻译：振荡器和相位同步电路
公开(公告)号：US08183943B2
公开(公告)日：2012-05-22
申请号：US12816606
申请日：2010-06-16
申请人： Tszshing Cheung
发明人： Tszshing Cheung
IPC分类号： H03B5/18
CPC分类号： H03B5/1852 , H03L7/099
摘要： When a direct-current voltage is applied from a power supply, a signal line generates a standing wave having the ¾ wavelength where a starting end of the signal line connected to the power supply is used as a node and a terminating end is used as an antinode. Strips are connected to a ground layer through switches, respectively. The switches switch connection and non-connection of the strips and the ground layer, under the control from a switch controller. By switching the connection and non-connection of the switches, the distance between the signal line and the ground layer is pseudo adjusted and the effective permittivity in a transmission line unit changes. Therefore, the frequency of the standing wave can be adjusted.
摘要翻译：当从电源施加直流电压时，信号线产生具有¾波长的驻波，其中连接到电源的信号线的起始端被用作节点，并且终端被用作腹。条带分别通过开关连接到接地层。在开关控制器的控制下，开关开关连接和不连接条和接地层。通过切换开关的连接和不连接，信号线和接地层之间的距离被伪调整，并且传输线单元中的有效介电常数发生变化。因此，能够调整驻波的频率。

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