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    • 1. 发明授权
    • System and method for a self-calibrating input device
    • 自校准输入装置的系统和方法
    • US07098889B2
    • 2006-08-29
    • US10606701
    • 2003-06-26
    • Takashi InuiTetsuji Nakamura
    • Takashi InuiTetsuji Nakamura
    • H03G3/02G09G5/00
    • G06F3/038
    • A device, method, and computer program product for a self-calibrating input device are provided. The input device includes a designated value change unit operable to change a designated value using a variation amount associated with the designated value, the designated value being changed using a predetermined first variation amount when a first designated value change directive is received from an operator, and a variation amount change unit operable to alter the variation amount associated with the designated value from the predetermined first variation amount to a smaller second variation amount when a second designated value change directive that is opposite the first designated value change directive is received from the operator within a predetermined variation amount change period.
    • 提供了一种用于自校准输入设备的设备,方法和计算机程序产品。 所述输入装置包括指定值改变单元,其可操作以使用与所述指定值相关联的变化量来改变指定值,当从操作者接收到第一指定值改变指令时,所述指定值使用预定的第一变化量进行变化;以及 变更量变更单元,用于当从所述操作者接收到与所述第一指定值变更指令相反的第二指定值变更指令时,将与所述指定值相关联的所述变更量从所述预定第一变更量变更为较小的第二变更量 预定变化量变化期间。
    • 8. 发明授权
    • Information processor with suppressed cache coherence in low power mode
    • 信息处理器在低功耗模式下抑制高速缓存一致性
    • US07254727B2
    • 2007-08-07
    • US10730672
    • 2003-12-08
    • Noritoshi YoshiyamaSeiichi KawanoHirohide KomiyamaTetsuji Nakamura
    • Noritoshi YoshiyamaSeiichi KawanoHirohide KomiyamaTetsuji Nakamura
    • G06F1/32G06F1/00
    • G06F12/0888G06F1/3203G06F1/3275G06F12/0835G06F12/0837G06F2212/1028G06F2212/621Y02D10/13Y02D10/14Y02D50/20
    • An information processor having a normal-operation mode in which coherence control is performed for making data in a cache memory of a processor identical to data in a main memory and a power-saving mode in which the coherence control is suppressed to lower the power consumption from power consumption in the normal-operation mode and entering the normal-operation mode when an input/output device accesses the main memory in the power-saving mode includes an attribute setting module for setting a device area of the main memory, accessed by the input/output device of the information processor to a non-cacheable attribute for exempting said device area from said coherence control even in the normal-operation mode; an operation mode setting module for allowing the input/output device to access the device area while keeping the operation mode of the information processor in the power-saving mode when the input/output device requests access to the device area in the power-saving mode.
    • 具有正常操作模式的信息处理器,其中执行相干控制以在与主存储器中的数据相同的处理器的高速缓冲存储器中进行数据,以及抑制相干控制以降低功耗的功率保存模式 当在功率保存模式中输入/输出设备访问主存储器时,从正常操作模式的功率消耗进入正常操作模式,包括用于设置主存储器的设备区域的属性设置模块, 信息处理器的输入/输出设备到不可缓存的属性,即使在正常操作模式下也可以将所述设备区域从所述相干控制中免除; 操作模式设置模块,用于当输入/输出设备在功率保存模式下请求访问设备区域时,允许输入/输出设备访问设备区域,同时保持信息处理器的操作模式处于省电模式 。