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1. 发明授权

US06173334B2 Network system including a plurality of lan systems and an intermediate network having independent address schemes 失效
标题翻译：包括多个lan系统的网络系统和具有独立地址方案的中间网络
公开(公告)号：US06173334B2
公开(公告)日：2001-01-09
申请号：US09166860
申请日：1998-10-06
申请人： Takanori Matsuzaki , Hiroshi Sakurai
发明人： Takanori Matsuzaki , Hiroshi Sakurai
IPC分类号： G06F1300
CPC分类号： H04L29/12367 , H04L12/4604 , H04L29/12009 , H04L29/12424 , H04L61/2514 , H04L61/2535
摘要： A network system is constructed by: a first LAN system having first terminal equipment; a second LAN system having second terminal equipment; an intermediate network to connect the first and second LAN systems; first communication equipment to transfer a packet between the first LAN system and the intermediate network; and second communication equipment to transfer a packet between the second LAN system and the intermediate network. To transfer the packet from the first terminal equipment to the second terminal equipment, the first communication equipment converts an address showing a transmission destination of the packet transmitted from the first terminal equipment from an address defined on the first LAN system to an address defined on the intermediate network and transfers the converted address from the first LAN system to the intermediate network. The second communication equipment converts an address showing the transmission destination of the packet on the intermediate network from the address defined on the intermediate network to an address defined on the second LAN system and transfers the converted address from the intermediate network to the second LAN system.
摘要翻译：网络系统由以下部分构成：具有第一终端设备的第一LAN系统; 具有第二终端设备的第二LAN系统; 连接第一和第二LAN系统的中间网络; 第一通信设备，用于在第一LAN系统和中间网络之间传送分组; 以及用于在第二LAN系统和中间网络之间传送分组的第二通信设备。为了将分组从第一终端设备传送到第二终端设备，第一通信设备将表示从第一终端设备发送的分组的发送目的地的地址从在第一LAN系统上定义的地址转换为并将转换的地址从第一LAN系统传送到中间网络。第二通信设备将表示中间网络上的分组的发送目的地的地址从中间网络上定义的地址转换为在第二LAN系统上定义的地址，并将转换的地址从中间网络传送到第二LAN系统。

2. 发明授权

US08467231B2 Semiconductor device and driving method thereof 有权
标题翻译：半导体装置及其驱动方法
公开(公告)号：US08467231B2
公开(公告)日：2013-06-18
申请号：US13193756
申请日：2011-07-29
申请人： Takanori Matsuzaki , Shuhei Nagatsuka , Hiroki Inoue
发明人： Takanori Matsuzaki , Shuhei Nagatsuka , Hiroki Inoue
IPC分类号： G11C11/24
CPC分类号： G11C16/0408 , G11C11/405 , G11C16/02
摘要： The semiconductor device is formed using a material which allows a sufficient reduction in off-state current of a transistor; for example, an oxide semiconductor material, which is a wide gap semiconductor, is used. When a semiconductor material which allows a sufficient reduction in off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, the timing of potential change in a signal line is delayed relative to the timing of potential change in a write word line. This makes it possible to prevent a data writing error.
摘要翻译：使用允许充分降低晶体管的截止电流的材料形成半导体器件; 例如，使用作为宽间隙半导体的氧化物半导体材料。当使用允许充分降低晶体管的截止电流的半导体材料时，半导体器件可以长时间保存数据。此外，信号线中的电位变化的定时相对于写入字线的电位变化的定时被延迟。这使得可以防止数据写入错误。

3. 发明授权

US08357963B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08357963B2
公开(公告)日：2013-01-22
申请号：US13185965
申请日：2011-07-19
申请人： Kiyoshi Kato , Takanori Matsuzaki
发明人： Kiyoshi Kato , Takanori Matsuzaki
IPC分类号： H01L27/108
CPC分类号： H01L27/11521 , H01L27/108 , H01L27/11524 , H01L27/11551 , H01L27/1156 , H01L27/1225
摘要： A semiconductor device includes a material with which off-state current of a transistor can be sufficiently small; for example, an oxide semiconductor material is used. Further, transistors of memory cells of the semiconductor device, which include an oxide semiconductor material, are connected in series. Further, the same wiring (the j-th word line (j is a natural number greater than or equal to 2 and less than or equal to m)) is used as a wiring electrically connected to one of terminals of a capacitor of the j-th memory cell and a wiring electrically connected to a gate terminal of a transistor, in which a channel is formed in an oxide semiconductor layer, of the (j−1)-th memory cell. Therefore, the number of wirings per memory cell and the area occupied by one memory cell are reduced.
摘要翻译：半导体器件包括晶体管的截止电流足够小的材料; 例如，使用氧化物半导体材料。此外，包括氧化物半导体材料的半导体器件的存储单元的晶体管串联连接。此外，使用相同的布线（第j字线（j为大于等于2且小于等于m的自然数））作为与j的电容器的端子之一电连接的布线第（j-1）个存储单元和与第一第（j-1）个存储单元形成沟道的晶体管的栅极端子电连接的布线。因此，每个存储单元的布线数和一个存储单元占用的面积减少。

4. 发明申请

US20120236621A1 Semiconductor Device 有权
标题翻译：半导体器件
公开(公告)号：US20120236621A1
公开(公告)日：2012-09-20
申请号：US13489628
申请日：2012-06-06
申请人： Takanori Matsuzaki
发明人： Takanori Matsuzaki
IPC分类号： G11C5/06
CPC分类号： H01L27/108 , G11C11/4023 , H01L27/10894
摘要： A semiconductor device including a memory cell is provided. The memory cell comprises a transistor and a capacitor, and one of a resistor and a diode. A gate of the transistor is electrically connected to a word line, and one of a source and a drain of the transistor is electrically connected to a bit line. One terminal of the capacitor is electrically connected to the other of the source and the drain of the transistor, and the other terminal of the capacitor is electrically connected to a wiring. One terminal of one of the resistor and the diode is electrically connected to the other of the source and the drain of the transistor, and the other terminal of one of the resistor and the diode is electrically connected to the wiring.
摘要翻译：提供了包括存储单元的半导体器件。存储单元包括晶体管和电容器，以及电阻器和二极管之一。晶体管的栅极电连接到字线，并且晶体管的源极和漏极中的一个电连接到位线。电容器的一个端子电连接到晶体管的源极和漏极中的另一个，并且电容器的另一个端子电连接到布线。电阻器和二极管中的一个的一个端子电连接到晶体管的源极和漏极中的另一个，并且电阻器和二极管中的一个的另一个端子电连接到布线。

5. 发明授权

US08199551B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08199551B2
公开(公告)日：2012-06-12
申请号：US12570619
申请日：2009-09-30
申请人： Takanori Matsuzaki
发明人： Takanori Matsuzaki
IPC分类号： G11C5/06
CPC分类号： H01L27/108 , G11C11/4023 , H01L27/10894
摘要： A semiconductor device including a memory cell is provided. The memory cell comprises a transistor and a capacitor, and one of a resistor and a diode. A gate of the transistor is electrically connected to a word line, and one of a source and a drain of the transistor is electrically connected to a bit line. One terminal of the capacitor is electrically connected to the other of the source and the drain of the transistor, and the other terminal of the capacitor is electrically connected to a wiring. One terminal of one of the resistor and the diode is electrically connected to the other of the source and the drain of the transistor, and the other terminal of one of the resistor and the diode is electrically connected to the wiring.
摘要翻译：提供了包括存储单元的半导体器件。存储单元包括晶体管和电容器，以及电阻器和二极管之一。晶体管的栅极电连接到字线，并且晶体管的源极和漏极中的一个电连接到位线。电容器的一个端子电连接到晶体管的源极和漏极中的另一个，并且电容器的另一个端子电连接到布线。电阻器和二极管中的一个的一个端子电连接到晶体管的源极和漏极中的另一个，并且电阻器和二极管中的一个的另一个端子电连接到布线。

6. 发明申请

US20120063205A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120063205A1
公开(公告)日：2012-03-15
申请号：US13230093
申请日：2011-09-12
申请人： Takanori Matsuzaki , Shuhei Nagatsuka , Hiroki Inoue
发明人： Takanori Matsuzaki , Shuhei Nagatsuka , Hiroki Inoue
IPC分类号： G11C11/24
CPC分类号： H01L27/1052 , G11C8/08 , G11C11/403 , G11C11/405 , G11C11/4085 , G11C16/02 , G11C16/0433 , G11C16/0483 , G11C16/08 , G11C2211/4016
摘要： A semiconductor device in which stored data can be held even when power is not supplied and there is no limitation on the number of writing operations is provided. A semiconductor device is formed using a material which can sufficiently reduce the off-state current of a transistor, such as an oxide semiconductor material that is a wide-gap semiconductor. When a semiconductor material which can sufficiently reduce the off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, by providing a capacitor or a noise removal circuit electrically connected to a write word line, a signal such as a short pulse or a noise input to a memory cell can be reduced or removed. Accordingly, a malfunction in which data written into the memory cell is erased when a transistor in the memory cell is instantaneously turned on can be prevented.
摘要翻译：即使在不提供电力的情况下也可以保存存储的数据，并且没有限制写入操作的数量的半导体装置。使用可以充分降低诸如作为宽间隙半导体的氧化物半导体材料的晶体管的截止电流的材料形成半导体器件。当使用可以充分降低晶体管的截止电流的半导体材料时，半导体器件可以长期保存数据。此外，通过提供电连接到写字线的电容器或噪声去除电路，可以减少或去除诸如短脉冲或输入到存储器单元的噪声的信号。因此，可以防止当存储单元中的晶体管瞬间导通时擦除写入存储单元的数据的故障。

7. 发明申请

US20120056647A1 SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF 有权
标题翻译：半导体器件及其驱动方法
公开(公告)号：US20120056647A1
公开(公告)日：2012-03-08
申请号：US13221947
申请日：2011-08-31
申请人： Shuhei Nagatsuka , Takanori Matsuzaki , Hiroki Inoue , Kiyoshi Kato
发明人： Shuhei Nagatsuka , Takanori Matsuzaki , Hiroki Inoue , Kiyoshi Kato
IPC分类号： H03K17/00
CPC分类号： G11C11/403 , G11C16/0433 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L27/1156 , H01L27/1225 , H01L29/7869
摘要： The semiconductor device includes a memory cell including a first transistor including a first channel formation region, a first gate electrode, and first source and drain regions; a second transistor including a second channel formation region provided so as to overlap with at least part of either of the first source region or the first drain region, a second source electrode, a second drain electrode electrically connected to the first gate electrode, and a second gate electrode; and an insulating layer provided between the first transistor and the second transistor. In a period during which the second transistor needs in an off state, at least when a positive potential is supplied to the first source region or the first drain region, a negative potential is supplied to the second gate electrode.
摘要翻译：半导体器件包括存储单元，其包括第一晶体管，第一晶体管包括第一沟道形成区，第一栅电极以及第一源区和漏区; 第二晶体管，包括设置成与第一源极区域或第一漏极区域中的至少一部分重叠的第二沟道形成区域，第二源极电极，电连接到第一栅极电极的第二漏极电极，以及第二栅电极; 以及设置在第一晶体管和第二晶体管之间的绝缘层。在第二晶体管需要处于截止状态的期间中，至少当向第一源极区域或第一漏极区域提供正电位时，向第二栅电极提供负电位。

8. 发明申请

US20120033485A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120033485A1
公开(公告)日：2012-02-09
申请号：US13193966
申请日：2011-07-29
申请人： Takanori Matsuzaki , Kiyoshi Kato , Shuhei Nagatsuka , Hiroki Inoue
发明人： Takanori Matsuzaki , Kiyoshi Kato , Shuhei Nagatsuka , Hiroki Inoue
IPC分类号： G11C11/24
CPC分类号： G11C16/0408 , G11C11/405 , G11C11/4076 , G11C11/4087 , H01L27/11521 , H01L27/1156 , H01L27/1207
摘要： In a semiconductor device which includes a bit line, m (m is a natural number of 3 or more) word lines, a source line, m signal lines, first to m-th memory cells, and a driver circuit, the memory cell includes a first transistor and a second transistor for storing electrical charge accumulated in a capacitor, and the second transistor includes a channel formed in an oxide semiconductor layer. In the semiconductor device, the driver circuit generates a signal to be output to a (j−1)th (j is a natural number of 3 or more) signal line with the use of a signal to be output to a j-th signal line.
摘要翻译：在包括位线的m（m为3以上的自然数）字线，源极线，m条信号线，第1〜第m存储器单元和驱动电路的半导体器件中，所述存储单元包括第一晶体管和第二晶体管，用于存储积聚在电容器中的电荷，第二晶体管包括形成在氧化物半导体层中的沟道。在半导体装置中，驱动电路使用要输出到第j信号的信号，生成输出到第（j-1）（j为3以上的自然数）信号线的信号线。

9. 发明授权

US08039782B2 Optical sensor device and electronic apparatus with an amplifier circuit and dual level shift circuit 有权
标题翻译：光电传感器和电子设备，具有放大电路和双电平移位电路
公开(公告)号：US08039782B2
公开(公告)日：2011-10-18
申请号：US11829709
申请日：2007-07-27
申请人： Jun Koyama , Takeshi Osada , Takanori Matsuzaki , Kazuo Nishi , Junya Maruyama
发明人： Jun Koyama , Takeshi Osada , Takanori Matsuzaki , Kazuo Nishi , Junya Maruyama
IPC分类号： H01J40/14
CPC分类号： H01L27/14609 , H01L27/12 , H01L27/14692
摘要： In an optical sensor device employing an amorphous silicon photodiode, an external amplifier IC and the like are required due to low current capacity of the sensor element in order to improve the load driving capacity. It leads to increase in cost and mounting space of the optical sensor device. In addition, noise may easily superimpose since the photodiode and the amplifier IC are connected to each other over a printed circuit board. According to the invention, an amorphous silicon photodiode and an amplifier configured by a thin film transistor are formed integrally over a substrate so that the load driving capacity is improved while reducing cost and mounting space. Superimposing noise can be also reduced.
摘要翻译：在采用非晶硅光电二极管的光学传感器装置中，由于传感器元件的低电流容量需要外部放大器IC等，以提高负载驱动能力。这导致光学传感器装置的成本和安装空间的增加。此外，由于光电二极管和放大器IC在印刷电路板上彼此连接，噪声可能容易地叠加。根据本发明，非晶硅光电二极管和由薄膜晶体管构成的放大器一体地形成在基板上，从而提高负载驱动能力，同时降低成本和安装空间。叠加噪音也可以减少。

10. 发明授权

US07919861B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07919861B2
公开(公告)日：2011-04-05
申请号：US12510603
申请日：2009-07-28
申请人： Takanori Matsuzaki
发明人： Takanori Matsuzaki
IPC分类号： H01L29/40
CPC分类号： H01L23/5225 , H01L23/552 , H01L27/124 , H01L27/13 , H01L29/78624 , H01L29/78633 , H01L2223/6677 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： The invention provides a technology for manufacturing a higher performance and higher reliability semiconductor device at low cost and with high yield. The semiconductor device of the invention has a first conductive layer over a first insulating layer; a second insulating layer over the first conductive layer, which includes an opening extending to the first conductive layer; and a signal wiring layer for electrically connecting an integrated circuit portion to an antenna and a second conductive layer adjacent to the signal wiring layer, which are formed over the second insulating layer. The second conductive layer is in contact with the first conductive layer through the opening, and the first conductive layer overlaps the signal wiring layer with the second insulating layer interposed therebetween.
摘要翻译：本发明提供了以低成本和高产率制造更高性能和更高可靠性的半导体器件的技术。本发明的半导体器件在第一绝缘层上具有第一导电层; 在第一导电层上的第二绝缘层，其包括延伸到第一导电层的开口; 以及用于将集成电路部分电连接到天线的信号布线层和与所述信号布线层相邻的第二导电层，所述第二导电层形成在所述第二绝缘层上。第二导电层通过开口与第一导电层接触，并且第一导电层与信号布线层重叠，其间插入第二绝缘层。

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