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1. 发明授权

US06911837B2 Method and apparatus for evaluating and adjusting microwave integrated circuit 失效
标题翻译：微波集成电路评估与调试方法及装置
公开(公告)号：US06911837B2
公开(公告)日：2005-06-28
申请号：US10893371
申请日：2004-07-19
申请人： Takahide Ishikawa , Yoshitsugu Yamamoto , Tetsuo Kunii , Satoshi Suzuki , Hirotaka Amasuga
发明人： Takahide Ishikawa , Yoshitsugu Yamamoto , Tetsuo Kunii , Satoshi Suzuki , Hirotaka Amasuga
IPC分类号： H01L21/288 , H01L21/3205 , H01L21/48 , H01L21/66 , H01L23/66 , G01R31/26
CPC分类号： H01L22/22 , H01L21/485 , H01L23/66 , H01L2924/0002 , H01L2924/15173 , H01L2924/00
摘要： The present method includes steps of: discharging a droplet of fluid containing fine particles with electric characteristics from an inkjet nozzle onto the microwave integrated circuit formed on a substrate; forming a coat of the fine particles having electric characteristics on the substrate; measuring electric characteristics of the microwave integrated circuit using a probe of a circuit evaluation apparatus before and after forming the coat; and adjusting the electric characteristics of the microwave integrated circuit, so that forming the coat at a desired location on the upper surface of the circuit substrate by scanning an aim of the inkjet nozzle against the circuit substrate enables the microwave integrated circuit to meet the specification.
摘要翻译：本方法包括以下步骤：将含有电特性的细颗粒的液滴从喷墨喷嘴喷射到形成在基板上的微波集成电路上; 在基板上形成具有电特性的微粒的涂层; 使用电路评估装置的探针在形成涂层之前和之后测量微波集成电路的电特性; 并且调整微波集成电路的电特性，使得通过将喷墨喷嘴的目标扫过电路基板而在电路基板的上表面上的期望位置处形成涂层，使得微波集成电路能够满足规格。

2. 发明申请

US20050046435A1 METHOD AND APPARATUS FOR EVALUATING AND ADJUSTING MICROWAVE INTEGRATED CIRCUIT 失效
标题翻译：用于评估和调整微波集成电路的方法和装置
公开(公告)号：US20050046435A1
公开(公告)日：2005-03-03
申请号：US10893371
申请日：2004-07-19
申请人： Takahide Ishikawa , Yoshitsugu Yamamoto , Tetsuo Kunii , Satoshi Suzuki , Hirotaka Amasuga
发明人： Takahide Ishikawa , Yoshitsugu Yamamoto , Tetsuo Kunii , Satoshi Suzuki , Hirotaka Amasuga
IPC分类号： H01L21/288 , H01L21/3205 , H01L21/48 , H01L21/66 , H01L23/66 , H01L29/06
CPC分类号： H01L22/22 , H01L21/485 , H01L23/66 , H01L2924/0002 , H01L2924/15173 , H01L2924/00
摘要： The present method includes steps of: discharging a droplet of fluid containing fine particles with electric characteristics from an inkjet nozzle onto the microwave integrated circuit formed on a substrate; forming a coat of the fine particles having electric characteristics on the substrate; measuring electric characteristics of the microwave integrated circuit using a probe of a circuit evaluation apparatus before and after forming the coat; and adjusting the electric characteristics of the microwave integrated circuit, so that forming the coat at a desired location on the upper surface of the circuit substrate by scanning an aim of the inkjet nozzle against the circuit substrate enables the microwave integrated circuit to meet the specification.
摘要翻译：本方法包括以下步骤：将含有电特性的细颗粒的液滴从喷墨喷嘴喷射到形成在基板上的微波集成电路上; 在基板上形成具有电特性的微粒的涂层; 使用电路评估装置的探针在形成涂层之前和之后测量微波集成电路的电特性; 并且调整微波集成电路的电特性，使得通过将喷墨喷嘴的目标扫过电路基板而在电路基板的上表面上的期望位置处形成涂层，使得微波集成电路能够满足规格。

3. 发明授权

US08232609B2 Semiconductor device including field effect transistor with reduced electric field concentration 有权
标题翻译：包括具有降低的电场浓度的场效应晶体管的半导体器件
公开(公告)号：US08232609B2
公开(公告)日：2012-07-31
申请号：US12828328
申请日：2010-07-01
申请人： Tetsuo Kunii , Hirotaka Amasuga , Yoshitsugu Yamamoto , Youichi Nogami
发明人： Tetsuo Kunii , Hirotaka Amasuga , Yoshitsugu Yamamoto , Youichi Nogami
IPC分类号： H01L29/76
CPC分类号： H01L29/4238 , H01L27/0207 , H01L27/0605 , H01L27/0629 , H01L27/088 , H01L29/0619 , H01L29/402 , H01L29/41758 , H01L29/812
摘要： A semiconductor device includes: a semiconductor substrate; an impurity-doped region at a top surface of the semiconductor substrate; an insulating region located around the impurity-doped region on the top surface of the semiconductor substrate; a gate electrode on the impurity-doped region; a first electrode and a second electrode located on the impurity-doped region, sandwiching the gate electrode; a first pad located on the insulating region and connected to the gate electrode; a second pad facing the first pad across the impurity-doped region, on the insulating region, and connected to the second electrode; and a conductor located between the first electrode and the second pad on the insulating region.
摘要翻译：半导体器件包括：半导体衬底; 在所述半导体衬底的顶表面处的杂质掺杂区域; 绝缘区域，位于半导体衬底的顶表面上的杂质掺杂区域周围; 杂质掺杂区上的栅电极; 位于所述杂质掺杂区域上的第一电极和第二电极，夹着所述栅电极; 位于所述绝缘区域上并连接到所述栅电极的第一焊盘; 在所述绝缘区域上跨越所述杂质掺杂区域面对所述第一焊盘的第二焊盘，并且连接到所述第二电极; 以及位于所述绝缘区域上的所述第一电极和所述第二焊盘之间的导体。

4. 发明申请

US20070132021A1 Semiconductor device and method of manufacturing the semiconductor device 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070132021A1
公开(公告)日：2007-06-14
申请号：US11445181
申请日：2006-06-02
申请人： Tetsuo Kunii , Yoshitsugu Yamamoto , Hirotaka Amasuga
发明人： Tetsuo Kunii , Yoshitsugu Yamamoto , Hirotaka Amasuga
IPC分类号： H01L29/76
CPC分类号： H01L29/7783 , H01L29/0891 , H01L29/42316 , H01L29/66462 , H01L29/66856 , H01L29/8128
摘要： A semiconductor device includes a substrate having a recess, a gate electrode in the recess in the substrate, and a source electrode and a drain electrode disposed on opposite sides of the gate electrode. An insulating film is on at least on a surface of the gate electrode and a portion in the recess, other than where the gate electrode is located, and a shield electrode connected to the source electrode is located on a portion of the insulating film between the gate electrode and the drain electrode.
摘要翻译：半导体器件包括具有凹部的基板，在基板的凹部中的栅电极以及设置在栅电极的相对侧上的源电极和漏电极。绝缘膜至少在栅电极的表面和凹部中的除了栅电极所在的部分之外的部分上，并且与源电极连接的屏蔽电极位于绝缘膜的一部分之间栅电极和漏电极。

5. 发明申请

US20110006351A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110006351A1
公开(公告)日：2011-01-13
申请号：US12828328
申请日：2010-07-01
申请人： Tetsuo Kunii , Hirotaka Amasuga , Yoshitsugu Yamamoto , Youichi Nogami
发明人： Tetsuo Kunii , Hirotaka Amasuga , Yoshitsugu Yamamoto , Youichi Nogami
IPC分类号： H01L27/06 , H01L29/78 , H01L27/088
CPC分类号： H01L29/4238 , H01L27/0207 , H01L27/0605 , H01L27/0629 , H01L27/088 , H01L29/0619 , H01L29/402 , H01L29/41758 , H01L29/812
摘要： A semiconductor device includes: a semiconductor substrate; an impurity-doped region at a top surface of the semiconductor substrate; an insulating region located around the impurity-doped region on the top surface of the semiconductor substrate; a gate electrode on the impurity-doped region; a first electrode and a second electrode located on the impurity-doped region, sandwiching the gate electrode; a first pad located on the insulating region and connected to the gate electrode; a second pad facing the first pad across the impurity-doped region, on the insulating region, and connected to the second electrode; and a conductor located between the first electrode and the second pad on the insulating region.
摘要翻译：半导体器件包括：半导体衬底; 在所述半导体衬底的顶表面处的杂质掺杂区域; 绝缘区域，位于半导体衬底的顶表面上的杂质掺杂区域周围; 杂质掺杂区上的栅电极; 位于所述杂质掺杂区域上的第一电极和第二电极，夹着所述栅电极; 位于所述绝缘区域上并连接到所述栅电极的第一焊盘; 在所述绝缘区域上跨越所述杂质掺杂区域面对所述第一焊盘的第二焊盘，并且连接到所述第二电极; 以及位于绝缘区域上的第一电极和第二焊盘之间的导体。

6. 发明授权

US07528443B2 Semiconductor device with recessed gate and shield electrode 失效
标题翻译：具有凹入栅极和屏蔽电极的半导体器件
公开(公告)号：US07528443B2
公开(公告)日：2009-05-05
申请号：US11445181
申请日：2006-06-02
申请人： Tetsuo Kunii , Yoshitsugu Yamamoto , Hirotaka Amasuga
发明人： Tetsuo Kunii , Yoshitsugu Yamamoto , Hirotaka Amasuga
IPC分类号： H01L29/778
CPC分类号： H01L29/7783 , H01L29/0891 , H01L29/42316 , H01L29/66462 , H01L29/66856 , H01L29/8128
摘要： A semiconductor device includes a substrate having a recess, a gate electrode in the recess in the substrate, and a source electrode and a drain electrode disposed on opposite sides of the gate electrode. An insulating film is on at least on a surface of the gate electrode and a portion in the recess, other than where the gate electrode is located, and a shield electrode connected to the source electrode is located on a portion of the insulating film between the gate electrode and the drain electrode.
摘要翻译：半导体器件包括具有凹部的基板，在基板的凹部中的栅电极以及设置在栅电极的相对侧上的源电极和漏电极。绝缘膜至少在栅电极的表面和凹部中的除了栅电极所在的部分之外的部分上，并且与源电极连接的屏蔽电极位于绝缘膜的一部分之间栅电极和漏电极。

7. 发明申请

US20060231871A1 Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：US20060231871A1
公开(公告)日：2006-10-19
申请号：US11374141
申请日：2006-03-14
申请人： Hirotaka Amasuga , Toshihiko Shiga , Tetsuo Kunii , Tomoki Oku
发明人： Hirotaka Amasuga , Toshihiko Shiga , Tetsuo Kunii , Tomoki Oku
IPC分类号： H01L29/80 , H01L29/76 , H01L31/112 , H01L29/94 , H01L31/00
CPC分类号： H01L29/475 , H01L21/28581 , H01L21/28587 , H01L29/42316
摘要： A gate electrode serving as a Schottky electrode includes a TaNx layer and an Au layer. The TaNx layer serves as a barrier metal for preventing atoms from diffusing from the Au layer into a substrate. TaNx does not contain Si, and therefore has a higher humidity resistance than WSiN containing Si. Accordingly, the gate electrode has a higher humidity resistance than a conventional gate electrode including a WSiN layer. Setting a nitrogen content at less than 0.8 can prevent significant degradation in Schottky characteristics as compared to the conventional gate electrode. Setting the nitrogen content at 0.5 or less, Schottky characteristics can be improved more than in the conventional gate electrode.
摘要翻译：用作肖特基电极的栅电极包括TaNx层和Au层。 TaNx层用作防止原子从Au层扩散到衬底中的阻挡金属。 TaNx不含Si，因此具有比含有Si的WSiN更高的耐湿性。因此，栅电极具有比包含WSiN层的常规栅电极更高的耐湿性。与常规栅电极相比，氮含量小于0.8可以防止肖特基特性的显着降低。将氮含量设定为0.5以下，与常规栅电极相比，肖特基特性可以得到改善。

8. 发明授权

US07557389B2 Field-effect transistor 失效
标题翻译：场效应晶体管
公开(公告)号：US07557389B2
公开(公告)日：2009-07-07
申请号：US11557551
申请日：2006-11-08
申请人： Hirotaka Amasuga , Tetsuo Kunii
发明人： Hirotaka Amasuga , Tetsuo Kunii
IPC分类号： H01L29/778
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/42316
摘要： A field-effect transistor includes a channel layer formed of a III-V compound semiconductor excluding aluminum; a gate contact layer formed of a III-V compound semiconductor and provided on the channel layer, the III-V compound semiconductor having a dopant concentration equal to or less than 1×1016 cm−3, containing aluminum, and having a large band gap energy; a gate buried layer of a III-V compound semiconductor and provided on the gate contact layer; and a gate electrode buried in the gate buried layer and in contact with the gate contact layer. A recess in the gate buried layer is opposed to an upper side wall of the gate electrode with a gap therebetween and a part of the gate buried layer, and where a contact with a lower side wall of the gate electrode is established, part of the gate buried layer remains without being removed.
摘要翻译：场效应晶体管包括由不包括铝的III-V族化合物半导体形成的沟道层; 由III-V族化合物半导体形成的栅极接触层，其设置在所述沟道层上，所述III-V族化合物半导体的掺杂剂浓度为1×10 16 cm -3以下，含有铝，并且具有大的带隙能量; 设置在栅极接触层上的III-V族化合物半导体的栅极掩埋层; 以及掩埋在栅极掩埋层中并与栅极接触层接触的栅电极。栅极掩埋层中的凹部与栅电极的上侧壁相对，其间具有间隙，并且栅极掩埋层的一部分与栅电极的下侧壁的接触被建立，栅极掩埋层保持不被去除。

9. 发明申请

US20070145415A1 High-frequency semiconductor device 审中-公开
标题翻译：高频半导体器件
公开(公告)号：US20070145415A1
公开(公告)日：2007-06-28
申请号：US11484624
申请日：2006-07-12
申请人： Akira Inoue , Hirotaka Amasuga , Tetsuo Kunii
发明人： Akira Inoue , Hirotaka Amasuga , Tetsuo Kunii
IPC分类号： H01L29/76
CPC分类号： H01L29/7785 , H01L29/0692 , H01L29/42316
摘要： A semiconductor device operating at a frequency between 0.8 GHz and 300 GHz includes an active region that is positioned on a semi-insulating GaAs substrate; a gate electrode that is positioned in the active region; and a source electrode and a drain electrode that are positioned on the surface of the active region facing each other with the gate electrode positioned between the source electrode and the drain electrode. A drain side active region, which is a part of the active region and positioned between the gate electrode and the drain electrode, increases in width in the direction to the drain electrode from the gate electrode.
摘要翻译：以0.8GHz和300GHz之间的频率工作的半导体器件包括位于半绝缘GaAs衬底上的有源区; 位于有源区中的栅电极; 以及源电极和漏电极，其位于有源区的表面上，栅电极位于源电极和漏电极之间。作为有源区的一部分并且位于栅电极和漏电极之间的漏极侧有源区在从栅电极到漏电极的方向上的宽度增加。

10. 发明授权

US08471377B2 Semiconductor device and semiconductor circuit substrate 有权
标题翻译：半导体器件和半导体电路基板
公开(公告)号：US08471377B2
公开(公告)日：2013-06-25
申请号：US13091204
申请日：2011-04-21
申请人： Naoki Kosaka , Hirotaka Amasuga , Kou Kanaya
发明人： Naoki Kosaka , Hirotaka Amasuga , Kou Kanaya
IPC分类号： H01L23/02 , H01L21/00
CPC分类号： H01L24/80 , H01L21/6835 , H01L23/49833 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L29/2003 , H01L29/7322 , H01L2221/6835 , H01L2221/68381 , H01L2224/1146 , H01L2224/11831 , H01L2224/11845 , H01L2224/13144 , H01L2224/16225 , H01L2224/274 , H01L2224/27831 , H01L2224/27845 , H01L2224/29011 , H01L2224/291 , H01L2224/29101 , H01L2224/2919 , H01L2224/32225 , H01L2224/8001 , H01L2224/80013 , H01L2224/80123 , H01L2224/80129 , H01L2224/8013 , H01L2224/80132 , H01L2224/80201 , H01L2224/80203 , H01L2224/80895 , H01L2224/81191 , H01L2224/83191 , H01L2225/06513 , H01L2225/06551 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/10329 , H01L2924/1305 , H01L2924/14 , H01L2924/1423 , H05K1/14 , H05K2201/047 , H05K2201/10515 , H01L2924/00014 , H01L2924/00 , H01L2924/01014 , H01L2924/01015 , H01L2924/01049 , H01L2924/01031
摘要： A semiconductor circuit substrate includes a transistor-forming substrate and a circuit-forming substrate. The transistor-forming substrate is a GaN substrate and has a Bipolar Junction Transistor (BJT) located in its top surface. The bottom surface of the transistor-forming substrate is flat and has contact regions. The circuit-forming substrate is a material other than a compound semiconductor and has no semiconductor active elements. The circuit-forming substrate has a flat top surface, contact regions buried in and exposed at the top surface, and passive circuits. The transistor-forming substrate and the circuit-forming substrate are directly bonded together without any intervening film, such as an insulating film.
摘要翻译：半导体电路衬底包括晶体管形成衬底和电路形成衬底。晶体管形成衬底是GaN衬底并且具有位于其顶表面中的双极结晶体管（BJT）。晶体管形成基板的底表面是平坦的并且具有接触区域。电路形成用基板是化合物半导体以外的材料，不具有半导体活性元素。电路形成基板具有平坦的顶表面，埋入并暴露在顶表面的接触区域和无源电路。晶体管形成基板和电路形成基板直接接合在一起，而没有任何中间膜，例如绝缘膜。

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