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    • 6. 发明授权
    • Semiconductor device
    • 半导体器件
    • US09183949B2
    • 2015-11-10
    • US13324567
    • 2011-12-13
    • Hiromasa NodaToshio Ninomiya
    • Hiromasa NodaToshio Ninomiya
    • G11C29/02
    • G11C29/028G11C29/021G11C29/023
    • A device includes a decoder, a selector, and a plurality of registers. The decoder is configured to generate a plurality of test signals. The selector is coupled to the decoder. The selector is configured to sequentially select a test signal from the plurality of test signals and to sequentially output the test signal selected. The plurality of registers is coupled in series to each other. The plurality of registers includes a first stage register. The first stage register is coupled to the selector to sequentially receive the test signal from the selector.
    • 一种装置包括解码器,选择器和多个寄存器。 解码器被配置为产生多个测试信号。 选择器耦合到解码器。 选择器被配置为从多个测试信号中顺序地选择测试信号,并且顺序地输出所选择的测试信号。 多个寄存器彼此串联耦合。 多个寄存器包括第一级寄存器。 第一级寄存器耦合到选择器以顺序地从选择器接收测试信号。