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    • 2. 发明授权
    • Terahertz electromagnetic wave radiation element and its manufacturing method
    • 太赫兹电磁波辐射元件及其制造方法
    • US07915641B2
    • 2011-03-29
    • US11575102
    • 2005-08-23
    • Taiichi OtsujiEiichi Sano
    • Taiichi OtsujiEiichi Sano
    • H01L33/00H01L31/00H01L21/00
    • H01S1/02G02F1/3534G02F2203/13H01L31/0224H01L31/02327H01L31/09H01S2302/02
    • The present invention improves the efficiency of conversion from a non-radiation two-dimensional electron plasmon wave into a radiation electromagnetic wave, and realizes a wide-band characteristic. A terahertz electromagnetic wave radiation element of the present invention comprises a semiinsulating semiconductor bulk layer, a two-dimensional electron layer formed directly above the semiconductor bulk layer by a semiconductor heterojunction structure, source and drain electrodes electrically connected to two opposed sides of the two-dimensional electron layer, a double gate electrode grating which is provided in the vicinity of and parallel to the upper surface of the two-dimensional electron layer and for which two different dc bias potentials can be alternately set, and a transparent metal mirror provided in contact with the lower surface of the semiconductor bulk layer, formed into a film shape, functioning as a reflecting mirror in the terahertz band, and being transparent in the light wave band. Two light waves are caused to enter from the lower surface of the transparent metal mirror, and two different dc bias potentials are alternately applied to the double gate electrode grating so as to periodically modulate the electron density of the two-dimensional electron layer in accordance with the configuration of the double gate electrode grating.
    • 本发明提高了从非辐射二维电子等离子体波转换成辐射电磁波的效率,实现了宽带特性。 本发明的太赫兹电磁波辐射元件包括半绝缘半导体本体层,通过半导体异质结结构直接形成在半导体本体层上方的二维电子层,电连接到二极管的两相对侧的源极和漏极, 三维电子层,设置在二维电子层的上表面附近并与二维电子层的上表面平行并且可以交替设置两个不同的直流偏置电位的双栅电极光栅,以及设置成接触的透明金属镜 半导体本体层的下表面形成为薄膜形状,在太赫兹带中用作反射镜,并且在光波段中是透明的。 使两个光波从透明金属镜的下表面进入,并且将两个不同的直流偏置电位交替地施加到双栅电极光栅,以便根据二维电极层的周期性调制二维电子层的电子密度 双栅电极光栅的结构。
    • 3. 发明申请
    • Terahertz Electromagnetic Wave Radiation Element and Its Manufacturing Method
    • 太赫兹电磁波辐射元件及其制造方法
    • US20080315216A1
    • 2008-12-25
    • US11575102
    • 2005-08-23
    • Taiichi OtsujiEiichi Sano
    • Taiichi OtsujiEiichi Sano
    • H01L33/00H01L31/00H01L21/00
    • H01S1/02G02F1/3534G02F2203/13H01L31/0224H01L31/02327H01L31/09H01S2302/02
    • The present invention improves the efficiency of conversion from a non-radiation two-dimensional electron plasmon wave into a radiation electromagnetic wave, and realizes a wide-band characteristic. A terahertz electromagnetic wave radiation element of the present invention comprises a semiinsulating semiconductor bulk layer, a two-dimensional electron layer formed directly above the semiconductor bulk layer by a semiconductor heterojunction structure, source and drain electrodes electrically connected to two opposed sides of the two-dimensional electron layer, a double gate electrode grating which is provided in the vicinity of and parallel to the upper surface of the two-dimensional electron layer and for which two different dc bias potentials can be alternately set, and a transparent metal mirror provided in contact with the lower surface of the semiconductor bulk layer, formed into a film shape, functioning as a reflecting mirror in the terahertz band, and being transparent in the light wave band. Two light waves are caused to enter from the lower surface of the transparent metal mirror, and two different dc bias potentials are alternately applied to the double gate electrode grating so as to periodically modulate the electron density of the two-dimensional electron layer in accordance with the configuration of the double gate electrode grating.
    • 本发明提高了从非辐射二维电子等离子体波转换成辐射电磁波的效率,实现了宽带特性。 本发明的太赫兹电磁波辐射元件包括半绝缘半导体本体层,通过半导体异质结结构直接形成在半导体本体层上方的二维电子层,电连接到二极管的两相对侧的源极和漏极, 三维电子层,设置在二维电子层的上表面附近并与二维电子层的上表面平行并且可以交替设置两个不同的直流偏置电位的双栅电极光栅,以及设置成接触的透明金属镜 半导体本体层的下表面形成为薄膜形状,在太赫兹带中用作反射镜,并且在光波段中是透明的。 使两个光波从透明金属镜的下表面进入,并且将两个不同的直流偏置电位交替地施加到双栅电极光栅,以便根据二维电极层的周期性调制二维电子层的电子密度 双栅电极光栅的结构。
    • 4. 发明授权
    • Complementary logic gate device
    • 互补逻辑门装置
    • US08227794B2
    • 2012-07-24
    • US13054706
    • 2009-07-24
    • Taiichi OtsujiEiichi Sano
    • Taiichi OtsujiEiichi Sano
    • H01L29/08
    • H01L21/8213H01L27/092H01L27/11807H01L27/1203H01L29/78684Y10S977/734
    • Provided is a complementary logical gate device represented by a silicon CMOS logical circuit among semiconductor integrated logical circuits which can effectively solve the problem of the speed performance limit of an ultra-large scale integration and an ultra-low power consumption type logical circuit. The complementary logical gate includes an electron running layer formed by grapheme without using an n-channel FET or a p-channel FET, has the ambipolar characteristic, and uses only two FET having different threshold values, i.e., a first FET and a second FET. The first FET has a gate electrode short-circuited to a gate electrode of the second FET so as to constitute an input terminal. The first FET has a source electrode set to a low potential. The first FET has a drain electrode connected to a source electrode of the second FET so as to constitute an output terminal. The second FET has a drain electrode set to a high potential.
    • 提供了可以有效地解决超大规模集成的速度性能限制和超低功耗型逻辑电路的问题的半导体集成逻辑电路中由硅CMOS逻辑电路表示的互补逻辑门装置。 互补逻辑门包括由不使用n沟道FET或p沟道FET的图形形成的电子运行层,具有双极特性,并且仅使用具有不同阈值的两个FET,即第一FET和第二FET 。 第一FET具有与第二FET的栅极短路的栅电极,以构成输入端。 第一FET具有设置为低电位的源电极。 第一FET具有连接到第二FET的源极的漏极,以构成输出端。 第二FET具有设置为高电位的漏电极。
    • 5. 发明申请
    • COMPLEMENTARY LOGIC GATE DEVICE
    • 补充逻辑门控器件
    • US20110156007A1
    • 2011-06-30
    • US13054706
    • 2009-07-24
    • Taiichi OtsujiEiichi Sano
    • Taiichi OtsujiEiichi Sano
    • H01L29/08B82Y99/00
    • H01L21/8213H01L27/092H01L27/11807H01L27/1203H01L29/78684Y10S977/734
    • Provided is a complementary logical gate device represented by a silicon CMOS logical circuit among semiconductor integrated logical circuits which can effectively solve the problem of the speed performance limit of an ultra-large scale integration and an ultra-low power consumption type logical circuit. The complementary logical gate includes an electron running layer formed by grapheme without using an n-channel FET or a p-channel FET, has the ambipolar characteristic, and uses only two FET having different threshold values, i.e., a first FET and a second FET. The first FET has a gate electrode short-circuited to a gate electrode of the second FET so as to constitute an input terminal. The first FET has a source electrode set to a low potential. The first FET has a drain electrode connected to a source electrode of the second FET so as to constitute an output terminal. The second FET has a drain electrode set to a high potential.
    • 提供了可以有效地解决超大规模集成的速度性能限制和超低功耗型逻辑电路的问题的半导体集成逻辑电路中由硅CMOS逻辑电路表示的互补逻辑门装置。 互补逻辑门包括由不使用n沟道FET或p沟道FET的图形形成的电子运行层,具有双极特性,并且仅使用具有不同阈值的两个FET,即第一FET和第二FET 。 第一FET具有与第二FET的栅极短路的栅电极,以构成输入端。 第一FET具有设置为低电位的源电极。 第一FET具有连接到第二FET的源极的漏极,以构成输出端。 第二FET具有设置为高电位的漏电极。