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1. 发明授权

US06924242B2 SiOC properties and its uniformity in bulk for damascene applications 有权
标题翻译： SiOC性质及其对大马士革应用的体积均匀性
公开(公告)号：US06924242B2
公开(公告)日：2005-08-02
申请号：US10692030
申请日：2003-10-23
申请人： Syun-Ming Jang , Chung-Chi Ko , Tien-I Bao , Lih-Ping Li , Al-Sen Liu
发明人： Syun-Ming Jang , Chung-Chi Ko , Tien-I Bao , Lih-Ping Li , Al-Sen Liu
IPC分类号： H01L21/316 , H01L21/768 , H01L21/26
CPC分类号： H01L21/76835 , H01L21/02126 , H01L21/022 , H01L21/02271 , H01L21/0234 , H01L21/31633 , H01L21/76801 , H01L21/76807 , H01L21/76826 , H01L21/76829
摘要： A method of forming a low-k dielectric material layer comprising the following steps. A first dielectric material sub-layer is formed over a substrate. The first dielectric material sub-layer is treated with an energy treatment to form a hardened layer on the upper surface of the first dielectric material sub-layer. A second dielectric material sub-layer is formed over the hardened layer, wherein the first dielectric sub-layer, the hardened layer and the second dielectric sub-layer comprise the low-k dielectric material layer. And a dual damascene structure and a dielectric material structure formed thereby.
摘要翻译：一种形成低k电介质材料层的方法，包括以下步骤。第一介电材料子层形成在衬底上。第一介电材料子层用能量处理处理，以在第一介电材料子层的上表面上形成硬化层。第二电介质子层形成在硬化层上，其中第一介电子层，硬化层和第二电介质子层包括低k电介质材料层。以及由此形成的双镶嵌结构和介电材料结构。

2. 发明申请

US20050133931A1 SiOC properties and its uniformity in bulk for damascene applications 审中-公开
公开(公告)号：US20050133931A1
公开(公告)日：2005-06-23
申请号：US11048073
申请日：2005-02-01
申请人： Syun-Ming Jang , Chung-Chi Ko , Tien-I Bao , Lih-Ping Li , Ai-Sen Liu
发明人： Syun-Ming Jang , Chung-Chi Ko , Tien-I Bao , Lih-Ping Li , Ai-Sen Liu
IPC分类号： H01L21/316 , H01L21/768 , H01L21/4763 , H01L23/52
CPC分类号： H01L21/76835 , H01L21/02126 , H01L21/022 , H01L21/02271 , H01L21/0234 , H01L21/31633 , H01L21/76801 , H01L21/76807 , H01L21/76826 , H01L21/76829
摘要： A method of forming a low-k dielectric material layer comprising the following steps. A first dielectric material sub-layer is formed over a substrate. The first dielectric material sub-layer is treated with an energy treatment to form a hardened layer on the upper surface of the first dielectric material sub-layer. A second dielectric material sub-layer is formed over the hardened layer, wherein the first dielectric sub-layer, the hardened layer and the second dielectric sub-layer comprise the low-k dielectric material layer. And a dual damascene structure and a dielectric material structure formed thereby.

3. 发明授权

US06962869B1 SiOCH low k surface protection layer formation by CxHy gas plasma treatment 有权
标题翻译： SiOCH低k表面保护层通过CxHy气体等离子体处理形成
公开(公告)号：US06962869B1
公开(公告)日：2005-11-08
申请号：US10270974
申请日：2002-10-15
申请人： Tien-I Bao , Hsin-Hsien Lu , Lih-Ping Li , Chung-Chi Ko , Aaron Song , Syun-Ming Jang
发明人： Tien-I Bao , Hsin-Hsien Lu , Lih-Ping Li , Chung-Chi Ko , Aaron Song , Syun-Ming Jang
IPC分类号： H01L21/4763 , H01L21/768
CPC分类号： H01L21/3105 , H01L21/31144 , H01L21/3212 , H01L21/76802 , H01L21/76826 , H01L21/76829 , H01L21/76835
摘要： A method of protecting a low k dielectric layer that is preferably comprised of a material containing Si, O, C, and H is described. The dielectric layer is subjected to a gas plasma that is generated from a CXHY gas which is preferably ethylene. Optionally, hydrogen may be added to the CXHY gas. Another alternative is a two step plasma process involving a first plasma treatment of CXHY or CXHY combined with H2 and a second plasma treatment with H2. The modified dielectric layer provides improved adhesion to anti-reflective layers and to a barrier metal layer in a damascene process. The modified dielectric layer also has a low CMP rate that prevents scratch defects and an oxide recess from occurring next to the metal layer on the surface of the damascene stack. The plasma treatments are preferably done in the same chamber in which the dielectric layer is deposited.
摘要翻译：描述了保护低k电介质层的方法，其优选由含有Si，O，C和H的材料组成。对电介质层进行气化等离子体，该等离子体是由优选乙烯的C X H Y气产生的。任选地，可以将氢气加入到C 1 H 2 H 2 O气体中。另一种替代方案是涉及第一等离子体处理C X> Y Y or SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB SUB >与H 2 H 2结合，并且与H 2 2进行第二等离子体处理。改进的介电层在镶嵌工艺中提供对抗反射层和阻挡金属层的改善的粘合性。改进的介电层也具有低CMP速率，其防止划痕缺陷和氧化物凹陷在镶嵌层的表面上邻近金属层发生。等离子体处理优选在沉积介电层的相同的室中进行。

4. 发明授权

US06812043B2 Method for forming a carbon doped oxide low-k insulating layer 有权
标题翻译：形成碳掺杂氧化物低k绝缘层的方法
公开(公告)号：US06812043B2
公开(公告)日：2004-11-02
申请号：US10131713
申请日：2002-04-25
申请人： Tien-I Bao , Chung-Chi Ko , Lih-Ping Li , Syun-Ming Jang
发明人： Tien-I Bao , Chung-Chi Ko , Lih-Ping Li , Syun-Ming Jang
IPC分类号： H01L2100
CPC分类号： H01L21/76826 , C23C16/401 , C23C16/56 , H01L21/02126 , H01L21/022 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/0234 , H01L21/02362 , H01L21/31633 , H01L21/76807
摘要： A method for forming a dielectric insulating layer with a reduced dielectric constant and increased hardness for semiconductor device manufacturing including providing a semiconductor wafer having a process surface for forming a dielectric insulting layer thereover; depositing according to a CVD process a carbon doped oxide layer the CVD process including an oregano-silane precursor having Si—O groups and Si—Ry groups, where R is an alkyl or cyclo-alkyl group and y the number of R groups bonded to Si; and, exposing the carbon doped oxide layer to a hydrogen plasma treatment for a period of time thereby reducing the carbon doped oxide layer thickness including reducing the carbon doped oxide layer dielectric constant and increasing the carbon doped oxide layer hardness.
摘要翻译：一种用于半导体器件制造的具有降低的介电常数和增加的硬度的介电绝缘层的形成方法，包括提供具有在其上形成电介质绝缘层的工艺表面的半导体晶片; 根据CVD工艺沉积碳掺杂氧化物层的CVD工艺，其包括具有Si-O基团和Si-Ry基团的牛至硅烷前体，其中R是烷基或环烷基，y是与硅; 并且将碳掺杂的氧化物层暴露于氢等离子体处理一段时间，从而减少碳掺杂的氧化物层厚度，包括减少碳掺杂的氧化物层介电常数并增加碳掺杂的氧化物层的硬度。

5. 发明申请

US20050090122A1 SIOC PROPERTIES AND ITS UNIFORMITY IN BULK FOR DAMASCENE APPLICATIONS 有权
标题翻译： SIOC属性及其在大容量应用中的均匀性
公开(公告)号：US20050090122A1
公开(公告)日：2005-04-28
申请号：US10692030
申请日：2003-10-23
申请人： Syun-Ming Jang , Chung-Chi Ko , Tien-I Bao , Lih-Ping Li , Ai-Sen Liu
发明人： Syun-Ming Jang , Chung-Chi Ko , Tien-I Bao , Lih-Ping Li , Ai-Sen Liu
IPC分类号： H01L21/316 , H01L21/768 , H01L21/31
CPC分类号： H01L21/76835 , H01L21/02126 , H01L21/022 , H01L21/02271 , H01L21/0234 , H01L21/31633 , H01L21/76801 , H01L21/76807 , H01L21/76826 , H01L21/76829
摘要： A method of forming a low-k dielectric material layer comprising the following steps. A first dielectric material sub-layer is formed over a substrate. The first dielectric material sub-layer is treated with an energy treatment to form a hardened layer on the upper surface of the first dielectric material sub-layer. A second dielectric material sub-layer is formed over the hardened layer, wherein the first dielectric sub-layer, the hardened layer and the second dielectric sub-layer comprise the low-k dielectric material layer. And a dual damascene structure and a dielectric material structure formed thereby.
摘要翻译：一种形成低k电介质材料层的方法，包括以下步骤。第一介电材料子层形成在衬底上。第一介电材料子层用能量处理处理，以在第一介电材料子层的上表面上形成硬化层。第二电介质子层形成在硬化层上，其中第一介电子层，硬化层和第二电介质子层包括低k电介质材料层。以及由此形成的双镶嵌结构和介电材料结构。

6. 发明申请

US20060115980A1 Method for decreasing a dielectric constant of a low-k film 审中-公开
标题翻译：降低低k膜的介电常数的方法
公开(公告)号：US20060115980A1
公开(公告)日：2006-06-01
申请号：US11130044
申请日：2005-05-16
申请人： Chung-Chi Ko , Lih-Ping Li , Lain-Jong Li , Syun-Ming Jang
发明人： Chung-Chi Ko , Lih-Ping Li , Lain-Jong Li , Syun-Ming Jang
IPC分类号： H01L21/4763
CPC分类号： H01L21/76835 , C23C16/401 , H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/02304 , H01L21/02362 , H01L21/31633 , H01L21/76807 , H01L21/76834 , H01L21/76843
摘要： A method of forming a low dielectric constant film that can be used in a damascene process is disclosed. An organosilicon precursor such as octamethylcyclotrisiloxane (OMCTS) or any other compound that contains Si, C, and H and optionally O is transported into a PECVD chamber with a carrier gas such as CO or CO2 to provide a soft oxidation environment that leads to a higher carbon content and low k value in the deposited film. The carrier gas may replace helium or argon that have a higher bombardment property that can damage the substrate. Since CO and CO2 can contribute carbon to the deposited film, a lower k value is achieved than when an inert carrier gas is employed. The deposited film can be employed, for example, as a dielectric layer in a damascene stack or as an etch stop layer.
摘要翻译：公开了一种形成可用于镶嵌工艺中的低介电常数膜的方法。将诸如八甲基环三硅氧烷（OMCTS）的有机硅前体或含有Si，C和H以及任选的O的任何其它化合物转移到具有载体气体如CO或CO 2的PECVD室中，以提供软氧化环境导致沉积膜中碳含量较高，k值低。载气可以代替具有较高轰击性能的氦或氩，这可能损坏基底。由于CO和CO 2可以对沉积膜贡献碳，所以实现比使用惰性载气时更低的k值。沉积膜可以用作例如镶嵌层中的介电层或蚀刻停止层。

7. 发明申请

US20050048795A1 Method for ultra low-K dielectric deposition 审中-公开
标题翻译：超低K电介质沉积方法
公开(公告)号：US20050048795A1
公开(公告)日：2005-03-03
申请号：US10649566
申请日：2003-08-27
申请人： Chung-Chi Ko , Yung-Cheng Lu , Tien-I Bao , Hui-Lin Chang , Syun-Ming Jang
发明人： Chung-Chi Ko , Yung-Cheng Lu , Tien-I Bao , Hui-Lin Chang , Syun-Ming Jang
IPC分类号： H01L21/312 , H01L21/768 , H01L21/31 , H01L21/469
CPC分类号： H01L21/02271 , H01L21/02126 , H01L21/02282 , H01L21/0234 , H01L21/02348 , H01L21/02351 , H01L21/312 , H01L21/3121 , H01L21/7682
摘要： The present invention provides a method of forming a semiconductor structure having an ultra low-K dielectric material that adheres well to the substrate. The method includes depositing a low-K material on the top surface of a substrate at a low temperature of no more than 250° by a CVD or spin-on process. The dielectric material is then cured by placing the substrate with the dielectric film in an environment where the temperature is regulated at about 400° or less as the dielectric film is being subjected to a plasma treatment or an E-beam treatment or UV treatment. The environment may further include one or more gases or a mixture of gases selected from the group consisting of H2, N2, NH3, CO2, all hydride gases and a mixture of these gases.
摘要翻译：本发明提供一种形成半导体结构的方法，所述半导体结构具有与基底良好粘合的超低K电介质材料。该方法包括通过CVD或旋涂工艺在低于250°的低温下在衬底的顶表面上沉积低K材料。然后通过将介质膜放置在介质膜经受等离子体处理或电子束处理或UV处理的温度调节在约400°或更小的环境中来固化电介质材料。环境可以进一步包括选自H 2，N 2，NH 3，CO 2，所有氢化物气体和这些气体的混合物的一种或多种气体或气体混合物。

8. 发明授权

US06908773B2 ATR-FTIR metal surface cleanliness monitoring 失效
标题翻译： ATR-FTIR金属表面清洁度监测
公开(公告)号：US06908773B2
公开(公告)日：2005-06-21
申请号：US10102574
申请日：2002-03-19
申请人： Lain-Jong Li , Syun-Ming Jang , Chung-Chi Ko
发明人： Lain-Jong Li , Syun-Ming Jang , Chung-Chi Ko
IPC分类号： G01N21/35 , G01N21/55 , G01R31/26 , H01L21/66
CPC分类号： G01N21/35 , G01N21/3563 , G01N21/552 , G01N21/94 , G01N2021/3595
摘要： Attenuated total reflectance (ATR)-Fourier transform infrared (FTIR) metal surface cleanliness monitoring is disclosed. A metal surface of a semiconductor die is impinged with an infrared (IR) beam, such as can be accomplished by using an ATR technique. The IR beam as reflected by the metal surface is measured. For instance, an interferogram of the reflected IR beam may be measured. A Fourier transform of the interferogram may also be performed, in accordance with an FTIR technique. To determine whether the metal surface is contaminated, the IR beam as reflected is compared to a reference sample. For example, the Fourier transform of the interferogram may be compared to the reference sample. If there is deviation by more than a threshold, the metal surface may be concluded as being contaminated.
摘要翻译：公开了衰减全反射（ATR） - 傅立叶变换红外（FTIR）金属表面清洁度监测。半导体管芯的金属表面被红外（IR）光束照射，例如可以通过使用ATR技术来实现。测量由金属表面反射的IR光束。例如，可以测量反射的IR光束的干涉图。干涉图的傅立叶变换也可以根据FTIR技术进行。为了确定金属表面是否被污染，将反射的IR光束与参考样品进行比较。例如，干涉图的傅立叶变换可以与参考样本进行比较。如果偏差大于阈值，金属表面可能被认定为被污染。

9. 发明授权

US06654109B2 System for detecting surface defects in semiconductor wafers 有权
标题翻译：用于检测半导体晶片表面缺陷的系统
公开(公告)号：US06654109B2
公开(公告)日：2003-11-25
申请号：US10068417
申请日：2002-02-05
申请人： Lain-Jong Li , Chung-Chi Ko , Syun-Ming Jang
发明人： Lain-Jong Li , Chung-Chi Ko , Syun-Ming Jang
IPC分类号： C01N2188
CPC分类号： G01N21/9501 , G01N21/9505 , G01N2021/8825
摘要： Defects such as holes and bumps in the surface of a semiconductor wafer are detected by an optical inspection system that combines darkfield and brightfield illumination techniques. A single light stop, which forms part of the illumination system, includes a pair of openings configured to produce both a solid cone of light and a hollow of light which are simultaneously focused onto the wafer surface. The directly emanating light as well as the scattered light collected from the wafer surface produce a resultant image that is the product of darkfield and brightfield illumination. Modulation of the light beam and tilting of the light focused onto the wafer surface may be advantageously used to improved contrast and resolution of the viewed image.
摘要翻译：通过组合暗场和亮场照明技术的光学检查系统来检测半导体晶片的表面中的孔和凸起的缺陷。形成照明系统一部分的单个光停止器包括一对开口，其被配置为产生同时聚焦在晶片表面上的实心锥体和中空光。直接发光以及从晶片表面收集的散射光产生作为暗场和明场照明的产物的合成图像。光束的调制和聚焦到晶片表面上的光的倾斜可以有利地用于改善观看图像的对比度和分辨率。

10. 发明申请

US20080233765A1 Method for enhancing adhesion between layers 有权
标题翻译：提高层间粘附性的方法
公开(公告)号：US20080233765A1
公开(公告)日：2008-09-25
申请号：US11727133
申请日：2007-03-23
申请人： Chung-Chi Ko , Lih-Ping Li , Yung-Cheng Lu , Hui-Lin Chang , Chih-Hsien Lin
发明人： Chung-Chi Ko , Lih-Ping Li , Yung-Cheng Lu , Hui-Lin Chang , Chih-Hsien Lin
IPC分类号： H01L21/469 , H01L21/31
CPC分类号： H01L21/31633 , H01L21/02126 , H01L21/02211 , H01L21/02274 , H01L21/02304 , H01L21/76832 , H01L21/76834 , H01L21/76835
摘要： A novel method for enhancing interface adhesion between adjacent dielectric layers, particularly between an etch stop layer and an overlying dielectric layer having a low dielectric constant (k) in the formation of metal interconnects during the fabrication of integrated circuits on semiconductor wafer substrates. The method may include providing a substrate, providing an etch stop layer on the substrate, providing an oxygen-rich dielectric pre-layer on the etch stop layer and providing a major dielectric layer on the oxygen-rich dielectric pre-layer. Metal interconnects are then formed in the dielectric layers. The oxygen-rich dielectric pre-layer between the etch stop layer and the upper dielectric layer prevents or minimizes peeling and cracking of the layers induced by stresses that are caused by chemical mechanical planarization of metal layers and/or chip packaging.
摘要翻译：一种新颖的方法，用于在半导体晶片衬底上的集成电路制造过程中，在金属互连的形成过程中，增强相邻电介质层之间的界面附着力，特别是在蚀刻停止层和具有低介电常数（k）的上覆电介质层之间。该方法可以包括提供衬底，在衬底上提供蚀刻停止层，在蚀刻停止层上提供富氧介电预置层，并在富氧电介质预层上提供主要电介质层。然后在电介质层中形成金属互连。在蚀刻停止层和上部电介质层之间的富氧介电预层防止或最小化由金属层和/或芯片封装的化学机械平坦化引起的应力引起的层的剥离和破裂。

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