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    • 5. 发明授权
    • Methods of forming field effect transistors having metal silicide gate electrodes
    • 形成具有金属硅化物栅电极的场效应晶体管的方法
    • US07416968B2
    • 2008-08-26
    • US11230586
    • 2005-09-20
    • Hyun-Su KimJong-Ho YunByung-Hak LeeEun-Ji JungGil-Heyun Choi
    • Hyun-Su KimJong-Ho YunByung-Hak LeeEun-Ji JungGil-Heyun Choi
    • H01L21/336H01L21/3205
    • H01L21/28097H01L21/823835H01L29/4975H01L29/665H01L29/66545
    • Methods of forming field effect transistors according to embodiments of the invention include forming a conductive gate electrode (e.g., polysilicon gate electrode) on a semiconductor substrate and forming a first metal layer on the conductive gate electrode. This first metal layer may include a material selected from a group consisting of nickel, cobalt, titanium, tantalum and tungsten. The first metal layer and the conductive gate electrode are thermally treated for a sufficient duration to convert a first portion of the conductive gate electrode into a first metal silicide region. The first metal layer and the first metal silicide region are then removed to expose a second portion of the conductive gate electrode. A second metal layer is then formed on the second portion of the conductive gate electrode. This second metal layer may include a material selected from a group consisting of nickel, cobalt, titanium, tantalum and tungsten. The second metal layer and the second portion of the conductive gate electrode are thermally treated for a sufficient duration to thereby convert the second portion of the conductive gate electrode into a second metal silicide region.
    • 根据本发明的实施例的形成场效应晶体管的方法包括在半导体衬底上形成导电栅电极(例如,多晶硅栅电极),并在导电栅电极上形成第一金属层。 该第一金属层可以包括选自镍,钴,钛,钽和钨的材料。 对第一金属层和导电栅电极进行热处理足够的时间以将导电栅电极的第一部分转换成第一金属硅化物区域。 然后去除第一金属层和第一金属硅化物区域以暴露导电栅电极的第二部分。 然后在导电栅电极的第二部分上形成第二金属层。 该第二金属层可以包括选自镍,钴,钛,钽和钨的材料。 第二金属层和导电栅电极的第二部分被热处理足够的持续时间,从而将导电栅电极的第二部分转换成第二金属硅化物区域。
    • 6. 发明申请
    • STACKED SEMICONDUCTOR DEVICE AND METHOD OF FABRICATION
    • 堆叠半导体器件和制造方法
    • US20080199991A1
    • 2008-08-21
    • US12108591
    • 2008-04-24
    • Hyun-Su KimGil-Heyun ChoiJong-Ho YunSug-Woo JungEun-Ji Jung
    • Hyun-Su KimGil-Heyun ChoiJong-Ho YunSug-Woo JungEun-Ji Jung
    • H01L21/84
    • H01L27/0688H01L21/8221
    • A stacked semiconductor device comprises a lower transistor formed on a semiconductor substrate, a lower interlevel insulation film formed on the semiconductor substrate over the lower transistor, an upper transistor formed on the lower interlayer insulation film over the lower transistor, and an upper interlevel insulation film formed on the lower interlevel insulation film over the upper transistor. The stacked semiconductor device further comprises a contact plug connected between a drain or source region of the lower transistor and a source or drain region of the upper transistor, and an extension layer connected to a lateral face of the source or drain region of the upper transistor to enlarge an area of contact between the source or drain region of the upper transistor and a side of the contact plug.
    • 叠层半导体器件包括形成在半导体衬底上的下晶体管,形成在半导体衬底上的下层晶体管上的下层间绝缘膜,形成在下晶体管上的下层间绝缘膜上的上晶体管,以及上层间绝缘膜 形成在上层晶体管上的较低层间绝缘膜上。 叠层半导体器件还包括连接在下晶体管的漏极或源极区域与上部晶体管的源极或漏极区域之间的接触插塞以及连接到上部晶体管的源极或漏极区域的侧面的延伸层 以扩大上部晶体管的源极或漏极区域与接触插塞的一侧之间的接触面积。