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1. 发明授权

US07882278B2 Utilizing programmable channels for allocation of buffer space and transaction control in data communications 失效
标题翻译：利用可编程通道在数据通信中分配缓冲区空间和事务控制
公开(公告)号：US07882278B2
公开(公告)日：2011-02-01
申请号：US12362585
申请日：2009-01-30
申请人： Sundeep Chadha , Mark Anthony Check , Bernard Charles Drerup , Michael Grassi
发明人： Sundeep Chadha , Mark Anthony Check , Bernard Charles Drerup , Michael Grassi
IPC分类号： G06F13/42
CPC分类号： G06F13/4059
摘要： A control mechanism for data bus communications employs channels to which bus transactions are assigned, each channel having independent flow control. The control mechanism enforces an ordering algorithm among channels, whereby at least some transactions may pass other transactions. Channel attributes are programmable to vary the ordering conditions. Preferably, each channel is allocated its own programmable buffer area. The control mechanism independently determines, for each channel, whether buffer space is available and enforces flow control independently for each channel accordingly. Flow control is preferably credit-based, credits representing buffer space or some other capacity of a receiver to receive data. Preferably, the flow control mechanism comprises a central interconnect module controlling internal communications of an integrated circuit chip.
摘要翻译：用于数据总线通信的控制机制采用分配总线事务的通道，每个通道具有独立的流量控制。控制机制强制通道之间的排序算法，由此至少一些交易可以通过其他交易。通道属性可编程以改变排序条件。优选地，每个信道被分配其自己的可编程缓冲区。控制机制为每个通道独立地确定缓冲区空间是否可用，并相应地为每个通道独立地执行流量控制。流量控制优选地是基于信用的，表示缓冲区空间的信用或接收器接收数据的一些其他容量。优选地，流量控制机构包括控制集成电路芯片的内部通信的中央互连模块。

2. 发明申请

US20090138629A1 Utilizing Programmable Channels for Allocation of Buffer Space and Transaction Control in Data Communications 失效
标题翻译：利用可编程通道分配数据通信中的缓冲区空间和事务控制
公开(公告)号：US20090138629A1
公开(公告)日：2009-05-28
申请号：US12362585
申请日：2009-01-30
申请人： Sundeep Chadha , Mark Anthony Check , Bernard Charles Drerup , Michael Grassi
发明人： Sundeep Chadha , Mark Anthony Check , Bernard Charles Drerup , Michael Grassi
IPC分类号： G06F13/42
CPC分类号： G06F13/4059
摘要： A control mechanism for data bus communications employs channels to which bus transactions are assigned, each channel having independent flow control. The control mechanism enforces an ordering algorithm among channels, whereby at least some transactions may pass other transactions. Channel attributes are programmable to vary the ordering conditions. Preferably, each channel is allocated its own programmable buffer area. The control mechanism independently determines, for each channel, whether buffer space is available and enforces flow control independently for each channel accordingly. Flow control is preferably credit-based, credits representing buffer space or some other capacity of a receiver to receive data. Preferably, the flow control mechanism comprises a central interconnect module controlling internal communications of an integrated circuit chip.
摘要翻译：用于数据总线通信的控制机制采用分配总线事务的通道，每个通道具有独立的流量控制。控制机制强制通道之间的排序算法，由此至少一些交易可以通过其他交易。通道属性可编程以改变排序条件。优选地，每个信道被分配其自己的可编程缓冲区。控制机制为每个通道独立地确定缓冲区空间是否可用，并相应地为每个通道独立地执行流量控制。流量控制优选地是基于信用的，表示缓冲区空间的信用或接收器接收数据的一些其他容量。优选地，流量控制机构包括控制集成电路芯片的内部通信的中央互连模块。

3. 发明授权

US07493426B2 Data communication method and apparatus utilizing programmable channels for allocation of buffer space and transaction control 失效
标题翻译：数据通信方法和装置利用可编程通道分配缓冲区空间和事务控制
公开(公告)号：US07493426B2
公开(公告)日：2009-02-17
申请号：US11047548
申请日：2005-01-31
申请人： Sundeep Chadha , Mark Anthony Check , Bernard Charles Drerup , Michael Grassi
发明人： Sundeep Chadha , Mark Anthony Check , Bernard Charles Drerup , Michael Grassi
IPC分类号： G06F3/00 , G06F5/00 , G06F11/00 , G01R31/08 , G08C15/00 , H04J1/16 , H04J3/14 , H04L1/00 , H04L12/26
CPC分类号： G06F13/4059
摘要： A control mechanism for data bus communications employs channels to which bus transactions are assigned, each channel having independent flow control. The control mechanism enforces an ordering algorithm among channels, whereby at least some transactions may pass other transactions. Channel attributes are programmable to vary the ordering conditions. Preferably, each channel is allocated its own programmable buffer area. The control mechanism independently determines, for each channel, whether buffer space is available and enforces flow control independently for each channel accordingly. Flow control is preferably credit-based, credits representing buffer space or some other capacity of a receiver to receive data. Preferably, the flow control mechanism comprises a central interconnect module controlling internal communications of an integrated circuit chip.
摘要翻译：用于数据总线通信的控制机制采用分配总线事务的通道，每个通道具有独立的流量控制。控制机制强制通道之间的排序算法，由此至少一些交易可以通过其他交易。通道属性可编程以改变排序条件。优选地，每个信道被分配其自己的可编程缓冲区。控制机制为每个通道独立地确定缓冲区空间是否可用，并相应地为每个通道独立地执行流量控制。流量控制优选地是基于信用的，表示缓冲区空间的信用或接收器接收数据的一些其他容量。优选地，流量控制机构包括控制集成电路芯片的内部通信的中央互连模块。

4. 发明授权

US07505405B2 Method, apparatus, and computer program product for optimizing packet flow control through buffer status forwarding 失效
标题翻译：用于通过缓冲区状态转发优化数据包流量控制的方法，设备和计算机程序产品
公开(公告)号：US07505405B2
公开(公告)日：2009-03-17
申请号：US10961738
申请日：2004-10-08
申请人： Sundeep Chadha , Bernard Charles Drerup
发明人： Sundeep Chadha , Bernard Charles Drerup
IPC分类号： H04L12/28
CPC分类号： H04L47/10 , H04L47/30 , H04L47/33
摘要： A method, apparatus and computer program product are provided for optimizing packet flow control through buffer status forwarding. A sending device includes buffer status information of the sending device in transactions being sent to a receiving device. The receiving device uses the buffer status information of the sending device for selecting transactions to offload.
摘要翻译：提供了一种方法，装置和计算机程序产品，用于通过缓冲器状态转发优化数据包流控制。发送装置在发送到接收装置的事务中包括发送装置的缓冲器状态信息。接收设备使用发送设备的缓冲器状态信息来选择事务卸载。

5. 发明申请

US20060174050A1 Internal data bus interconnection mechanism utilizing shared buffers supporting communication among multiple functional components of an integrated circuit chip 审中-公开
标题翻译：内部数据总线互连机制利用共享缓冲器支持集成电路芯片的多个功能组件之间的通信
公开(公告)号：US20060174050A1
公开(公告)日：2006-08-03
申请号：US11047549
申请日：2005-01-31
申请人： Sundeep Chadha , Mark Check , Bernard Drerup , Michael Grassi
发明人： Sundeep Chadha , Mark Check , Bernard Drerup , Michael Grassi
IPC分类号： G06F13/36
CPC分类号： G06F13/4059
摘要： An integrated circuit chip includes multiple functional components and a central interconnect module providing communication among the functional components. The central interconnect module includes a buffer which is shared by the sending and receiving components. Preferably, some components perform different functions and communicate with the central interconnect via a common architectural interface. Preferably, each sender is allocated respective credits representing ability of the receiver to receive data (e.g., available buffer space), and the sender can transmit data if it has credits. Credits are decremented when the sender sends data, and returned by the receiver when is again able to receive. The use of a common central interconnect module with a shared buffer reduces buffer requirements and provides a low-overhead path for transferring data within the integrated circuit chip.
摘要翻译：集成电路芯片包括多个功能部件和提供功能部件之间的通信的中央互连模块。中央互连模块包括由发送和接收组件共享的缓冲器。优选地，一些组件执行不同的功能并且经由公共架构接口与中央互连通信。优选地，每个发送者被分配相应的信用表示接收器接收数据的能力（例如，可用的缓冲区空间），并且如果发送者具有信用则发送者可以发送数据。当发送方发送数据时，信用减少，当接收者再次接收时返回。共享缓冲区使用共同的中央互连模块减少了缓冲区的需求，并为集成电路芯片内的数据传输提供了低开销的路径。

6. 发明申请

US20060179182A1 Data communication method and apparatus utilizing programmable channels for allocation of buffer space and transaction control 失效
公开(公告)号：US20060179182A1
公开(公告)日：2006-08-10
申请号：US11047548
申请日：2005-01-31
申请人： Sundeep Chadha , Mark Check , Bernard Drerup , Michael Grassi
发明人： Sundeep Chadha , Mark Check , Bernard Drerup , Michael Grassi
IPC分类号： G06F3/00
CPC分类号： G06F13/4059
摘要： A control mechanism for data bus communications employs channels to which bus transactions are assigned, each channel having independent flow control. The control mechanism enforces an ordering algorithm among channels, whereby at least some transactions may pass other transactions. Channel attributes are programmable to vary the ordering conditions. Preferably, each channel is allocated its own programmable buffer area. The control mechanism independently determines, for each channel, whether buffer space is available and enforces flow control independently for each channel accordingly. Flow control is preferably credit-based, credits representing buffer space or some other capacity of a receiver to receive data. Preferably, the flow control mechanism comprises a central interconnect module controlling internal communications of an integrated circuit chip.

7. 发明申请

US20080288903A1 Generating testcases based on numbers of testcases previously generated 失效
标题翻译：根据以前生成的测试用例数生成测试用例
公开(公告)号：US20080288903A1
公开(公告)日：2008-11-20
申请号：US12220497
申请日：2008-07-24
申请人： Sundeep Chadha
发明人： Sundeep Chadha
IPC分类号： G06F17/50
CPC分类号： G06F11/263
摘要： An apparatus, computer system, and storage medium that, in an embodiment, receive elements and a goal for each of the elements. In various embodiments, the elements may represent commands or parameter values for a device to be tested. Testcases are generated based on the elements. If the numbers of testcases for the elements are equally distant from their goals, then a new testcase is generated based on an element chosen at random. But, if the numbers of testcases are not equally distant from their goals, then the new testcase is generated based on the element whose number of testcases if furthest from its respective goal. The number of testcases associated with the chosen element is then incremented, and the process is repeated. In this way, the generated testcases are based on the numbers of previously generated testcases, which, in an embodiment, results in more complete coverage of testcases for the device under test.
摘要翻译：在一个实施例中，接收元件和每个元件的目标的装置，计算机系统和存储介质。在各种实施例中，元件可以表示要测试的设备的命令或参数值。测试箱是基于元素生成的。如果这些元素的测试用例数量与其目标相同，则会根据随机选择的元素生成新的测试用例。但是，如果测试用例的数量与其目标不相等，那么新的测试用例将根据最大测试用例的元素生成。然后增加与所选元素相关联的测试用例数，并重复该过程。以这种方式，所生成的测试用例基于先前生成的测试用例的数量，在一个实施例中，测试用例可以对被测设备的测试箱进行更完整的覆盖。

8. 发明申请

US20070220390A1 Method and system for verifying equivalence of two representations of a stimulus pattern for testing a design 审中-公开
标题翻译：用于验证用于测试设计的刺激模式的两个表示的等价性的方法和系统
公开(公告)号：US20070220390A1
公开(公告)日：2007-09-20
申请号：US11367940
申请日：2006-03-04
申请人： Sarah Bird , Sundeep Chadha , Maureen Davis , Kirk Morrow , Tung Pham
发明人： Sarah Bird , Sundeep Chadha , Maureen Davis , Kirk Morrow , Tung Pham
IPC分类号： G01R31/28 , G06F11/00
CPC分类号： G06F17/5022
摘要： A method for verifying the equivalence of two representations of a stimulus pattern for testing a design is disclosed. The method includes receiving a base pattern file representing the stimulus pattern in a first file format. A derivative pattern file in a second file format is generated from the base pattern file. The derivative pattern file is parsed to create a first testing file in a third file format, and the first testing file is simulated against the design in a first simulation. Whether the first testing file passed the first simulation against the design is determined, and in response to determining that the first testing file does not pass the first simulation against the design, the base pattern file is parsed to create a second testing file in the third file format. The second testing file is simulated in a second simulation. Whether the second testing file passed the second simulation is determined, and, in response to determining that the second testing file passed the second simulation, a likely non-equivalence of the derivative pattern file and the base pattern file is indicated. In response to determining that the second testing file did not pass the second simulation, a likely equivalence of the derivative pattern file and the base pattern file is indicated.
摘要翻译：公开了一种用于验证用于测试设计的刺激图案的两个表示的等价性的方法。该方法包括以第一文件格式接收表示刺激图案的基本图案文件。从基本模式文件生成第二种文件格式的派生模式文件。解析派生模式文件以第三种文件格式创建第一个测试文件，并在第一次模拟中对第一个测试文件进行模拟。确定第一测试文件是否通过了针对设计的第一次仿真，并且响应于确定第一测试文件没有通过针对设计的第一测试文件，基础模式文件被解析以在第三测试文件中创建第二测试文件文件格式。第二个测试文件在第二个模拟中被模拟。确定第二测试文件是否通过第二模拟，并且响应于确定第二测试文件通过第二模拟，指示导数模式文件和基本模式文件的可能的非等价性。响应于确定第二测试文件没有通过第二模拟，指示导数模式文件和基本模式文件的可能等价。

9. 发明申请

US20060143582A1 Generating testcases based on numbers of testcases previously generated 失效
公开(公告)号：US20060143582A1
公开(公告)日：2006-06-29
申请号：US11021525
申请日：2004-12-23
申请人： Sundeep Chadha
发明人： Sundeep Chadha
IPC分类号： G06F17/50
CPC分类号： G06F11/263
摘要： A method, apparatus, system, and signal-bearing medium that, in an embodiment, receive elements and a goal for each of the elements. In various embodiments, the elements may represent commands or parameter values for a device to be tested. Testcases are generated based on the elements. If the numbers of testcases for the elements are equally distant from their goals, then a new testcase is generated based on an element chosen at random. But, if the numbers of testcases are not equally distant from their goals, then the new testcase is generated based on the element whose number of testcases if furthest from its respective goal. The number of testcases associated with the chosen element is then incremented, and the process is repeated. In this way, the generated testcases are based on the numbers of previously generated testcases, which, in an embodiment, results in more complete coverage of testcases for the device under test.

10. 发明授权

US07502966B2 Testcase generation via a pool of parameter files 失效
标题翻译：通过参数文件池生成测试用例
公开(公告)号：US07502966B2
公开(公告)日：2009-03-10
申请号：US11351236
申请日：2006-02-09
申请人： Olga Buchonina , Sundeep Chadha , Maureen Terese Davis , Anh Tran Vinh , Trac Minh Vu
发明人： Olga Buchonina , Sundeep Chadha , Maureen Terese Davis , Anh Tran Vinh , Trac Minh Vu
IPC分类号： G06F11/00
CPC分类号： G06F11/263
摘要： A current parameter file is periodically selected at random from an active pool, and testcases are generated and executed from the current parameter file against a device, where the execution of the testcases against the device hits events generated by the device over periods. A determination is made whether a number of the events hit by all testcases from the current parameter file in a current period meets a goal for the current parameter file. If the determination is false, the current parameter file is added to a miss pool if a number events for all periods for the current parameter file does not meet a goal for all periods for the current parameter file; the current parameter file is added to a retired pool if the number of events for all periods for the current parameter file meets the goal for all periods for the current parameter file; and the current parameter file is changed to another parameter file from the active pool.
摘要翻译：从活动池中随机定期选择当前参数文件，并且根据设备从当前参数文件生成并执行测试用例，在该设备上，针对设备的测试用例的执行会触发由设备生成的事件周期。确定当前期间当前参数文件中所有测试用例所触发的事件数是否满足当前参数文件的目标。如果确定为假，则当前参数文件的所有时段的数字事件不符合当前参数文件的所有时段的目标时，将当前参数文件添加到未命中池中; 如果当前参数文件的所有时段的事件数满足当前参数文件的所有时段的目标，则将当前参数文件添加到退休池中; 并且当前参数文件从活动池更改为另一个参数文件。

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