专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06754868B2 Semiconductor test system having double data rate pin scrambling 有权
标题翻译：具有双数据速率引脚扰码的半导体测试系统
公开(公告)号：US06754868B2
公开(公告)日：2004-06-22
申请号：US09895439
申请日：2001-06-29
申请人： Steven R. Bristow , Paul Magliocco , Seth W. Craighead
发明人： Steven R. Bristow , Paul Magliocco , Seth W. Craighead
IPC分类号： G01R3128
CPC分类号： G01R31/31917 , G01R31/31919 , G01R31/31921 , G01R31/31922
摘要： A method and apparatus are provided for high speed testing of devices having either logic circuits, memory arrays or both. Apparatus (100) includes: (i) pin electronics (P/Es 145) each coupling the apparatus to one of a number of pins (115) on device (110); (ii) timing and format circuits (T/Fs 150) for mapping a signal to one of P/Es (100); (iii) pattern generator (140) having a number of outputs for outputting signals for testing device (110); (iv) pin scrambling circuit (155) between pattern generator (140) and T/Fs (150), the pin scrambling circuit capable of mapping at least two signals from any of the pattern generator outputs to any of the T/Fs; and (v) clock (135) for providing a clock signal having a clock cycle to pattern generator (140) and T/Fs (150). T/Fs (150) are capable of switching the signals coupled to P/Es (100) at least twice each clock cycle.
摘要翻译：提供了一种方法和装置，用于具有逻辑电路，存储器阵列或两者的装置的高速测试。装置（100）包括：（i）每个将装置连接到装置（110）上的多个销（115）中的一个的销电子装置（P / Es145）; （ii）用于将信号映射到P / Es（100）之一的定时和格式电路（T / Fs 150）; （iii）具有多个用于输出测试装置（110）的信号的输出的模式发生器（140）; （iv）在模式发生器（140）和T / F（150）之间的引脚加扰电路（155），所述引脚加扰电路能够将来自任何模式发生器输出的至少两个信号映射到任何T / F; 和（v）时钟（135），用于向模式发生器（140）和T / F（150）提供具有时钟周期的时钟信号。 T / F（150）能够将每个时钟周期至少两次切换耦合到P / Es（100）的信号。

2. 发明申请

US20100066448A1 DEVICE UNDER TEST POWER SUPPLY 有权
标题翻译：测试电源下的设备
公开(公告)号：US20100066448A1
公开(公告)日：2010-03-18
申请号：US12408157
申请日：2009-03-20
申请人： Patrick G. Sullivan , Steven R. Bristow , William Robert Creek , Jeffrey Allen King
发明人： Patrick G. Sullivan , Steven R. Bristow , William Robert Creek , Jeffrey Allen King
IPC分类号： H03F3/45
CPC分类号： H03F3/72 , H03F3/45475
摘要： A power supply with and input and output includes an amplifier configured to set an output voltage of the power supply output equal to a fixed input voltage for the power supply. The power supply has a first output stage coupled to the amplifier and configured to source and sink current at the output of the power supply between a first voltage rail and a third voltage rail. The power supply has a second output stage coupled to the amplifier and configured to source and sink current to the output of the power supply between a second voltage rail and the third voltage rail. A selection device is configured to enable the first and second output stages based on a selection input signal. The selection device is situated outside of the first and the second output stages.
摘要翻译：具有输入和输出的电源包括放大器，其配置为将电源输出的输出电压设置为等于电源的固定输入电压。电源具有耦合到放大器的第一输出级，并且被配置为在第一电压轨和第三电压轨之间的电源的输出处源极和吸收电流。电源具有耦合到放大器的第二输出级，并且被配置为将电流源流和吸收到第二电压轨和第三电压轨之间的电源的输出。选择装置被配置为基于选择输入信号启用第一和第二输出级。选择装置位于第一和第二输出级之外。

3. 发明授权

US07999530B2 Device under test power supply 有权
标题翻译：被测设备电源
公开(公告)号：US07999530B2
公开(公告)日：2011-08-16
申请号：US12408157
申请日：2009-03-20
申请人： Patrick Sullivan , Steven R. Bristow , William Robert Creek , Jeffrey Allen King
发明人： Patrick Sullivan , Steven R. Bristow , William Robert Creek , Jeffrey Allen King
IPC分类号： H02M3/156 , G01R31/40
CPC分类号： H03F3/72 , H03F3/45475
摘要： A power supply with and input and output includes an amplifier configured to set an output voltage of the power supply output equal to a fixed input voltage for the power supply. The power supply has a first output stage coupled to the amplifier and configured to source and sink current at the output of the power supply between a first voltage rail and a third voltage rail. The power supply has a second output stage coupled to the amplifier and configured to source and sink current to the output of the power supply between a second voltage rail and the third voltage rail. A selection device is configured to enable the first and second output stages based on a selection input signal. The selection device is situated outside of the first and the second output stages.
摘要翻译：具有输入和输出的电源包括放大器，其配置为将电源输出的输出电压设置为等于电源的固定输入电压。电源具有耦合到放大器的第一输出级，并且被配置为在第一电压轨和第三电压轨之间的电源的输出处源极和吸收电流。电源具有耦合到放大器的第二输出级，并且被配置为将电流源流和吸收到第二电压轨和第三电压轨之间的电源的输出。选择装置被配置为基于选择输入信号启用第一和第二输出级。选择装置位于第一和第二输出级之外。

4. 发明授权

US4809221A Timing signal generator 失效
标题翻译：定时信号发生器
公开(公告)号：US4809221A
公开(公告)日：1989-02-28
申请号：US186331
申请日：1988-04-26
申请人： Paul D. Magliocco , Steven R. Bristow
发明人： Paul D. Magliocco , Steven R. Bristow
IPC分类号： G01R31/319 , H03K5/135 , G06F9/00
CPC分类号： G01R31/31922 , H03K5/135
摘要： A unique timing system is provided which allows for a user to program timing events with variable periods and edges from a fixed frequency clock, and having resolution greater than that of the fixed reference frequency. Delay elements, which are inherently expensive, inaccurate, and require repeated calibration, are minimized.
摘要翻译：提供了一种独特的定时系统，其允许用户编程具有来自固定频率时钟的可变周期和边缘的定时事件，并且具有大于固定参考频率的分辨率的分辨率。固有昂贵，不准确，需要重复校准的延迟元件被最小化。

5. 发明授权

US08207725B2 Tester having device under test power supply 有权
标题翻译：测试仪具有受测试电源
公开(公告)号：US08207725B2
公开(公告)日：2012-06-26
申请号：US13211077
申请日：2011-08-16
申请人： Patrick Sullivan , Steven R. Bristow , William R. Creek , Jeffrey Allen King
发明人： Patrick Sullivan , Steven R. Bristow , William R. Creek , Jeffrey Allen King
IPC分类号： H02M3/156 , G01R31/40
CPC分类号： H03F3/72 , H03F3/45475
摘要： A tester includes a device under test (DUT) power supply (DPS) with and input and output includes an amplifier configured to set an output voltage of the DPS output equal to an input voltage for the DPS. The DPS has a first output stage coupled to the amplifier and configured to source and sink current at the output of the DPS between a first voltage rail and a third voltage rail. The DPS has a second output stage coupled to the amplifier and configured to source and sink current to the output of the DPS between a second voltage rail and the third voltage rail. A selection device is configured to enable the first and second output stages based on a selection input signal. The selection device is situated outside of the first and the second output stages.
摘要翻译：测试器包括被测设备（DUT）电源（DPS），输入和输出包括放大器，其配置为将DPS输出的输出电压设置为等于DPS的输入电压。 DPS具有耦合到放大器并被配置为在第一电压轨和第三电压轨之间的DPS的输出端处的电流和电流的第一输出级。 DPS具有耦合到放大器的第二输出级，并被配置为将电流源和吸收到DPS在第二电压轨和第三电压轨之间的输出。选择装置被配置为基于选择输入信号启用第一和第二输出级。选择装置位于第一和第二输出级之外。

6. 发明申请

US20110298483A1 TESTER HAVING DEVICE UNDER TEST POWER SUPPLY 有权
标题翻译：具有测试电源的设备的测试仪
公开(公告)号：US20110298483A1
公开(公告)日：2011-12-08
申请号：US13211077
申请日：2011-08-16
申请人： Patrick Sullivan , Steven R. Bristow , William Robert Creek , Jeffrey Allen King
发明人： Patrick Sullivan , Steven R. Bristow , William Robert Creek , Jeffrey Allen King
IPC分类号： G01R31/00
CPC分类号： H03F3/72 , H03F3/45475
摘要： A tester includes a device under test (DUT) power supply (DPS) with and input and output includes an amplifier configured to set an output voltage of the DPS output equal to an input voltage for the DPS. The DPS has a first output stage coupled to the amplifier and configured to source and sink current at the output of the DPS between a first voltage rail and a third voltage rail. TheDPS has a second output stage coupled to the amplifier and configured to source and sink current to the output of the DPS between a second voltage rail and the third voltage rail. A selection device is configured to enable the first and second output stages based on a selection input signal. The selection device is situated outside of the first and the second output stages.
摘要翻译：测试器包括被测设备（DUT）电源（DPS），输入和输出包括放大器，其配置为将DPS输出的输出电压设置为等于DPS的输入电压。 DPS具有耦合到放大器并被配置为在第一电压轨和第三电压轨之间的DPS的输出端处的电流和电流的第一输出级。 DPS具有耦合到放大器的第二输出级，并被配置为将电流源和吸收到DPS在第二电压轨和第三电压轨之间的输出。选择装置被配置为基于选择输入信号启用第一和第二输出级。选择装置位于第一和第二输出级之外。

7. 发明授权

US4779221A Timing signal generator 失效
标题翻译：定时信号发生器
公开(公告)号：US4779221A
公开(公告)日：1988-10-18
申请号：US8212
申请日：1987-01-28
申请人： Paul D. Magliocco , Steven R. Bristow
发明人： Paul D. Magliocco , Steven R. Bristow
IPC分类号： G06F11/22 , G01R31/319 , G06F1/04 , G06F1/06 , H03K5/135 , G06F9/00
CPC分类号： G01R31/31922 , H03K5/135
摘要： A unique timing system is provided which allows for a user to program timing events with variable periods and edges from a fixed frequency clock, and having resolution greater than that of the fixed reference frequency. Delay elements, which are inherently expensive, inaccurate, and require repeated calibration, are minimized.
摘要翻译：提供了一种独特的定时系统，其允许用户编程具有来自固定频率时钟的可变周期和边缘的定时事件，并且具有大于固定参考频率的分辨率的分辨率。固有昂贵，不准确，需要重复校准的延迟元件被最小化。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式