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1. 发明申请

US20150091621A1 ADVANCED CLOCK SYNCHONIZATION CIRCUIT 审中-公开
标题翻译：高级时钟同步电路
公开(公告)号：US20150091621A1
公开(公告)日：2015-04-02
申请号：US14043674
申请日：2013-10-01
申请人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
发明人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
IPC分类号： H03L7/10
CPC分类号： H03L7/105 , H02M3/33561 , H02M2001/0041 , H03K5/135 , Y10T307/707
摘要： A circuit and method for switching between a system's internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the system using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing.
摘要翻译：一种用于当已经检测到稳定的外部时钟时在系统的内部时钟和外部同步时钟之间切换的电路和方法，并且当预定数量的顺序的外部时钟脉冲超过预定的切换时，切换回使用所述内部时钟来操作系统期间退出阈值或以其他方式丢失。

2. 发明申请

US20120274146A1 ADVANCED CLOCK SYNCHRONIZATION CIRCUIT FOR SWITCH MODE POWER SUPPLIES 有权
标题翻译：用于开关模式电源的高级时钟同步电路
公开(公告)号：US20120274146A1
公开(公告)日：2012-11-01
申请号：US13198179
申请日：2011-08-04
申请人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
发明人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
IPC分类号： H02J1/00 , H03K4/90 , H02M3/335 , H03L7/00
CPC分类号： H03L7/105 , H02M3/33561 , H02M2001/0041 , H03K5/135 , Y10T307/707
摘要： In a switch mode power supply, a circuit and method for switching between an internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the power supply using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing. In one embodiment, a power system comprises a plurality of power supplies connected in parallel to a common load and where each power supply is synchronized to the external clock when a stable external clock has been detected by each.
摘要翻译：在开关模式电源中，当检测到稳定的外部时钟时，用于在内部时钟和外部同步时钟之间切换的电路和方法，以及当预定数量的顺序时，切换回使用所述内部时钟来操作电源外部时钟脉冲超过预定的开关周期丢失阈值，否则丢失。在一个实施例中，电力系统包括与公共负载并联连接的多个电源，并且当每个电源均被每个电源检测到稳定的外部时钟时，每个电源与外部时钟同步。

3. 发明授权

US09362927B2 Advanced clock synchronization circuit 有权
标题翻译：高级时钟同步电路
公开(公告)号：US09362927B2
公开(公告)日：2016-06-07
申请号：US14043674
申请日：2013-10-01
申请人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
发明人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
IPC分类号： H03L7/10 , H02M3/335 , H03K5/135 , H02M1/00
CPC分类号： H03L7/105 , H02M3/33561 , H02M2001/0041 , H03K5/135 , Y10T307/707
摘要： A circuit and method for switching between a system's internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the system using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing.
摘要翻译：一种用于当已经检测到稳定的外部时钟时在系统的内部时钟和外部同步时钟之间切换的电路和方法，并且当预定数量的顺序的外部时钟脉冲超过预定的切换时，切换回使用所述内部时钟来操作系统期间退出阈值或以其他方式丢失。

4. 发明授权

US08570014B2 Advanced clock synchronization circuit for switch mode power supplies 有权
标题翻译：高级时钟同步电路，用于开关电源
公开(公告)号：US08570014B2
公开(公告)日：2013-10-29
申请号：US13198179
申请日：2011-08-04
申请人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
发明人： Steven Patrick Laur , Zbigniew Jan Lata , Jinyu Yang
IPC分类号： G05F1/00 , G05F3/02 , G06F1/08 , H03K3/00 , H02M1/10
CPC分类号： H03L7/105 , H02M3/33561 , H02M2001/0041 , H03K5/135 , Y10T307/707
摘要： In a switch mode power supply, a circuit and method for switching between an internal clock and an external synchronization clock when a stable external clock has been detected, and for switching back to operating the power supply using said internal clock when a predetermined number of sequential external clock pulses exceed a predetermined switching period dropout threshold or are otherwise missing. In one embodiment, a power system comprises a plurality of power supplies connected in parallel to a common load and where each power supply is synchronized to the external clock when a stable external clock has been detected by each.
摘要翻译：在开关模式电源中，当检测到稳定的外部时钟时，用于在内部时钟和外部同步时钟之间切换的电路和方法，以及当预定数量的顺序时，切换回使用所述内部时钟来操作电源外部时钟脉冲超过预定的开关周期丢失阈值，否则丢失。在一个实施例中，电力系统包括与公共负载并联连接的多个电源，并且当每个电源均被每个电源检测到稳定的外部时钟时，每个电源与外部时钟同步。

5. 发明授权

US07129652B2 System and method for driving a plurality of loads 有权
标题翻译：用于驱动多个负载的系统和方法
公开(公告)号：US07129652B2
公开(公告)日：2006-10-31
申请号：US10810943
申请日：2004-03-26
申请人： Sanmukh Makan Patel , Zbigniew Jan Lata , Ross Teggatz
发明人： Sanmukh Makan Patel , Zbigniew Jan Lata , Ross Teggatz
IPC分类号： H05B37/00
CPC分类号： H05B33/0827 , H05B33/0815 , H05B33/0818 , Y02B20/347
摘要： A system for controlling a plurality of load devices includes a high-side system operative to source current relative to at least two associated outputs. A low-side system is operative to sink current relative to a plurality of associated inputs. A control system controls the high-side system and the low-side system according to a multiplexing scheme that is operative to provide current to selected load devices of the plurality of load devices connected between the associated outputs and the associated inputs. The system can be implemented as an integrated circuit for driving the plurality of loads, which can include LED's.
摘要翻译：用于控制多个负载装置的系统包括高侧系统，其操作以相对于至少两个相关联的输出源电流。低侧系统用于相对于多个相关联的输入而吸收电流。控制系统根据复用方案来控制高端系统和低侧系统，所述复用方案可操作以向连接在相关联的输出和相关输入之间的多个负载设备的选定负载设备提供电流。该系统可以实现为用于驱动多个负载的集成电路，其可以包括LED。

6. 发明授权

US06674621B2 IC PMOS Schottky reverse bias protection structure 有权
标题翻译： IC PMOS肖特基反向偏置保护结构
公开(公告)号：US06674621B2
公开(公告)日：2004-01-06
申请号：US09989066
申请日：2001-11-21
申请人： Alexander Noam Teutsch , Zbigniew Jan Lata , David John Baldwin , Ross E. Teggatz
发明人： Alexander Noam Teutsch , Zbigniew Jan Lata , David John Baldwin , Ross E. Teggatz
IPC分类号： F21V704
CPC分类号： H01L27/0255 , H02H11/003
摘要： The present invention relates to a reverse bias protection structure which comprises a PMOS transistor structure having a drain portion, a gate portion, a source portion and a backgate portion, wherein the gate portion is coupled to a first voltage potential, the source portion is selectively coupleable to a power supply, and the drain portion is selectively coupleable to a circuit needing power to be supplied thereto from the power supply. The reverse bias protection structure further comprises a Schottky diode structure having an anode coupled to the source portion of the PMOS transistor structure, and a cathode coupled to the backgate portion of the PMOS structure. Under forward bias conditions, the PMOS transistor conducts and exhibits a small voltage drop thereacross. Under reverse bias conditions, the PMOS transistor is off and the Schottky structure is reverse biased, thus preventing current through the protection structure.
摘要翻译：本发明涉及一种反偏置保护结构，其包括具有漏极部分，栅极部分，源极部分和后栅极部分的PMOS晶体管结构，其中栅极部分耦合到第一电压电位，源极部分选择性地可与电源连接，并且漏极部分选择性地耦合到需要从电源供给的电力的电路。反向偏置保护结构还包括具有耦合到PMOS晶体管结构的源极部分的阳极的肖特基二极管结构以及耦合到PMOS结构的背栅极部分的阴极。在正向偏置条件下，PMOS晶体管导通并呈现出小的电压降。在反向偏置条件下，PMOS晶体管截止，肖特基结构反向偏置，从而防止电流通过保护结构。

7. 发明授权

US06563284B2 Single wire digital width modulation for fan control with tachometer feedback 有权
公开(公告)号：US06563284B2
公开(公告)日：2003-05-13
申请号：US09989065
申请日：2001-11-21
申请人： Alexander Noam Teutsch , Zbigniew Jan Lata , David John Baldwin , Ross E. Teggatz
发明人： Alexander Noam Teutsch , Zbigniew Jan Lata , David John Baldwin , Ross E. Teggatz
IPC分类号： G05B1128
CPC分类号： G05B11/28 , H02P6/085
摘要： The present invention relates to a motor drive system which comprises a fan controller circuit operable to generate a PWM control signal for control of a motor speed. The fan controller circuit comprises a current detection circuit and a motor speed determination circuit. The system further comprises a fan driver circuit operable to drive a motor at a duty cycle based on the PWM control signal from the fan controller circuit. The fan driver circuit comprises a current sink circuit operable to draw current from the PWM control signal when the PWM control signal is high and when the motor reaches a predetermined position. In the addition, the current detection circuit is operable to detect the current draw on the PWM control signal and provide an indication signal to the fan speed determination circuit associated with such detection. Further, the motor speed determination circuit is operable to determine the speed of the motor based upon a timing associated with successive current draw detections. The present invention also relates to a method of determining a motor speed which comprises driving a motor at a duty cycle dictated by a PWM control signal and detecting a predetermined rotor position of the motor. The method further comprises generating a current pulse based on the rotor position, wherein the current pulse is convolved with the PWM control signal, detecting the current pulse, and determining the motor speed using successive detected current pulses.

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