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1. 发明授权

US06324598B1 Software enlarged tag register and method thereof for noting the completion of a DMA transfer within a chain of DMA transfers 有权
标题翻译：软件放大标签寄存器及其方法，用于注意DMA传输链中DMA传输的完成
公开(公告)号：US06324598B1
公开(公告)日：2001-11-27
申请号：US09228474
申请日：1999-01-11
申请人： Steven E. Olson , Ning Zhou
发明人： Steven E. Olson , Ning Zhou
IPC分类号： G06F1310
CPC分类号： G06F13/28
摘要： A computer system, bus interface unit, and method is provided for noting a control block transfer at which an interrupt occurs. The control block is but one control block within a chain of control blocks necessary to effectuate a chain of DMA transfers. If the control block undergoes an interrupt, that control block must be noted and control information associated therewith placed within a register so that when the DMA transfers are resumed, that control block can be immediately pointed to rather than having to initiate the first control block of the chain up to and including the control block undergoing interrupt. By purposely programming interrupts within the tag field of select control blocks and maintaining a software tag register within system memory, a control block within an expanded number of control blocks within a chain can be kept track of and pointed to following an error-induced interrupt. The software-induced interrupts are therefore purposely distinguishable from error-induced interrupts, and are used to extend the range of the hardware tag register normally fixed in size within the DMA controller.
摘要翻译：提供了一种计算机系统，总线接口单元和方法，用于注意发生中断的控制块传送。控制块只是实现DMA传输链所必需的控制块链中的一个控制块。如果控制块经历中断，则必须注意该控制块，并将与其相关联的控制信息放置在寄存器内，使得当DMA传输被恢复时，该控制块可以被立即指向而不是必须启动控制块的第一控制块直到并包括控制块的链路发生中断。通过有意编程选择控制块的标签字段内的中断并将软件标签寄存器保持在系统存储器内，链中扩展数量的控制块内的控制块可以跟踪并指向跟随错误引起的中断。因此，软件引发的中断故意与错误引起的中断区分开来，并用于扩展在DMA控制器内通常固定的硬件标签寄存器的大小范围。

2. 发明授权

US06324599B1 Computer system and method for tracking DMA transferred data within a read-ahead local buffer without interrupting the host processor 有权
标题翻译：用于跟踪在预读本地缓冲区中的DMA传输数据而不中断主机处理器的计算机系统和方法
公开(公告)号：US06324599B1
公开(公告)日：2001-11-27
申请号：US09228477
申请日：1999-01-11
申请人： Ning Zhou , Steven E. Olson
发明人： Ning Zhou , Steven E. Olson
IPC分类号： G06F1314
CPC分类号： G06F13/28
摘要： A computer system or computer system main memory is provided. The computer system includes a secondary memory and a buffer. The buffer is one having a faster access time than the secondary memory, and data placed within the buffer can be controlled by a control block configured with a control field and a byte count value of data bytes transferred during a DMA cycle, or a chain of DMA cycles. A counter may be used to increment the byte count within one or more control blocks during transfer of data bytes from secondary memory to the buffer. A requester is coupled to forward a read request that is serviced from the buffer if an address of the read request is included within an address incremented by the byte count. Both the control blocks and the buffer can be contained within a main memory local to the requester. Each control block includes a pointer field which points to a respective storage region of the buffer, and also contains the byte count field incremented during transfer of data bytes to one or more of the storage regions. If the previous read request address incremented by the byte count value encompasses the current read request address, then the current read request will be serviced entirely from the faster buffer rather than the slower secondary memory.
摘要翻译：提供了一种计算机系统或计算机系统主存储器。计算机系统包括辅助存储器和缓冲器。缓冲器具有比辅助存储器更快的访问时间，并且放置在缓冲器内的数据可以由配置有在DMA周期期间传送的数据字节的控制字段和字节计数值的控制块来控制，或者链 DMA周期。在将数据字节从辅助存储器传输到缓冲器期间，可以使用计数器来增加一个或多个控制块内的字节计数。如果读请求的地址被包括在由字节计数增加的地址中，则请求者被耦合以转发从缓冲器服务的读请求。控制块和缓冲区都可以包含在请求者本地的主存储器中。每个控制块包括指向缓冲器的相应存储区域的指针字段，并且还包含在将数据字节传送到一个或多个存储区域期间递增的字节计数字段。如果以字节计数值递增的先前读取请求地址包含当前读取请求地址，则当前的读取请求将完全从较快的缓冲区而不是较慢的辅助存储器进行服务。

3. 发明授权

US06233628B1 System and method for transferring data using separate pipes for command and data 有权
标题翻译：用于使用命令和数据的单独管道传输数据的系统和方法
公开(公告)号：US06233628B1
公开(公告)日：2001-05-15
申请号：US09227114
申请日：1999-01-08
申请人： Dan Salmonsen , Steven E. Olson , Ning (Eric) Zhou
发明人： Dan Salmonsen , Steven E. Olson , Ning (Eric) Zhou
IPC分类号： G06F1300
CPC分类号： G06F3/0626 , G06F3/0656 , G06F3/0677
摘要： A computer system includes a host computer and a peripheral memory device such as a CD ROM which are interconnected by a bus including a plurality of pipes defined by packets, time division multiplexing, frequency division multiplexing, or code division multiplexing. A plurality of pipe configuration registers are maintained for controlling bus configuration. A BUS controller for the bus includes a plurality of registers for controlling data transfer including pipe data flow direction, packet size, control information, bandwidth setting, and descriptor pointer. The plurality of pipes can have different bandwidths and latencies to efficiently facilitate the transfer of commands, data, and control information. The peripheral memory device is able to transfer and receive data directly to and from the host computer using a dedicated pipe without the need of a buffer memory at the peripheral device.
摘要翻译：计算机系统包括主计算机和诸如CD ROM的外围存储设备，其通过包括由分组定义的多个管道的总线互连，时分复用，频分复用或码分复用。保持多个管道配置寄存器用于控制总线配置。用于总线的BUS控制器包括多个用于控制数据传输的寄存器，包括管道数据流向，分组大小，控制信息，带宽设置和描述符指针。多个管道可以具有不同的带宽和延迟以有效地促进命令，数据和控制信息的传送。外围存储器设备能够使用专用管道直接传输和从主计算机接收数据，而不需要在外围设备处的缓冲存储器。

4. 发明授权

US06199121B1 High speed dynamic chaining of DMA operations without suspending a DMA controller or incurring race conditions 有权
标题翻译：高速动态链接DMA操作，而不会暂停DMA控制器或引发竞争条件
公开(公告)号：US06199121B1
公开(公告)日：2001-03-06
申请号：US09130885
申请日：1998-08-07
申请人： Steven E. Olson , Jhy-Ping Shaw
发明人： Steven E. Olson , Jhy-Ping Shaw
IPC分类号： G06F1300
CPC分类号： G06F13/28
摘要： A method and apparatus for dynamic chaining of DMA operations that includes a count to keep track of control blocks associated with such operations when appended to a current chain of control blocks. The count is checked by a DMA controller upon completing the data-transfer operation associated with each block or each control-block chain depending on the use of a wait bit. Memory used to hold control blocks may be preallocated with anticipated control blocks associated in a predefined linked list to avoid the need for subsequently updating existing control blocks when new blocks are appended to a chain.
摘要翻译：一种用于动态链接DMA操作的方法和装置，其包括当附加到当前控制块链时跟踪与这种操作相关联的控制块的计数。根据等待位的使用，在完成与每个块或每个控制块链相关联的数据传送操作时，由DMA控制器检查计数。用于保持控制块的存储器可以预先分配与预定链接列表相关联的预期控制块，以避免在将新的块附加到链时随后更新现有控制块的需要。

5. 发明授权

US06128257A Personal computer based CD-ROM disc drive table of content assembly 有权
标题翻译：基于个人电脑的CD-ROM光盘驱动器表的内容组装
公开(公告)号：US06128257A
公开(公告)日：2000-10-03
申请号：US235386
申请日：1999-01-22
申请人： Ning Eric Zhou , Steven E. Olson , Robert Griffith
发明人： Ning Eric Zhou , Steven E. Olson , Robert Griffith
IPC分类号： G11B23/36 , G11B27/10 , G11B27/11 , G11B27/30 , G11B27/32 , G11B17/22
CPC分类号： G11B27/329 , G11B23/36 , G11B27/11 , G11B27/3063 , G11B2220/213 , G11B2220/2545 , G11B2220/65 , G11B27/105
摘要： A personal computer capable of creating a table of contents (TOC) for a CD-ROM in response to receipt of lead-in Sub-channel Q data from a CD-ROM disc drive. The personal computer includes a computer readable memory storing a first and second set of instructions. The first set of instructions implement a read lead-in command to read lead-in Sub-channel Q data of the CD-ROM in the CD-ROM disc drive. The second set of instructions create a TOC and store the TOC in the computer readable memory in response to receipt of the lead-in Sub-channel Q data from the CD-ROM disc drive.
摘要翻译：响应于从CD-ROM光盘驱动器接收到导入子信道Q数据，能够创建用于CD-ROM的内容表（TOC）的个人计算机。个人计算机包括存储第一和第二组指令的计算机可读存储器。第一组指令实现读取导入命令以读取CD-ROM光盘驱动器中的CD-ROM的导入子信道Q数据。响应于从CD-ROM盘驱动器接收到导入子信道Q数据，第二组指令创建TOC并将TOC存储在计算机可读存储器中。

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