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1. 发明授权

US5943227A Programmable synchronous step down DC-DC converter controller 失效
标题翻译：可编程同步降压型DC-DC转换器控制器
公开(公告)号：US5943227A
公开(公告)日：1999-08-24
申请号：US672487
申请日：1996-06-26
申请人： Stephen W. Bryson , Tony Wong , Brian C. Lombard
发明人： Stephen W. Bryson , Tony Wong , Brian C. Lombard
IPC分类号： H02M3/156 , H02M3/24 , G05F1/40
CPC分类号： H02M3/156 , H02M2001/0025
摘要： An monolithic programmable dc--dc converter controller integrated circuit with a high speed synchronous controller and a 4-bit programmable DAC to provide an operating voltage to an external device such as a microprocessor in response to a code programmed in the external device. The 4-bit programmable DAC outputs a signal which is combined with a precise reference voltage to provide voltages to the external device in increments of 100 millivolts.
摘要翻译：具有高速同步控制器和4位可编程DAC的单片可编程DC-DC转换器控制器集成电路，用于响应于外部设备中编程的代码向外部设备（如微处理器）提供工作电压。 4位可编程DAC输出一个与精确参考电压相结合的信号，以100毫伏为增量向外部设备提供电压。

2. 发明授权

US5377202A Method and apparatus for limiting pin driver offset voltages 失效
标题翻译：用于限制引脚驱动器偏移电压的方法和装置
公开(公告)号：US5377202A
公开(公告)日：1994-12-27
申请号：US56097
申请日：1993-05-03
申请人： Stephen W. Bryson , Alan T. Kondo , Don N. Lee
发明人： Stephen W. Bryson , Alan T. Kondo , Don N. Lee
IPC分类号： G01R31/319 , G05B23/02 , G01R15/08
CPC分类号： G01R31/31924
摘要： A test equipment pin driver having a main output channel including a pulse forming circuit, a buffer and an output amplifier connected in series. The pulse forming circuit provides pulses that are timed to a data input signal, and the buffer passes the pulses to the amplifier which produces driver pulses adapted to be transmitted to a device under test. The high and low voltage levels of the driver pulses are made substantially the same as programmed high and low voltages by providing scaled replicas of the buffer and amplifier, and using closed loop compensation to accurately drive the replica outputs to the high and low programmed voltages, respectively. The replicas mirror the DC performance of the buffer and amplifier of the main output channel, and clamping voltages are provided from the closed loops to enable operation of the main output channel in a manner that produces driver pulses with the programmed high and low voltage levels.
摘要翻译：一种测试设备引脚驱动器，具有包括串联连接的脉冲形成电路，缓冲器和输出放大器的主输出通道。脉冲形成电路提供定时到数据输入信号的脉冲，并且缓冲器将脉冲传递到放大器，该放大器产生适于被传送到被测器件的驱动脉冲。通过提供缓冲器和放大器的缩放副本以及使用闭环补偿来将复制输出精确地驱动到高和低编程电压，驱动器脉冲的高电平和低电压电平基本上与编程的高和低电压相同，分别。复制镜反映了主输出通道的缓冲器和放大器的DC性能，并且从闭环提供钳位电压，以使得能够以编程的高电压和低电压电平产生驱动器脉冲的方式操作主输出通道。

3. 发明授权

US08476886B1 Differential hysteretic DC-DC converter 有权
标题翻译：差分滞回DC-DC转换器
公开(公告)号：US08476886B1
公开(公告)日：2013-07-02
申请号：US12127670
申请日：2008-05-27
申请人： Francesco Carobolante , Stephen W. Bryson
发明人： Francesco Carobolante , Stephen W. Bryson
IPC分类号： G05F1/565 , G05F1/569 , G05F1/575
CPC分类号： H02M3/1563
摘要： A hysteretic DC-DC converter includes a reference circuit, a hysteretic comparator, and a control circuit. The hysteretic comparator may be configured to compare a monitored output of the converter to a reference signal generated by the reference circuit and to compare a load ground of the output of the converter to a reference signal ground of the reference signal. The hysteretic comparator may perform the aforementioned comparisons simultaneously. The hysteretic comparator may generate a comparator output based on the comparison of the output of the converter to the reference signal and the comparison of the load ground to the reference signal ground. The control circuit may vary a control output to increase or decrease the output of the converter based on the comparator output.
摘要翻译：迟滞DC-DC转换器包括参考电路，迟滞比较器和控制电路。迟滞比较器可以被配置为将转换器的监视输出与由参考电路产生的参考信号进行比较，并将转换器的输出的负载地与参考信号的参考信号地相比较。滞后比较器可以同时执行上述比较。迟滞比较器可以基于转换器的输出与参考信号的比较以及负载地与参考信号地的比较来产生比较器输出。控制电路可以根据比较器输出改变控制输出以增加或减少转换器的输出。

4. 发明授权

US5905370A Programmable step down DC-DC converter controller 失效
标题翻译：可编程降压型DC-DC转换器控制器
公开(公告)号：US5905370A
公开(公告)日：1999-05-18
申请号：US851972
申请日：1997-05-06
申请人： Stephen W. Bryson
发明人： Stephen W. Bryson
IPC分类号： H02M3/155 , H02M3/157 , H02M3/158 , G05F1/40 , G05B24/02
CPC分类号： H02M3/157 , H02M3/1588 , Y02B70/1466
摘要： A programmable DC-DC converter controller with a high speed synchronous controller and a 5-bit programmable DAC provides an operating voltage to an external device (such as a microprocessor) in response to a 5 bit code programmed in the external device. The 5-bit programmable DAC outputs a signal which provides voltages to the external device in increments of e.g. 50 or 100 millivolts, in respectively two different voltage ranges.
摘要翻译：具有高速同步控制器和5位可编程DAC的可编程DC-DC转换器控制器响应于外部设备中编程的5位代码，为外部设备（如微处理器）提供工作电压。 5位可编程DAC输出以例如增量的方式向外部设备提供电压的信号。 50或100毫伏，分别在两个不同的电压范围内。

5. 发明授权

US5357211A Pin driver amplifier 失效
标题翻译：引脚驱动放大器
公开(公告)号：US5357211A
公开(公告)日：1994-10-18
申请号：US56093
申请日：1993-05-03
申请人： Stephen W. Bryson , Alan T. Kondo , Don N. Lee
发明人： Stephen W. Bryson , Alan T. Kondo , Don N. Lee
IPC分类号： G01R31/319 , H03F3/30 , H03F3/26
CPC分类号： G01R31/31924 , H03F3/3076
摘要： A pin driver amplifier having a complementary pair of transistors with a pair of resistors coupled between the respective emitters. A node between the resistors is coupled through an output series resistor to an output terminal adapted for connection of a transmission line that conducts driver pulses of predetermined voltage levels and timing to a device under test. A capacitor is tied between the emitters to provide a substantially constant reverse termination impedance for the transmission line thereby reducing reflections. Also, an RC network is coupled between the output terminal and ground to further reduce reflections. The amplifier transistors are driven by respective buffer transistor emitters that are tied together by a capacitor to make the positive and negative going drive capabilities for the amplifier transistors more equal. Further, capacitors are coupled between the amplifier collectors and ground to provide a bypass for parasitic inductance in the supply voltage wires.
摘要翻译：一个引脚驱动放大器，具有互补的一对晶体管，一对电阻耦合在相应的发射极之间。电阻器之间的节点通过输出串联电阻器耦合到适于连接传输线路的输出端子，传输线路将预定电压电平的驱动器脉冲和定时传送到被测器件。电容器被连接在发射器之间以为传输线提供基本恒定的反向终止阻抗，从而减少反射。此外，RC网络耦合在输出端子和地之间以进一步减少反射。放大器晶体管由相应的缓冲晶体管发射极驱动，其通过电容器连接在一起，以使放大器晶体管的正负驱动能力更相等。此外，电容器耦合在放大器集电极和地之间，为电源电压线中的寄生电感提供旁路。

6. 发明授权

US5864225A Dual adjustable voltage regulators 失效
标题翻译：双可调电压调节器
公开(公告)号：US5864225A
公开(公告)日：1999-01-26
申请号：US868662
申请日：1997-06-04
申请人： Stephen W. Bryson
发明人： Stephen W. Bryson
IPC分类号： G05F1/575 , G06F1/26 , H02J1/10 , G05F1/40
CPC分类号： G05F1/575 , G06F1/26 , H02J1/10 , H02M2001/0045 , H02M2001/009 , Y10T307/305 , Y10T307/352 , Y10T307/549
摘要： A dual adjustable voltage regulator combining a DC--DC switching regulator with a linear regulator implemented on a single chip is disclosed. The invention provides switching circuitry that can select between a fixed output voltage level and a user-adjustable output voltage. The circuit further provides means to automatically detect and generate power supply voltage levels as required by the system.
摘要翻译：公开了一种将DC-DC开关稳压器与在单个芯片上实现的线性稳压器组合的双稳态稳压器。本发明提供可在固定输出电压电平和用户可调输出电压之间进行选择的开关电路。该电路还提供了根据系统要求自动检测和产生电源电压电平的装置。

7. 发明授权

US07538583B2 High voltage integrated circuit driver with a high voltage PMOS bootstrap diode emulator 有权
标题翻译：具有高压PMOS自举二极管仿真器的高压集成电路驱动器
公开(公告)号：US07538583B2
公开(公告)日：2009-05-26
申请号：US11517629
申请日：2006-09-08
申请人： Stephen W. Bryson
发明人： Stephen W. Bryson
IPC分类号： H03K19/094 , H03K19/0175 , H03L7/06
CPC分类号： H03K17/063 , H03F3/2171 , H03F2200/31 , H03F2200/351 , H03K17/6871 , H03K19/01735
摘要： A high voltage circuit driver includes high and low side driver cells to drive a high and a low side power MOSFET, a bootstrap circuit to energize the high side driver cell, a high voltage PMOS transistor (HVPMOS) between a voltage source and the bootstrap circuit, wherein the HVPMOS is embedded in an N-isolation layer and is integrated with the driver cells. A bootstrap control circuit, for controlling the HVPMOS, includes a high voltage level shift stage, which can also be embedded in an N-isolation layer. The circuit driver is operated by switching the high side drive signal from high to low, the low side drive signal from low to high with a first delay, and a bootstrap control signal from high to low with an additional second delay. Also, the bootstrap capacitor is first charged by switching on the HVPMOS, and then it energizes the high side driver cell.
摘要翻译：高压电路驱动器包括用于驱动高和低侧功率MOSFET的高低侧驱动器单元，用于激励高侧驱动单元的自举电路，电压源与自举电路之间的高压PMOS晶体管（HVPMOS），其中HVPMOS嵌入在N隔离层中并与驱动器单元集成。用于控制HVPMOS的自举控制电路包括高压电平移位级，其也可嵌入在N隔离层中。电路驱动器通过将高侧驱动信号从高切换到低电平驱动信号，低侧驱动信号从低到高以第一延迟和自举控制信号从高到低以及另外的第二延迟来操作。此外，自举电容器首先通过接通HVPMOS进行充电，然后激活高侧驱动单元。

8. 发明授权

US07106105B2 High voltage integrated circuit driver with a high voltage PMOS bootstrap diode emulator 有权
公开(公告)号：US07106105B2
公开(公告)日：2006-09-12
申请号：US10895568
申请日：2004-07-21
申请人： Stephen W. Bryson
发明人： Stephen W. Bryson
IPC分类号： H03K19/094 , H03K19/0175 , H03K19/082 , H03L7/06
CPC分类号： H03K17/063 , H03F3/2171 , H03F2200/31 , H03F2200/351 , H03K17/6871 , H03K19/01735
摘要： A high voltage circuit driver includes high and low side driver cells to drive a high and a low side power MOSFET, a bootstrap circuit to energize the high side driver cell, a high voltage PMOS transistor (HVPMOS) between a voltage source and the bootstrap circuit, wherein the HVPMOS is embedded in an N-isolation layer and is integrated with the driver cells. A bootstrap control circuit, for controlling the HVPMOS, includes a high voltage level shift stage, which can also be embedded in an N-isolation layer. The circuit driver is operated by switching the high side drive signal from high to low, the low side drive signal from low to high with a first delay, and a bootstrap control signal from high to low with an additional second delay. Also, the bootstrap capacitor is first charged by switching on the HVPMOS, and then it energizes the high side driver cell.

9. 发明授权

US5842155A Method and apparatus for adjusting pin driver charging and discharging current 失效
标题翻译：用于调节引脚驱动器充电和放电电流的方法和装置
公开(公告)号：US5842155A
公开(公告)日：1998-11-24
申请号：US56094
申请日：1993-05-03
申请人： Stephen W. Bryson , Alan T. Kondo , Don N. Lee
发明人： Stephen W. Bryson , Alan T. Kondo , Don N. Lee
IPC分类号： G01R31/28 , G01R31/319 , G01R31/02
CPC分类号： G01R31/2844 , G01R31/31924
摘要： A method and apparatus for adjusting charging and discharging currents of a pin driver to optimize slew rates and overshoot for different types of logic circuits. The current charging and discharging circuits include respective transistors that are mirrored to a transistor whose current varies in accordance with VH-VL where VH and VL are programmed reference voltages defining the high and low voltage levels of the output driver pulses. Thus, when VH-VL is relatively large such as for CMOS outputs, slew rates are relatively high. However, when VH-VL is relatively small such as for ECL outputs, slew rates are reduced to prevent excessive overshoot.
摘要翻译：一种用于调整引脚驱动器的充电和放电电流以优化不同类型的逻辑电路的转换速率和过冲的方法和装置。当前的充电和放电电路包括与电流根据VH-VL变化的晶体管相对应的晶体管，其中VH和VL是限定输出驱动器脉冲的高电平和低电压电平的编程参考电压。因此，当VH-VL相对较大时，例如对于CMOS输出，转换速率相对较高。然而，当VH-VL相对较小时，例如对于ECL输出，压摆率被降低以防止过度过冲。

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