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    • 1. 发明授权
    • Apparatus and method for synchronizing a cache mode in a dual controller, dual cache memory system operating in a plurality of cache modes
    • 用于同步双控制器中的高速缓存模式的装置和方法,以多个高速缓存模式操作的双缓存存储器系统
    • US06279078B1
    • 2001-08-21
    • US08668512
    • 1996-06-28
    • Stephen J. SicolaWayne H. UmlandClark E. LubbersSusan G. Elkington
    • Stephen J. SicolaWayne H. UmlandClark E. LubbersSusan G. Elkington
    • G06F1216
    • G06F11/2017G06F11/1666G06F11/20G06F11/2097G06F12/0802
    • An apparatus and method for synchronizing a cache mode in a cache memory system in a computer to protect cache operations. The cache memory system has a first controller and a second controller and two cache modules and operates in a plurality of cache modes. The cache mode is stored as metadata in the cache modules and is detected by the first controller to determine the cache mode. Lock signals in the first controller are set in accordance with the cache mode detected to set the cache mode state in the first controller. The second controller copies the cache mode state from the first controller to synchronize both controllers in the same cache mode state. After a failure of the second controller, the first controller may lock access to both caches to recover data previously accessed by the second controller. The second controller restarts and copies the cache mode state from the first controller, so that both controllers return to the cache mode state prior to the failure of the second controller.
    • 一种用于使计算机中的高速缓冲存储器系统中的高速缓存模式同步以保护高速缓存操作的装置和方法。 高速缓冲存储器系统具有第一控制器和第二控制器以及两个高速缓存模块,并以多种高速缓存模式操作。 高速缓存模式作为元数据存储在缓存模块中,由第一控制器检测以确定高速缓存模式。 根据检测到的高速缓存模式来设置第一控制器中的锁定信号以设置第一控制器中的高速缓存模式状态。 第二个控制器从第一个控制器复制缓存模式状态,以同步两个控制器处于相同的高速缓存模式状态。 在第二控制器发生故障之后,第一控制器可以锁定对两个高速缓存的访问以恢复先前由第二控制器访问的数据。 第二控制器从第一控制器重新启动并复制缓存模式状态,使得两个控制器在第二控制器发生故障之前返回到高速缓存模式状态。
    • 2. 发明授权
    • Enabling mirror, nonmirror and partial mirror cache modes in a dual
cache system
    • 在双缓存系统中启用镜像,非镜像和部分镜像缓存模式
    • US5974506A
    • 1999-10-26
    • US671153
    • 1996-06-28
    • Stephen J. SicolaWayne H. UmlandThomas F. FavaClark E. LubbersSusan G. Elkington
    • Stephen J. SicolaWayne H. UmlandThomas F. FavaClark E. LubbersSusan G. Elkington
    • G11C29/00G06F11/00
    • G06F12/0871G11C29/74G06F2212/1032G06F2212/1044G06F2212/286
    • A cache memory system is enabled into one of a plurality of cache modes in a cache memory system in a computer. The cache memory system has a first controller and two cache memories, the cache memories are partitioned into quadrants with two quadrants in each cache memory. A cache mode detector in the first controller detects a mirror cache mode set for the cache memory system. An address enabler in the first controller enables access to first pair of quadrants, one quadrant in each cache memory, in response to detection of a mirror cache mode. A second controller follows the cache mode set by the cache mode detector and has an address enabler. The address enabler in the second controller enables access to both quadrants in one cache memory in a non-mirror cache mode, and enables the access to a second pair of quadrants, one quadrant in each cache memory, in response to detection of a mirror cache mode by said cache mode detector.
    • 高速缓冲存储器系统在计算机的高速缓冲存储器系统中被启用为多个高速缓存模式之一。 高速缓冲存储器系统具有第一控制器和两个高速缓存存储器,高速缓冲存储器被划分成每个高速缓冲存储器中具有两个象限的象限。 第一控制器中的高速缓存模式检测器检测为高速缓冲存储器系统设置的镜像缓存模式。 响应于检测到镜像高速缓存模式,第一控制器中的地址启用器使得能够访问第一对象限,每个高速缓冲存储器中的一个象限。 第二个控制器遵循由高速缓存模式检测器设置的高速缓存模式,并具有地址启用器。 第二控制器中的地址启用器使得能够以非镜像高速缓存模式访问一个高速缓冲存储器中的两个象限,并且响应于镜像缓存的检测,使得能够访问第二对象限,每个高速缓冲存储器中的一个象限 模式由所述高速缓存模式检测器。
    • 3. 发明授权
    • Stacked skip list data structures
    • 堆叠的跳过列表数据结构
    • US5761501A
    • 1998-06-02
    • US537375
    • 1995-10-02
    • Clark E. LubbersSusan G. Elkington
    • Clark E. LubbersSusan G. Elkington
    • G06F17/30
    • G06F17/30955Y10S707/99933
    • Disclosed herein is a stacked skip list data structure for maintaining select nodes on multiple lists. The data structure includes a primary and a secondary skip list of nodes. Each node in the primary skip list uses at least one forward pointer in a primary array of forward pointers and provides a node level field for storing the level of such node, the level determined by the number of pointers being used. A secondary skip list is stacked on the primary skip list of nodes. It includes a subset (zero or more nodes) occurring on the primary skip list and utilizes zero or more unused forward pointers in the primary array as its forward pointers. Thus, a system agent performing operations on the secondary skip list utilizes the node level in the node level field as an index into the primary array of forward pointers to locate the secondary array of forward pointers.
    • 这里公开了用于维护多个列表上的选择节点的堆叠跳过列表数据结构。 数据结构包括节点的主要和次要跳过列表。 主跳过列表中的每个节点在前向指针的主阵列中使用至少一个前向指针,并提供用于存储此类节点级别的节点级别字段,该级别由所使用的指针数确定。 次跳过列表堆叠在节点的主跳过列表上。 它包括发生在主跳过列表上的子集(零个或多个节点),并将主数组中的零个或多个未使用的前向指针用作其前向指针。 因此,在次跳过列表上执行操作的系统代理使用节点级字段中的节点级作为前向指针的主阵列的索引,以定位前向指针的辅助数组。
    • 4. 发明授权
    • Enhanced raid write hole protection and recovery
    • 增强了RAID写洞保护和恢复
    • US5774643A
    • 1998-06-30
    • US542536
    • 1995-10-13
    • Clark E. LubbersSusan G. ElkingtonRonald H. McLean
    • Clark E. LubbersSusan G. ElkingtonRonald H. McLean
    • G06F11/10G06F11/20G11B20/18
    • G06F11/1435G06F11/1076G11B20/1833G06F11/1666G06F11/2007G06F11/2089G06F2211/1009
    • Disclosed is a method and apparatus for reconstructing data in a computer system employing a modified RAID 5 data protection scheme. The computer system includes a write back cache composed of non-volatile memory for storing (1) writes outstanding to a device and associated data read, and (2) storing metadata information in the non-volatile memory. The metadata includes a first field containing the logical block number or address (LBN or LBA) of the data, a second field containing the device ID, and a third field containing the block status. From the metadata information it is determined where the write was intended when the crash occurred. An examination is made to determine whether parity is consistent across the slice, and if not, the data in the non-volatile write back cache is used to reconstruct the write that was occurring when the crash occurred to insure consistent parity, so that only those blocks affected by the crash have to be reconstructed.
    • 公开了一种用于在采用修改的RAID 5数据保护方案的计算机系统中重建数据的方法和装置。 计算机系统包括由非易失性存储器组成的回写高速缓存,用于存储(1)对设备的写入和相关数据读取,以及(2)将元数据信息存储在非易失性存储器中。 元数据包括包含数据的逻辑块号或地址(LBN或LBA)的第一字段,包含设备ID的第二字段和包含块状态的第三字段。 从元数据信息中,确定发生崩溃时写入的位置。 进行检查以确定跨片段的奇偶校验是否一致,如果不是,非易失性回写高速缓存中的数据用于重建发生崩溃时发生的写入,以确保一致的奇偶校验,以便只有那些 受碰撞影响的区块必须重建。
    • 5. 发明授权
    • Failover and failback of write cache data in dual active controllers
    • 在双主动控制器中写入高速缓存数据的故障转移和故障恢复
    • US07444541B2
    • 2008-10-28
    • US11479846
    • 2006-06-30
    • Clark E. LubbersMichael D. WalkerSusan G. Elkington
    • Clark E. LubbersMichael D. WalkerSusan G. Elkington
    • G06F11/00
    • G06F11/2092G06F2201/85
    • A data storage system is provided with a pair of controllers and circuitry configured for failing back from a single active write back mode to a dual active write back mode by copying cached data directly from a cache of a survivor controller of the pair of controllers to a cache of the other controller. A method is provided for failing over from a dual active mode of first and second controllers to a single active mode of the first controller by relying on previously mirrored cache data by the second controller; reinitializing the second controller; and failing back to the dual active mode by copying cached data directly from the first controller to the second controller.
    • 数据存储系统设置有一对控制器和电路,其被配置为通过将高速缓存的数据直接从该对控制器的幸存控制器的高速缓存复制到一个控制器而将其从单活动回写模式转回到双主动回写模式 缓存其他控制器。 提供一种通过依靠第二控制器先前镜像的高速缓存数据将第一和第二控制器的双活动模式故障转移到第一控制器的单个活动模式的方法; 重新初始化第二个控制器; 并且通过将高速缓存的数据直接从第一控制器复制到第二控制器而返回到双活动模式。
    • 8. 发明授权
    • Atomic update of EDC protected data
    • 原子更新EDC保护的数据
    • US5684944A
    • 1997-11-04
    • US514711
    • 1995-08-14
    • Clark E. LubbersSusan G. Elkington
    • Clark E. LubbersSusan G. Elkington
    • G06F11/10G11C29/00G06F11/00
    • G06F11/1044G11C29/88
    • A method for atomically updating Error Detection Code (EDC) protected data in memory such that the EDC protection is maintained to the granularity of a single microprocessor machine instruction. The method is employed in a memory system having a volatile storage area and at least one nonvolatile storage area, each of the storage areas storing a copy of the protected data and two copies of its associated error detection code. The volatile and nonvolatile storage areas each have a first storage location for storing one of the copies of the associated error code and a second storage location for storing the other of the copies of the associated error code. In such a system, a chosen field with the data structure in the volatile copy is updated. Once the volatile copy is updated, a new error detection code is computed with the data in the volatile copy. The new error detection code is then written to the first storage location in each of the storage areas, volatile and nonvolatile, one at a time. Once the copies have been written with the new EDC, the chosen field of the data structure within the nonvolatile copy is updated. Lastly, the new error code is written to the second storage location in each of the updated storage areas.
    • 一种用于原子更新存储器中的错误检测码(EDC)保护数据的方法,使得EDC保护被保持为单个微处理器机器指令的粒度。 该方法用于具有易失性存储区域和至少一个非易失性存储区域的存储器系统中,每个存储区域存储受保护数据的副本和其相关联的错误检测码的两个副本。 易失性和非易失性存储区域各自具有用于存储相关错误代码的副本之一的第一存储位置和用于存储相关联的错误代码的另一副本的第二存储位置。 在这样的系统中,更新了具有易失性拷贝中的数据结构的所选字段。 一旦更新了易失性拷贝,就会使用易失性拷贝中的数据来计算新的错误检测码。 然后,将新的错误检测码写入每个存储区域中的易失性和非易失性存储区域中的第一存储位置,一次一个。 一旦使用新的EDC写入了副本,则更新非易失性拷贝中数据结构的选定字段。 最后,将新的错误代码写入每个更新的存储区域中的第二存储位置。
    • 9. 发明授权
    • Data structure enhancements for in-place sorting of a singly linked list
    • 单链接列表就地排序的数据结构增强
    • US5671406A
    • 1997-09-23
    • US544949
    • 1995-10-18
    • Clark E. LubbersSusan G. Elkington
    • Clark E. LubbersSusan G. Elkington
    • G06F7/24G06F17/30G06F7/08G06F7/00
    • G06F17/30958G06F7/24Y10S707/99937Y10S707/99942Y10S707/99943Y10S707/99945
    • An apparatus and method for performing a skip list insertion sort on a singly linked list of elements is provided. Each element to be sorted includes a key, an element pointer in an element pointer field and a flag bit. Also provided is an indexed array of pointer arrays. If an element is to be inserted at a node level greater than zero, a free pointer array is allocated by storing an index corresponding to the allocated pointer array in the element pointer field and setting the corresponding flag bit. If a free pointer array is not available, then the node level of the element is forced to zero. If the level of the element is either assigned as or forced to zero, the flag bit is not set and the pointer array itself occupies the element pointer field as the element pointer instead of the index. Thus, the pointer to the element pointer field will point directly to the specified pointer array location without having to index into the array of pointer arrays. The skip list insertion search part of the sorting routine for each subsequent item to be inserted then tests the flag bit when traversing the list to determine whether the pointer array is in the array of pointer arrays or the element pointer field itself.
    • 提供了用于在单个链接的元素列表上执行跳过列表插入排序的装置和方法。 要排序的每个元素包括一个键,元素指针字段中的元素指针和一个标志位。 还提供了指针数组的索引数组。 如果要在大于零的节点级别插入元素,则通过将分配的指针数组对应的索引存储在元素指针字段中并设置相应的标志位来分配空闲指针数组。 如果空闲指针数组不可用,则元素的节点级别被强制为零。 如果元素的等级被分配为或被强制为零,则不设置标志位,并且指针数组本身占据元素指针字段作为元素指针而不是索引。 因此,指向元素指针字段的指针将直接指向指定的指针数组位置,而不必索引到指针数组的数组中。 要插入的每个后续项目的排序例程的跳过列表插入搜索部分然后在遍历列表时测试标志位,以确定指针数组是否在指针数组的数组中或元素指针字段本身。