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1. 发明授权

US07849248B2 Method and system for combining multiple serial attached small computer system interface (SAS) expanders 有权
标题翻译：用于组合多个串行连接的小型计算机系统接口（SAS）扩展器的方法和系统
公开(公告)号：US07849248B2
公开(公告)日：2010-12-07
申请号：US12384289
申请日：2009-04-02
申请人： Stephen B. Johnson , Timothy E. Hoglund , Louis H. Odenwald, Jr.
发明人： Stephen B. Johnson , Timothy E. Hoglund , Louis H. Odenwald, Jr.
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： At least one first numbered phy of a first SAS expander is grouped with at least one second numbered phy of a second SAS expander physically separate from the first SAS expander into at least one common SAS wide port. An identical SAS address is assigned to the first SAS expander and the second SAS expander for operating the first SAS expander and the second SAS expander to behave and respond as a single, cohesive SAS expander. The first SAS expander is directly connected to the second SAS expander for inter-expander communications.
摘要翻译：第一SAS扩展器的至少一个第一编号的phy与第二SAS扩展器的至少一个第二编号的phy分组，其与第一SAS扩展器物理分离成至少一个公共SAS宽端口。分配相同的SAS地址到第一个SAS扩展器和第二个SAS扩展器，用于操作第一个SAS扩展器和第二个SAS扩展器，使其作为一个单一的，内聚的SAS扩展器来运行和响应。第一个SAS扩展器直接连接到第二个SAS扩展器，用于扩展器间通信。

2. 发明申请

US20100064085A1 Combining multiple SAS expanders to provide single sas expander functionality 有权
标题翻译：组合多个SAS扩展器以提供单个sas扩展器功能
公开(公告)号：US20100064085A1
公开(公告)日：2010-03-11
申请号：US12384289
申请日：2009-04-02
申请人： Stephen B. Johnson , Timothy E. Hoglund , Louis H. Odenwald, JR.
发明人： Stephen B. Johnson , Timothy E. Hoglund , Louis H. Odenwald, JR.
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： At least one first numbered phy of a first SAS expander is grouped with at least one second numbered phy of a second SAS expander physically separate from the first SAS expander into at least one common SAS wide port. An identical SAS address is assigned to the first SAS expander and the second SAS expander for operating the first SAS expander and the second SAS expander to behave and respond as a single, cohesive SAS expander. The first SAS expander is directly connected to the second SAS expander for inter-expander communications.
摘要翻译：第一SAS扩展器的至少一个第一编号的phy与第二SAS扩展器的至少一个第二编号的phy分组，其与第一SAS扩展器物理分离成至少一个公共SAS宽端口。分配相同的SAS地址到第一个SAS扩展器和第二个SAS扩展器，用于操作第一个SAS扩展器和第二个SAS扩展器，使其作为一个单一的，内聚的SAS扩展器来运行和响应。第一个SAS扩展器直接连接到第二个SAS扩展器，用于扩展器间通信。

3. 发明授权

US06721320B1 Method and apparatus for fibre channel identification and retrieval 有权
标题翻译：用于光纤通道识别和检索的方法和装置
公开(公告)号：US06721320B1
公开(公告)日：2004-04-13
申请号：US09216400
申请日：1998-12-18
申请人： Timothy E. Hoglund , Louis H. Odenwald, Jr. , Elizabeth G. Rodriguez
发明人： Timothy E. Hoglund , Louis H. Odenwald, Jr. , Elizabeth G. Rodriguez
IPC分类号： H04L1228
CPC分类号： H04L49/552 , H04L49/357
摘要： The invention relates to an improved Fiber Channel data management technique. More specifically, this patent relates to an improved scheme for managing the related data in related frames that form a sequence. This patent also generally relates to the management of multiple, active sequences which are simultaneously in transit on a Fiber Channel. This invention provides a means for efficiently locating the sequence status block associated with an arbitrary Fiber Channel sequence by using the source identifier field, the originator exchange identifier field and/or the sequence identifier fields of a Fiber Channel frame header to construct a hash table lookup search.
摘要翻译：本发明涉及一种改进的光纤通道数据管理技术。更具体地，本专利涉及用于管理形成序列的相关帧中的相关数据的改进方案。该专利还通常涉及在光纤通道上同时传输的多个主动序列的管理。本发明提供了一种用于通过使用光纤通道帧头的源标识符字段，发起者交换标识符字段和/或序列标识符字段来有效地定位与任意光纤通道序列相关联的序列状态块的装置，以构建散列表查找搜索。

4. 发明授权

US08230134B2 Fast path SCSI IO 有权
标题翻译：快速路径SCSI IO
公开(公告)号：US08230134B2
公开(公告)日：2012-07-24
申请号：US12765027
申请日：2010-04-22
申请人： Stephen B. Johnson , Timothy E. Hoglund
发明人： Stephen B. Johnson , Timothy E. Hoglund
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , Y02D10/14
摘要： A hardware automated IO path, comprising a message transport unit for transporting an IO request to a local memory via a DMA operation and determining a LMID for associating with a request descriptor of the IO request; a fastpath engine for validating the request descriptor and creating a fastpath descriptor based on the request descriptor; a data access module for performing an IO operation based on the fastpath descriptor and posting a completion message into the fastpath completion queue upon a successful completion of the IO operation. The fastpath engine is further configured for: receiving the completion message, releasing the IO request stored in the local memory, and providing a reply message based on the completion message. The message transport unit is further configured for providing the reply message in response to the IO request.
摘要翻译：一种硬件自动IO路径，包括用于经由DMA操作将IO请求传送到本地存储器并确定用于与所述IO请求的请求描述符相关联的LMID的消息传输单元; 用于验证请求描述符并基于请求描述符创建快速路径描述符的快速引擎; 数据访问模块，用于在成功完成IO操作时，基于快速路径描述符执行IO操作并将完成消息发布到快速路径完成队列中。快速引擎还被配置为：接收完成消息，释放存储在本地存储器中的IO请求，以及基于完成消息提供回复消息。消息传送单元还被配置为响应于IO请求来提供应答消息。

5. 发明授权

US06810448B1 Method and apparatus for processing chain messages (SGL chaining) 失效
标题翻译：处理链接消息的方法和装置（SGL链接）
公开(公告)号：US06810448B1
公开(公告)日：2004-10-26
申请号：US09848569
申请日：2001-05-02
申请人： Stephen B. Johnson , Timothy E. Hoglund , Guy W. Kendall
发明人： Stephen B. Johnson , Timothy E. Hoglund , Guy W. Kendall
IPC分类号： G06F1314
CPC分类号： G06F13/28
摘要： A message-based I/O architecture comprising a list describing one or more source buffers and a message header. The list may be segmented in multiple memory locations. The message header may be configured to (i) indicate whether the list is segmented and (ii) provide information for linking the list when the list is segmented.
摘要翻译：基于消息的I / O架构，其包括描述一个或多个源缓冲器和消息头的列表。列表可以在多个存储器位置中分段。消息报头可以被配置为（i）指示列表是否被分段，并且（ii）在列表被分段时提供用于链接列表的信息。

6. 发明授权

US07590819B2 Compact memory management unit 有权
标题翻译：紧凑型内存管理单元
公开(公告)号：US07590819B2
公开(公告)日：2009-09-15
申请号：US11124536
申请日：2005-05-09
申请人： Stephen B. Johnson , Brad D. Besmer , Timothy E. Hoglund , Jana L. Richards
发明人： Stephen B. Johnson , Brad D. Besmer , Timothy E. Hoglund , Jana L. Richards
IPC分类号： G06F12/00 , G06F9/26 , G06F9/34
CPC分类号： G06F12/0292
摘要： A memory management unit (MMU) for a device controller that provides enhanced functionality while maintaining a small physical size or footprint, such that the die size required to manufacture the memory management unit circuitry within the device controller integrated circuit device remains small notwithstanding such enhanced functionality. This compact/tiny MMU provides virtual memory addressing and memory error detection functionality while maintaining a small physical die size. The small physical die size with enhanced functionality is obtained by improvements in translating virtual to physical addressing without use of extensive translation tables, which themselves would otherwise consume memory and associated die real estate. In addition, the MMU allows a firmware image containing code and data segments to be run-time swapped between internal shared context RAM and external memory.
摘要翻译：一种用于设备控制器的存储器管理单元（MMU），其在保持小的物理尺寸或占地面积的同时提供增强的功能，使得制造设备控制器集成电路设备内的存储器管理单元电路所需的管芯尺寸仍然很小，尽管具有这种增强的功能。这种紧凑型/微型MMU提供虚拟内存寻址和内存错误检测功能，同时保持较小的物理裸片大小。具有增强功能的小型物理尺寸通过改进虚拟到物理寻址的改进而获得，而不使用广泛的翻译表，其本身将消耗存储器和相关的裸片空间。此外，MMU允许包含代码和数据段的固件映像在内部共享上下文RAM和外部存储器之间进行运行时交换。

7. 发明申请

US20100306420A1 FAST PATH SCSI IO 有权
标题翻译：快速路径SCSI IO
公开(公告)号：US20100306420A1
公开(公告)日：2010-12-02
申请号：US12765027
申请日：2010-04-22
申请人： Stephen B. Johnson , Timothy E. Hoglund
发明人： Stephen B. Johnson , Timothy E. Hoglund
IPC分类号： G06F13/28
CPC分类号： G06F13/28 , Y02D10/14
摘要： A hardware automated IO path, comprising a message transport unit for transporting an IO request to a local memory via a DMA operation and determining a LMID for associating with a request descriptor of the IO request; a fastpath engine for validating the request descriptor and creating a fastpath descriptor based on the request descriptor; a data access module for performing an IO operation based on the fastpath descriptor and posting a completion message into the fastpath completion queue upon a successful completion of the IO operation. The fastpath engine is further configured for: receiving the completion message, releasing the IO request stored in the local memory, and providing a reply message based on the completion message. The message transport unit is further configured for providing the reply message in response to the IO request.
摘要翻译：一种硬件自动IO路径，包括用于经由DMA操作将IO请求传送到本地存储器并确定用于与所述IO请求的请求描述符相关联的LMID的消息传输单元; 用于验证请求描述符并基于请求描述符创建快速路径描述符的快速引擎; 数据访问模块，用于在成功完成IO操作时，基于快速路径描述符执行IO操作并将完成消息发布到快速路径完成队列中。快速引擎还被配置为：接收完成消息，释放存储在本地存储器中的IO请求，以及基于完成消息提供回复消息。消息传送单元还被配置为响应于IO请求来提供应答消息。

8. 发明授权

US06732198B1 Methods and apparatus for saving and restoring scatter/gather list processing context in intelligent controllers 有权
标题翻译：智能控制器中保存和恢复分散/收集列表处理环境的方法和设备
公开(公告)号：US06732198B1
公开(公告)日：2004-05-04
申请号：US09910658
申请日：2001-07-20
申请人： Stephen B. Johnson , Timothy E. Hoglund , Daniel E. Ballare
发明人： Stephen B. Johnson , Timothy E. Hoglund , Daniel E. Ballare
IPC分类号： G06F1314
CPC分类号： G06F9/30043 , G06F9/30032 , G06F9/3861 , G06F9/3879
摘要： A circuit and associated methods of operation for a standardized scatter/gather list processor component within DMACs and intelligent IOPs. The standardized circuit architecture and methods provide a register interface and associated processing capabilities to simplify firmware processing to save and restore context information regarding block transfer operations that are paused and resumed prior to completion. Furthermore, the invention provides for architecture and associated methods for processing of standard scatter/gather list elements by a standardized scatter/gather list processor embedded within DMACs and IOPs. Specifically, as applied in the context of SCSI or Fiber Channel IOPs, the scatter/gather list processor of the present invention simplifies IOP firmware processing to save the current block transfer context on occurrence of a SCSI disconnect and to restore the saved context on occurrence of a SCSI reselect.
摘要翻译： DMAC和智能IOP中的标准散射/收集列表处理器组件的电路和相关操作方法。标准化电路架构和方法提供了寄存器接口和相关联的处理能力，以简化固件处理以保存和恢复关于在完成之前暂停和恢复的块传送操作的上下文信息。此外，本发明提供了通过嵌入DMAC和IOP内的标准化分散/收集列表处理器来处理标准分散/收集列表元素的架构和相关方法。具体地说，如在SCSI或光纤通道IOP的上下文中应用的，本发明的分散/收集列表处理器简化了IOP固件处理，以便在出现SCSI断开时保存当前块传输上下文，并且在出现 SCSI重新选择。

9. 发明申请

US20100296815A1 METHODS AND APPARATUS FOR INTERCONNECTING SAS DEVICES USING EITHER ELECTRICAL OR OPTICAL TRANSCEIVERS 有权
标题翻译：使用电或光收发器互连SAS设备的方法和装置
公开(公告)号：US20100296815A1
公开(公告)日：2010-11-25
申请号：US12470704
申请日：2009-05-22
申请人： William K. Petty , Brian A. Day , Timothy E. Hoglund
发明人： William K. Petty , Brian A. Day , Timothy E. Hoglund
IPC分类号： H04B10/00
CPC分类号： G06F13/4072
摘要： Methods and systems for encoding and/or decoding digital signals representing serial attached SCSI (SAS) out of band (OOB) signals exchanged over an optical communication between two SAS devices. A SAS OOB signal to be transmitted from a first SAS device to a second SAS device is first encoded as a digitally encoded signal representing the analog SAS OOB signal and then transmitted over an optical communication medium to another SAS device. A receiving SAS device coupled to an optical communication medium decodes a received digitally encoded signal to detect a received, encoded SAS OOB signal and processes the received SAS OOB signal when receipt is detected. The digitally encoded signal may comprise an idle word portion and a burst word portion to represent various SAS OOB signals. Further, the digitally encoded signal may be precomputed in a variety of disparity forms and stored in a memory for lookup and retrieval.
摘要翻译：用于编码和/或解码表示通过两个SAS设备之间的光通信交换的串行连接SCSI（SAS）带外（OOB）信号的数字信号的方法和系统。要从第一SAS设备发送到第二SAS设备的SAS OOB信号首先被编码为表示模拟SAS OOB信号的数字编码信号，然后通过光通信介质传输到另一个SAS设备。耦合到光通信介质的接收SAS设备对所接收的数字编码信号进行解码，以检测接收到的编码的SAS OOB信号，并且当检测到接收时处理所接收的SAS OOB信号。数字编码的信号可以包括空闲字部分和突发字部分以表示各种SAS OOB信号。此外，数字编码信号可以以各种不同形式预先计算，并存储在用于查找和检索的存储器中。

10. 发明申请

US20100268904A1 APPARATUS AND METHODS FOR REGION LOCK MANAGEMENT ASSIST CIRCUIT IN A STORAGE SYSTEM 审中-公开
标题翻译：存储系统中区域锁定管理辅助电路的装置和方法
公开(公告)号：US20100268904A1
公开(公告)日：2010-10-21
申请号：US12760434
申请日：2010-04-14
申请人： Robert L. Sheffield , Gerald E. Smith , Timothy E. Hoglund , Adam Weiner
发明人： Robert L. Sheffield , Gerald E. Smith , Timothy E. Hoglund , Adam Weiner
IPC分类号： G06F12/14
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0619 , G06F3/0674
摘要： Apparatus and methods for improved region lock management in a storage controller. A region lock management circuit coupled with a memory is provided for integration in a storage controller. One or more I/O processor circuits of the storage controller transmit requests to the region lock management circuit to request a temporary lock for a region of storage on a volume of the storage system. The region lock management circuit determines whether the requested lock may be granted or whether it conflicts with other presently locked regions. Presently locked regions and regions to be locked are represented by region lock data structures. In one exemplary embodiment, the region lock data structures for each logical volume may be stored as a tree data structure. A tree assist circuit may also be provided to aid the region lock management circuit in managing the region lock tree data structures.
摘要翻译：用于改进存储控制器中的区域锁定管理的装置和方法。与存储器耦合的区域锁管理电路被提供用于集成在存储控制器中。存储控制器的一个或多个I / O处理器电路向区域锁定管理电路发送请求以对存储系统的卷上的存储区域请求临时锁定。区域锁定管理电路确定所请求的锁是否被授予，或者是否与其他当前锁定的区域冲突。当前被锁定的区域和被锁定的区域由区域锁定数据结构表示。在一个示例性实施例中，每个逻辑卷的区域锁定数据结构可以被存储为树形数据结构。还可以提供树辅助电路以帮助区域锁管理电路管理区域锁树数据结构。

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