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1. 发明申请

US20180159498A1 HETEROSTRUCTURE AND METHOD OF FABRICATION 审中-公开
公开(公告)号：US20180159498A1
公开(公告)日：2018-06-07
申请号：US15735477
申请日：2016-06-09
申请人： Soitec
发明人： Arnaud Castex , Daniel Delprat , Bernard Aspar , Ionut Radu
IPC分类号： H03H9/02 , H03H3/10
摘要： The present invention relates to a heterostructure, in particular, a piezoelectric structure, comprising a cover layer, in particular, a layer of piezoelectric material, the material of the cover layer having a first coefficient of thermal expansion, assembled to a support substrate, the support substrate having a second coefficient of thermal expansion substantially different from the first coefficient of thermal expansion, at an interface wherein the cover layer comprises at least a recess extending from the interface into the cover layer, and its method of fabrication.

2. 发明授权

US08790993B2 Method for molecular bonding of silicon and glass substrates 有权
标题翻译：硅和玻璃基板的分子键合方法
公开(公告)号：US08790993B2
公开(公告)日：2014-07-29
申请号：US13953679
申请日：2013-07-29
申请人： SOITEC
发明人： Sebastien Kerdiles , Daniel Delprat
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/67132 , H01L21/02 , H01L21/187 , H01L21/76251
摘要： A method for bonding a first substrate having a first surface to a second substrate having a second surface. This method includes the steps of holding the first substrate by at least two support points, positioning the first substrate and the second substrate so that the first surface and the second surface face each other, deforming the first substrate by applying between at least one pressure point and the two support points a strain toward the second substrate, bringing the deformed first surface and the second surface into contact, and progressively releasing the strain to facilitate bonding of the substrates while minimizing or avoiding the trapping of air bubbles between the substrates.
摘要翻译：一种用于将具有第一表面的第一基底结合到具有第二表面的第二基底的方法。该方法包括以下步骤：通过至少两个支撑点保持第一基板，将第一基板和第二基板定位成使得第一表面和第二表面彼此面对，使第一基板通过在至少一个压力点并且两个支撑点朝向第二基板的应变，使变形的第一表面和第二表面接触，并逐渐释放应变以促进基板的接合，同时最小化或避免在基板之间捕获气泡。

3. 发明申请

US20200280298A1 HETEROSTRUCTURE AND METHOD OF FABRICATION 审中-公开
公开(公告)号：US20200280298A1
公开(公告)日：2020-09-03
申请号：US16877309
申请日：2020-05-18
申请人： Soitec
发明人： Arnaud Castex , Daniel Delprat , Bernard Aspar , Ionut Radu
IPC分类号： H03H9/02 , H01L41/312 , H01L41/08 , H01L41/313 , H03H3/10
摘要： The present invention relates to a heterostructure, in particular, a piezoelectric structure, comprising a cover layer, in particular, a layer of piezoelectric material, the material of the cover layer having a first coefficient of thermal expansion, assembled to a support substrate, the support substrate having a second coefficient of thermal expansion substantially different from the first coefficient of thermal expansion, at an interface wherein the cover layer comprises at least a recess extending from the interface into the cover layer, and its method of fabrication.

4. 发明申请

US20130309841A1 METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES 有权
标题翻译：硅和玻璃基体的分子结合方法
公开(公告)号：US20130309841A1
公开(公告)日：2013-11-21
申请号：US13953679
申请日：2013-07-29
申请人： SOITEC
发明人： Sebastien Kerdiles , Daniel Delprat
IPC分类号： H01L21/02
CPC分类号： H01L21/67132 , H01L21/02 , H01L21/187 , H01L21/76251
摘要： The present invention concerns a method for bonding a first substrate having a first surface to a second substrate having a second surface. This method includes the steps of holding the first substrate by at least two support points, positioning the first substrate and the second substrate so that the first surface and the second surface face each other, deforming the first substrate by applying between at least one pressure point and the two support points a strain toward the second substrate, bringing the deformed first surface and the second surface into contact, and progressively releasing the strain to facilitate bonding of the substrates while minimizing or avoiding the trapping of air bubbles between the substrates.
摘要翻译：本发明涉及一种用于将具有第一表面的第一衬底与具有第二表面的第二衬底结合的方法。该方法包括以下步骤：通过至少两个支撑点保持第一基板，将第一基板和第二基板定位成使得第一表面和第二表面彼此面对，使第一基板通过在至少一个压力点并且两个支撑点朝向第二基板的应变，使变形的第一表面和第二表面接触，并逐渐释放应变以促进基板的接合，同时最小化或避免在基板之间捕获气泡。

5. 发明授权

US11637542B2 Heterostructure and method of fabrication 有权
公开(公告)号：US11637542B2
公开(公告)日：2023-04-25
申请号：US17075465
申请日：2020-10-20
申请人： Soitec
发明人： Arnaud Castex , Daniel Delprat , Bernard Aspar , Ionut Radu
IPC分类号： H03H9/02 , H01L41/08 , H03H3/04 , H03H9/64 , H01L41/312 , H01L41/313 , H01L41/187 , H03H3/10 , H01L41/47 , H01L41/332 , H01L41/337
摘要： The present invention relates to a heterostructure, in particular, a piezoelectric structure, comprising a cover layer, in particular, a layer of piezoelectric material, the material of the cover layer having a first coefficient of thermal expansion, assembled to a support substrate, the support substrate having a second coefficient of thermal expansion substantially different from the first coefficient of thermal expansion, at an interface wherein the cover layer comprises at least a recess extending from the interface into the cover layer, and its method of fabrication.

6. 发明申请

US20230005787A1 METHOD FOR FORMING A HANDLING SUBSTRATE FOR A COMPOSITE STRUCTURE INTENDED FOR RF APPLICATIONS AND HANDLING SUBSTRATE 有权
公开(公告)号：US20230005787A1
公开(公告)日：2023-01-05
申请号：US17756244
申请日：2020-11-25
申请人： Soitec
发明人： Young-Pil Kim , Daniel Delprat , Luciana Capello , Isabelle Bertrand , Frédéric Allibert
IPC分类号： H01L21/762 , H01L23/66 , H01L27/12 , H01L21/02
摘要： A handle substrate for a composite structure comprises a base substrate including an epitaxial layer of silicon on a monocrystalline silicon wafer obtained by Czochralski pulling, a passivation layer on and in contact with the epitaxial layer of silicon, and a charge-trapping layer on and in contact with the passivation layer. The monocrystalline silicon wafer of the base substrate exhibits a resistivity of between 10 and 500 ohm·cm, while the epitaxial layer of silicon exhibits a resistivity of greater than 2000 ohm·cm and a thickness ranging from 2 to 100 microns. The passivation layer is amorphous or polycrystalline. A method is described for forming such a substrate.

7. 发明申请

US20210050250A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR ON INSULATOR TYPE STRUCTURE BY LAYER TRANSFER 有权
公开(公告)号：US20210050250A1
公开(公告)日：2021-02-18
申请号：US16969350
申请日：2019-02-12
申请人： Soitec
发明人： Daniel Delprat , Damien Parissi , Marcel Broekaart
IPC分类号： H01L21/762 , H01L21/02
摘要： A method for manufacturing a semiconductor on insulator type structure by transfer of a layer from a donor substrate onto a receiver substrate, comprises: a) the supply of the donor substrate and the receiver substrate, b) the formation in the donor substrate of an embrittlement zone delimiting the layer to transfer, c) the bonding of the donor substrate on the receiver substrate, the surface of the donor substrate opposite to the embrittlement zone with respect to the layer to transfer being at the bonding interface, and d) the detachment of the donor substrate along the embrittlement zone. A step of controlled modification of the curvature of the donor substrate and/or the receiver substrate is performed before the bonding step.

8. 发明申请

US20200295138A1 METHOD FOR MANUFACTURING A STRUCTURE FOR FORMING A TRIDIMENSIONAL MONOLITHIC INTEGRATED CIRCUIT 审中-公开
公开(公告)号：US20200295138A1
公开(公告)日：2020-09-17
申请号：US16086275
申请日：2017-03-31
申请人： Soitec
发明人： Christophe Figuet , Ludovic Ecarnot , Bich-Yen Nguyen , Walter Schwarzenbach , Daniel Delprat , Ionut Radu
IPC分类号： H01L29/161 , H01L23/00
摘要： A method for manufacturing a structure comprising a first substrate comprising at least one electronic component likely to be damaged by a temperature higher than 400° C. and a semiconductor layer extending on the first comprises: (a) providing a first bonding metal layer on the first substrate, (b) providing a second substrate comprising successively: a semiconductor base substrate, a stack of a plurality of semiconductor epitaxial layers, a layer of SixGe1-x, with 0≤x≤1 being located at the surface of said stack opposite to the base substrate, and a second bonding metal layer, (c) bonding the first substrate and the second substrate through the first and second bonding metal layers at a temperature lower than or equal to 400° C., and (d) removing a part of the second substrate so as to transfer the layer of SixGe1-x on the first substrate using a selective etching process.

9. 发明申请

US20150056783A1 SYSTEMS AND METHODS FOR MOLECULAR BONDING OF SUBSTRATES 审中-公开
标题翻译：用于分子结合基板的系统和方法
公开(公告)号：US20150056783A1
公开(公告)日：2015-02-26
申请号：US14334328
申请日：2014-10-03
申请人： Soitec
发明人： Sebastien Kerdiles , Daniel Delprat
IPC分类号： H01L21/67 , H01L21/762
CPC分类号： H01L21/67132 , H01L21/02 , H01L21/187 , H01L21/76251
摘要： A method for bonding a first substrate having a first surface to a second substrate having a second surface. This method includes the steps of holding the first substrate by at least two support points, positioning the first substrate and the second substrate so that the first surface and the second surface face each other, deforming the first substrate by applying between at least one pressure point and the two support points a strain toward the second substrate, bringing the deformed first surface and the second surface into contact, and progressively releasing the strain to facilitate bonding of the substrates while minimizing or avoiding the trapping of air bubbles between the substrates.
摘要翻译：一种用于将具有第一表面的第一基底结合到具有第二表面的第二基底的方法。该方法包括以下步骤：通过至少两个支撑点保持第一基板，将第一基板和第二基板定位成使得第一表面和第二表面彼此面对，使第一基板通过在至少一个压力点并且两个支撑点朝向第二基板的应变，使变形的第一表面和第二表面接触，并逐渐释放应变以促进基板的接合，同时最小化或避免在基板之间捕获气泡。

10. 发明申请

US20210058058A1 HETEROSTRUCTURE AND METHOD OF FABRICATION 有权
公开(公告)号：US20210058058A1
公开(公告)日：2021-02-25
申请号：US17075465
申请日：2020-10-20
申请人： Soitec
发明人： Arnaud Castex , Daniel Delprat , Bernard Aspar , Ionut Radu
IPC分类号： H03H9/02 , H01L41/312 , H01L41/08 , H01L41/313 , H03H3/10
摘要： The present invention relates to a heterostructure, in particular, a piezoelectric structure, comprising a cover layer, in particular, a layer of piezoelectric material, the material of the cover layer having a first coefficient of thermal expansion, assembled to a support substrate, the support substrate having a second coefficient of thermal expansion substantially different from the first coefficient of thermal expansion, at an interface wherein the cover layer comprises at least a recess extending from the interface into the cover layer, and its method of fabrication.

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