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    • 2. 发明授权
    • Multi-channel semiconductor integrated circuit devices for controlling direct current generators and memory systems including the same
    • 用于控制直流发电机和包括其的存储器系统的多通道半导体集成电路器件
    • US08526262B2
    • 2013-09-03
    • US12878431
    • 2010-09-09
    • Jang-Woo RyuJung Sik KimSo-Young Kim
    • Jang-Woo RyuJung Sik KimSo-Young Kim
    • G11C5/14
    • G11C5/147
    • Multi-channel semiconductor integrated circuit devices are provided including a plurality of memory devices that are independently accessible, each of the plurality of memory devices including at least one power generation unit and a control unit for controlling an operation of the at least one power generation unit, a detection unit for detecting an operation state of the plurality of memory devices, and a common control unit for commonly controlling an operation of the at least one power generation unit of the plurality of memory devices, according to the operation state of the plurality of memory devices detected by the detection unit. The control unit of each of the plurality of memory devices controls the operation of the at least one power generation unit of a corresponding one of the plurality of memory devices.
    • 提供多通道半导体集成电路装置,其包括可独立存取的多个存储器件,多个存储器件中的每一个包括至少一个发电单元和用于控制至少一个发电单元的操作的控制单元 ,用于检测多个存储器件的操作状态的检测单元,以及用于共同控制多个存储器件的至少一个发电单元的操作的公共控制单元,根据多个存储器件的操作状态 由检测单元检测到的存储器件。 多个存储装置中的每一个的控制单元控制多个存储装置中相应一个的至少一个发电单元的操作。
    • 6. 发明申请
    • Multi-Channel Semiconductor Integrated Circuit Devices for Controlling Direct Current Generators and Memory Systems Including the Same
    • 用于控制直流发电机和包括其的存储器系统的多通道半导体集成电路器件
    • US20110075501A1
    • 2011-03-31
    • US12878431
    • 2010-09-09
    • Jang-Woo RyuJung Sik KimSo-Young Kim
    • Jang-Woo RyuJung Sik KimSo-Young Kim
    • G11C5/14
    • G11C5/147
    • Multi-channel semiconductor integrated circuit devices are provided including a plurality of memory devices that are independently accessible, each of the plurality of memory devices including at least one power generation unit and a control unit for controlling an operation of the at least one power generation unit, a detection unit for detecting an operation state of the plurality of memory devices, and a common control unit for commonly controlling an operation of the at least one power generation unit of the plurality of memory devices, according to the operation state of the plurality of memory devices detected by the detection unit. The control unit of each of the plurality of memory devices controls the operation of the at least one power generation unit of a corresponding one of the plurality of memory devices.
    • 提供多通道半导体集成电路装置,其包括可独立存取的多个存储器件,多个存储器件中的每一个包括至少一个发电单元和用于控制至少一个发电单元的操作的控制单元 ,用于检测多个存储器件的操作状态的检测单元,以及用于共同控制多个存储器件的至少一个发电单元的操作的公共控制单元,根据多个存储器件的操作状态 由检测单元检测到的存储器件。 多个存储装置中的每一个的控制单元控制多个存储装置中相应一个的至少一个发电单元的操作。
    • 7. 发明申请
    • DISPLAY SUBSTRATE
    • 显示基板
    • US20110304786A1
    • 2011-12-15
    • US12955582
    • 2010-11-29
    • Seon-Kyoon MOKSi-Hyun AhnWoo-Jung ShinByoung-Sun NaSo-Young Kim
    • Seon-Kyoon MOKSi-Hyun AhnWoo-Jung ShinByoung-Sun NaSo-Young Kim
    • G02F1/133
    • G02F1/136286G02F1/133G02F1/1345G09G3/3696
    • A display substrate includes a plurality of gate lines extending in a first direction and arranged in a second direction in a display area of the display substrate, an alignment film formed in the display area and in an end area adjacent to end portions of the gate lines in a peripheral area surrounding the display area, and a plurality of circuit stages formed in the end area to connect to the gate lines and a dummy stage connected to a last circuit stage of the circuit stages. Each of the circuit stages includes a gate driving circuit disposed at the higher portion the gate line corresponding to the circuit stages and a gate connecting line formed in the peripheral area between the display area and the gate driving circuit to connect each of the circuit stages with each of the gate lines.
    • 显示基板包括在显示基板的显示区域中沿第一方向延伸并沿第二方向布置的多条栅极线,形成在显示区域中的取向膜和与栅极线的端部相邻的端部区域 在围绕显示区域的外围区域中,以及形成在端部区域中以连接到栅极线的多个电路级以及连接到电路级的最后电路级的虚拟级。 每个电路级包括设置在对应于电路级的栅极线的较高部分处的栅极驱动电路和形成在显示区域和栅极驱动电路之间的周边区域中的栅极连接线,以将每个电路级与每个电路级连接 每条门线。