专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120231580A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120231580A1
公开(公告)日：2012-09-13
申请号：US13413684
申请日：2012-03-07
申请人： Shunpei YAMAZAKI , Yuhei SATO , Keiji SATO , Tetsunori MARUYAMA , Junichi KOEZUKA
发明人： Shunpei YAMAZAKI , Yuhei SATO , Keiji SATO , Tetsunori MARUYAMA , Junichi KOEZUKA
IPC分类号： H01L21/42
CPC分类号： H01L21/40 , H01L21/02175 , H01L21/02252 , H01L21/02565 , H01L21/02636 , H01L21/02664 , H01L21/324 , H01L21/383 , H01L21/477 , H01L27/1225 , H01L29/66742 , H01L29/66969 , H01L29/7869
摘要： In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.
摘要翻译：在包括氧化物半导体膜的晶体管的制造过程中，对氧化物半导体膜进行氧掺杂处理，然后对氧化物半导体膜和设置在氧化物半导体膜上的氧化铝膜进行热处理。因此，形成包含比化学计量组成物多的氧的区域的氧化物半导体膜。使用氧化物半导体膜形成的晶体管可以具有高的可靠性，因为通过偏压 - 温度应力测试（BT测试）的晶体管的阈值电压的变化量减小。

2. 发明申请

US20120231581A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120231581A1
公开(公告)日：2012-09-13
申请号：US13413686
申请日：2012-03-07
申请人： Shunpei YAMAZAKI , Yuhei SATO , Keiji SATO , Tetsunori MARUYAMA
发明人： Shunpei YAMAZAKI , Yuhei SATO , Keiji SATO , Tetsunori MARUYAMA
IPC分类号： H01L21/36
CPC分类号： H01L29/78693
摘要： In a process of manufacturing a transistor including an oxide semiconductor layer, an amorphous oxide semiconductor layer which includes a region containing excess oxygen as compared to a stoichiometric composition ratio of an oxide semiconductor in a crystalline state is formed over a silicon oxide film, an aluminum oxide film is formed over the amorphous oxide semiconductor layer, and then heat treatment is performed so that at least part of the amorphous oxide semiconductor layer is crystallized and an oxide semiconductor layer which includes a crystal having a c-axis substantially perpendicular to a surface of the oxide semiconductor layer is formed.
摘要翻译：在制造包括氧化物半导体层的晶体管的工艺中，在氧化硅膜上形成包含与结晶态的氧化物半导体的化学计量组成比相比含有过量氧的区域的非晶氧化物半导体层，铝在非晶形氧化物半导体层上形成氧化膜，然后进行热处理，使得非晶氧化物半导体层的至少一部分结晶，并且包含具有c轴的晶体的氧化物半导体层，该晶体基本上垂直于形成氧化物半导体层。

3. 发明申请

US20120258575A1 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20120258575A1
公开(公告)日：2012-10-11
申请号：US13437271
申请日：2012-04-02
申请人： Yuhei SATO , Keiji SATO , Toshinari SASAKI , Tetsunori MARUYAMA , Atsuo ISOBE , Tsutomu MURAKAWA , Sachiaki TEZUKA
发明人： Yuhei SATO , Keiji SATO , Toshinari SASAKI , Tetsunori MARUYAMA , Atsuo ISOBE , Tsutomu MURAKAWA , Sachiaki TEZUKA
IPC分类号： H01L21/336
CPC分类号： H01L29/7869 , H01L21/477
摘要： To provide a highly reliable semiconductor device manufactured by giving stable electric characteristics to a semiconductor device including an oxide semiconductor. In a manufacturing process of a transistor, an oxide semiconductor layer, a source electrode layer, a drain electrode layer, a gate insulating film, a gate electrode layer, and an aluminum oxide film are formed in this order, and then heat treatment is performed on the oxide semiconductor layer and the aluminum oxide film, whereby an oxide semiconductor layer from which an impurity containing a hydrogen atom is removed and which includes a region containing oxygen more than the stoichiometric proportion is formed. In addition, when the aluminum oxide film is formed, entry and diffusion of water or hydrogen into the oxide semiconductor layer from the air due to heat treatment in a manufacturing process of a semiconductor device or an electronic appliance including the transistor can be prevented.
摘要翻译：提供通过给包括氧化物半导体的半导体器件赋予稳定的电特性而制造的高可靠性的半导体器件。在晶体管的制造工序中，依次形成氧化物半导体层，源极电极层，漏极电极层，栅极绝缘膜，栅电极层和氧化铝膜，然后进行热处理在氧化物半导体层和氧化铝膜上形成除去含有氢原子的杂质的氧化物半导体层，其中含有超过化学计量比的氧的区域。此外，当形成氧化铝膜时，可以防止在半导体器件或包括晶体管的电子设备的制造过程中由于热处理而从空气中进入和扩散水或氢进入氧化物半导体层。

4. 发明申请

US20110114999A1 SPUTTERING TARGET AND METHOD FOR MANUFACTURING THE SAME, AND TRANSISTOR 审中-公开
标题翻译：溅射目标及其制造方法和晶体管
公开(公告)号：US20110114999A1
公开(公告)日：2011-05-19
申请号：US12945580
申请日：2010-11-12
申请人： Shunpei Yamazaki , Toru TAKAYAMA , Keiji SATO
发明人： Shunpei Yamazaki , Toru TAKAYAMA , Keiji SATO
IPC分类号： H01L29/80 , B23K1/20 , C21D1/34 , C23C14/14
CPC分类号： H01L29/7869 , C23C14/08 , C23C14/3414 , H01L21/0242 , H01L21/02422 , H01L21/02488 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/41733 , H01L29/42384 , H01L29/45 , H01L29/66969 , H01L29/78618
摘要： To provide a deposition technique for forming an oxide semiconductor film. An oxide semiconductor film is formed using a sputtering target which contains a sintered body of metal oxide and in which the concentration of hydrogen contained in the sintered body of metal oxide is, for example, as low as 1×1016 atoms/cm3 or lower, so that the oxide semiconductor film contains a small amount of impurities such as a hydrogen atom and a compound containing a hydrogen atom typified by H2O. Further, this oxide semiconductor film is used as an active layer of a transistor.
摘要翻译：提供用于形成氧化物半导体膜的沉积技术。使用包含金属氧化物烧结体的溅射靶形成氧化物半导体膜，其中金属氧化物烧结体中所含的氢浓度例如低至1×1016原子/ cm3以下，使得氧化物半导体膜含有少量杂质如氢原子和含有以H 2 O为代表的氢原子的化合物。此外，该氧化物半导体膜用作晶体管的有源层。

5. 发明申请

US20110238372A1 OPERATIONAL STATE ANALYSIS SYSTEM AND OPERATION STATE ANALYSIS METHOD 审中-公开
标题翻译：操作状态分析系统和操作状态分析方法
公开(公告)号：US20110238372A1
公开(公告)日：2011-09-29
申请号：US13073104
申请日：2011-03-28
申请人： Shinya AKIMOTO , Mitsutoshi SUSUMAGO , Keiji SATO
发明人： Shinya AKIMOTO , Mitsutoshi SUSUMAGO , Keiji SATO
IPC分类号： G06F15/00
CPC分类号： G05B23/024
摘要： The operational state analysis system may analyze an operational state of a plant based on processed data items related to the plant. The operational state analysis system may include a reception unit that receives a selection of the processed data items, the selection being performed by user of the operational state analysis system, a property value acquisition unit that acquires a plurality of property values, each of the plurality of property values being one of values of the processed data items and statistical values based on the processed data items of which the selection is received by the reception unit, and a waveform display unit that displays the plurality of property values acquired by the property value acquisition unit as waveforms that analyzes the operational state.
摘要翻译：操作状态分析系统可以基于与工厂相关的处理的数据项来分析工厂的操作状态。操作状态分析系统可以包括：接收单元，其接收所处理的数据项的选择，所述选择由操作状态分析系统的用户执行;属性值获取单元，其获取多个属性值，属性值是基于由接收单元接收到选择的处理数据项的处理数据项和统计值的值之一，以及波形显示单元，显示通过属性值获取获取的多个属性值单元作为分析操作状态的波形。

6. 发明申请

US20100295421A1 ELECTRONIC COMPONENT, ELECTRONIC APPARATUS, AND BASE MEMBER MANUFACTURING METHOD 有权
标题翻译：电子元件，电子设备和基座成员制造方法
公开(公告)号：US20100295421A1
公开(公告)日：2010-11-25
申请号：US12851686
申请日：2010-08-06
申请人： Hitoshi TAKEUCHI , Keiji SATO , Kiyoshi ARATAKE , Masashi NUMATA
发明人： Hitoshi TAKEUCHI , Keiji SATO , Kiyoshi ARATAKE , Masashi NUMATA
IPC分类号： H01L41/053 , H01L23/48 , H01L21/60 , H01L23/02
CPC分类号： H03H9/1021 , H01L23/562 , H01L41/053 , H01L2924/0002 , H01L2924/09701 , H03H9/02133 , H03H9/0552 , H01L2924/00
摘要： An electronic component capable of withstanding stress from a printed-circuit board or the like is provided. In an electronic component, a cavity hermetically sealed by a base and a lid is formed. In the cavity, a crystal resonator is supported by a supporting member over the top surface of the base. The base is made of glass. A stress buffer layer made of a conductive resin or the like is formed over the whole bottom surface of the base. An external electrode and an external electrode that are in continuity with the electrodes of the crystal resonator individually extend to the bottom surface of the stress buffer layer via the side surfaces of the base and stress buffer layer. The thus configured electronic component is surface-mounted by, for example, soldering the external electrode and external electrode formed on the bottom surface of the stress buffer layer to a printed-circuit board.
摘要翻译：提供能够承受来自印刷电路板等的应力的电子部件。在电子部件中，形成由基座和盖子密封的空腔。在空腔中，晶体谐振器由支撑构件支撑在基座的顶表面上。基座由玻璃制成。在基底的整个底面上形成由导电性树脂等构成的应力缓冲层。与晶体谐振器的电极连续的外部电极和外部电极，经由基极和应力缓冲层的侧面分别延伸到应力缓冲层的底面。这样构成的电子部件通过例如将形成在应力缓冲层的底面上的外部电极和外部电极焊接到印刷电路板来进行表面安装。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式