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1. 发明授权

US06772045B2 System for determining dry cleaning timing, method for determining dry cleaning timing, dry cleaning method, and method for manufacturing semiconductor device 失效
标题翻译：用于确定干洗时间的系统，确定干洗时间的方法，干洗方法和制造半导体装置的方法
公开(公告)号：US06772045B2
公开(公告)日：2004-08-03
申请号：US10231019
申请日：2002-08-30
申请人： Shuji Katsui , Masayuki Tanaka , Masaki Kamimura , Hiroshi Akahori , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Shigehiko Saida , Yoshitaka Tsunashima , Yuuichi Mikata
发明人： Shuji Katsui , Masayuki Tanaka , Masaki Kamimura , Hiroshi Akahori , Ichiro Mizushima , Takashi Nakao , Akihito Yamamoto , Shigehiko Saida , Yoshitaka Tsunashima , Yuuichi Mikata
IPC分类号： G06F1900
CPC分类号： H04L12/66 , Y10S438/905
摘要： A system for determining dry cleaning timing, includes: a manufacturing apparatus configured to process materials assigned by a sequence of lots; an apparatus controller configured to control the manufacturing apparatus and obtaining operational conditions of the manufacturing apparatus as apparatus information; a lot information input terminal configured to obtain process conditions of one of the lots as lot information; an apparatus information storage unit configured to store the apparatus information from the apparatus controller as an apparatus information database; a lot information storage unit configured to store the lot information from the lot information input terminal as a lot information database; and a cleaning determination unit configured to determine timing to perform a dry cleaning of the manufacturing apparatus based on the apparatus information database and the lot information database.
摘要翻译：一种用于确定干洗时间的系统，包括：制造装置，被配置为处理由批次序列分配的材料; 设备控制器，其被配置为控制所述制造设备并获得所述制造设备的操作条件作为设备信息; 许多信息输入终端，被配置为获取所述批中的一个的处理条件作为批量信息; 设备信息存储单元，被配置为将来自设备控制器的设备信息作为设备信息数据库存储; 许多信息存储单元被配置为将来自批次信息输入终端的批量信息作为批次信息数据库存储; 以及清洁确定单元，被配置为基于装置信息数据库和批次信息数据库来确定对制造装置进行干洗的定时。

2. 发明授权

US06929991B2 Reliable semiconductor device and method of manufacturing the same 失效
标题翻译：可靠的半导体器件及其制造方法
公开(公告)号：US06929991B2
公开(公告)日：2005-08-16
申请号：US10775065
申请日：2004-02-11
申请人： Yuuichi Mikata , Shuji Katsui , Hiroshi Akahori
发明人： Yuuichi Mikata , Shuji Katsui , Hiroshi Akahori
IPC分类号： H01L21/8247 , C23C16/24 , H01L21/205 , H01L21/28 , H01L21/336 , H01L27/115 , H01L29/49 , H01L29/78 , H01L29/788 , H01L29/792 , H01L21/00
CPC分类号： H01L29/66825 , C23C16/24 , H01L21/28035 , H01L29/4916
摘要： The present invention provides a semiconductor device and a method of manufacturing the same improved in reliability of a gate insulating film by increasing a total charge amount Qbd by suppressing a film stress of a gate electrode formed of a polysilicon film, to a low value. Since the film stress is closely related to a film formation temperature, it is possible to reduce the film stress lower than the conventional case by forming a film at as a high temperature as 640° C. or more. At this time, when the film stress decreases, the total charge amount Qbd regulating dielectric breakdown of the film increases, improving reliability of the gate insulating film. It is therefore possible to set the film stress of the gate electrode at 200 MPA or less in terms of absolute value by forming the gate electrode at 640° C. or more.
摘要翻译：本发明提供一种半导体器件及其制造方法，其通过将由多晶硅膜形成的栅电极的膜应力抑制到总电荷量Qbd而提高了栅绝缘膜的可靠性。由于膜应力与成膜温度密切相关，因此通过在640℃以上的高温下形成膜，可以将膜应力降低到比现有的情况。此时，当薄膜应力降低时，膜的电荷量Qbd调节电介质击穿的增加，提高了栅极绝缘膜的可靠性。因此，通过在640℃以上形成栅电极，能够将栅电极的膜应力设定为绝对值的200MPA以下。

3. 发明授权

US06713824B1 Reliable semiconductor device and method of manufacturing the same 失效
公开(公告)号：US06713824B1
公开(公告)日：2004-03-30
申请号：US09459913
申请日：1999-12-14
申请人： Yuuichi Mikata , Shuji Katsui , Hiroshi Akahori
发明人： Yuuichi Mikata , Shuji Katsui , Hiroshi Akahori
IPC分类号： H01L2976
CPC分类号： H01L29/66825 , C23C16/24 , H01L21/28035 , H01L29/4916
摘要： The present invention provides a semiconductor device and a method of manufacturing the same improved in reliability of a gate insulating film by increasing a total charge amount Qbd by suppressing a film stress of a gate electrode formed of a polysilicon film, to a low value. Since the film stress is closely related to a film formation temperature, it is possible to reduce the film stress lower than the conventional case by forming a film at as a high temperature as 640° C. or more. At this time, when the film stress decreases, the total charge amount Qbd regulating dielectric breakdown of the film increases, improving reliability of the gate insulating film. It is therefore possible to set the film stress of the gate electrode at 200 MPA or less in terms of absolute value by forming the gate electrode at 640° C. or more.

4. 发明授权

US06992020B2 Method of fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06992020B2
公开(公告)日：2006-01-31
申请号：US10902414
申请日：2004-07-30
申请人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
发明人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02271 , H01L21/02304 , H01L21/3144 , H01L21/3145 , H01L21/31612 , H01L21/3185 , H01L21/76224 , H01L21/823475
摘要： A semiconductor device of this invention includes a silicon nitride film formed on a semiconductor substrate and having a density of 2.2 g/cm3 or less, and a silicon oxide film formed on the silicon nitride film in an ambient atmosphere containing TEOS and O3.
摘要翻译：本发明的半导体器件包括在半导体衬底上形成的密度为2.2g / cm 3以下的氮化硅膜和在环境中形成在氮化硅膜上的氧化硅膜含有TEOS和O 3 3的气氛。

5. 发明授权

US5838056A Semiconductor device applied to composite insulative film and manufacturing method thereof 失效
标题翻译：具有氮化物膜的半导体器件
公开(公告)号：US5838056A
公开(公告)日：1998-11-17
申请号：US777100
申请日：1996-12-30
申请人： Yoshio Kasai , Takashi Suzuki , Takanori Tsuda , Yuuichi Mikata , Hiroshi Akahori , Akihito Yamamoto
发明人： Yoshio Kasai , Takashi Suzuki , Takanori Tsuda , Yuuichi Mikata , Hiroshi Akahori , Akihito Yamamoto
IPC分类号： H01L27/04 , H01L21/28 , H01L21/318 , H01L21/334 , H01L21/822 , H01L21/8242 , H01L27/108 , H01L23/58
CPC分类号： H01L29/66181 , H01L21/28167 , H01L21/3185
摘要： A semiconductor wafer having an impurity diffusion layer formed in an inner surface of a trench is cleaned. The semiconductor wafer is inserted into a furnace, and NH.sub.3 gas is introduced into the furnace in the low-pressure condition to create an atmosphere in which the temperature is set at 800.degree. C. to 1200.degree. C. and the partial pressures of H.sub.2 O and O.sub.2 are set at 1.times.10.sup.-4 Torr or less. A natural oxide film formed on the inner surface of the trench is removed, and substantially at the same time, a thermal nitride film is formed on the impurity diffusion layer. Then, a CVD silicon nitride film is formed on the thermal nitride film without exposing the thermal nitride film to the outside air in the same furnace. Next, a silicon oxide film is formed on the CVD nitride film. As a result, a composite insulative film formed of the thermal nitride film, CVD silicon nitride film and silicon oxide film is obtained. Then, an electrode for the composite insulative film is formed in the trench.
摘要翻译：清洁在沟槽的内表面形成有杂质扩散层的半导体晶片。将半导体晶片插入炉中，并将NH 3气体在低压条件下引入炉中以产生温度设定在800℃至1200℃的气氛，并且将H 2 O和 O2设定在1×10-4乇或更低。去除形成在沟槽内表面上的自然氧化膜，并且基本上同时在杂质扩散层上形成氮化氮膜。然后，在氮化硅膜上形成CVD氮化硅膜，而不会在同一炉内将氮化氮膜暴露于外部空气。接着，在CVD氮化膜上形成氧化硅膜。结果，得到由氮化物膜，CVD氮化硅膜和氧化硅膜形成的复合绝缘膜。然后，在沟槽中形成用于复合绝缘膜的电极。

6. 发明申请

US20050012171A1 Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050012171A1
公开(公告)日：2005-01-20
申请号：US10902414
申请日：2004-07-30
申请人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
发明人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
IPC分类号： H01L21/76 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/762 , H01L21/768 , H01L21/8234 , H01L23/522 , H01L29/78 , H01L21/336 , H01L29/00
CPC分类号： H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02271 , H01L21/02304 , H01L21/3144 , H01L21/3145 , H01L21/31612 , H01L21/3185 , H01L21/76224 , H01L21/823475
摘要： A semiconductor device of this invention includes a silicon nitride film formed on a semiconductor substrate and having a density of 2.2 g/cm3 or less, and a silicon oxide film formed on the silicon nitride film in an ambient atmosphere containing TEOS and O3.
摘要翻译：本发明的半导体器件包括在半导体衬底上形成的密度为2.2g / cm 3以下的氮化硅膜和在含有TEOS和O 3的环境气氛中形成在氮化硅膜上的氧化硅膜。

7. 发明授权

US06841850B2 Semiconductor device having silicon nitride film and silicon oxide film, and method of fabricating the same 有权
标题翻译：具有氮化硅膜和氧化硅膜的半导体器件及其制造方法
公开(公告)号：US06841850B2
公开(公告)日：2005-01-11
申请号：US10235917
申请日：2002-09-06
申请人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
发明人： Susumu Hiyama , Akihito Yamamoto , Hiroshi Akahori , Shigehiko Saida
IPC分类号： H01L21/76 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/762 , H01L21/768 , H01L21/8234 , H01L23/522 , H01L29/78 , H01L23/58
CPC分类号： H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02271 , H01L21/02304 , H01L21/3144 , H01L21/3145 , H01L21/31612 , H01L21/3185 , H01L21/76224 , H01L21/823475
摘要： A semiconductor device of this invention includes a silicon nitride film formed on a semiconductor substrate and having a density of 2.2 g/cm3 or less, and a silicon oxide film formed on the silicon nitride film in an ambient atmosphere containing TEOS and O3.
摘要翻译：本发明的半导体器件包括在半导体衬底上形成的密度为2.2g / cm 3以下的氮化硅膜和在含有TEOS和O 3的环境气氛中形成在氮化硅膜上的氧化硅膜。

8. 发明授权

US06171977B2 Semiconductor device applied to composite insulative film manufacturing method thereof 失效
标题翻译：半导体装置应用于复合绝缘膜的制造方法
公开(公告)号：US06171977B2
公开(公告)日：2001-01-09
申请号：US08777098
申请日：1996-12-30
申请人： Yoshio Kasai , Takashi Suzuki , Takanori Tsuda , Yuuichi Mikata , Hiroshi Akahori , Akihito Yamamoto
发明人： Yoshio Kasai , Takashi Suzuki , Takanori Tsuda , Yuuichi Mikata , Hiroshi Akahori , Akihito Yamamoto
IPC分类号： H01L2131
CPC分类号： H01L29/66181 , H01L21/28167 , H01L21/3185
摘要： A semiconductor wafer having an impurity diffusion layer formed in an inner surface of a trench is cleaned. The semiconductor wafer is inserted into a furnace, and NH3 gas is introduced into the furnace in the low-pressure condition to create an atmosphere in which the temperature is set at 800° C. to 1200° C. and the partial pressures of H2O and O2 are set at 1×10−4 Torr or less. A natural oxide film formed on the inner surface of the trench is removed, and substantially at the same time, a thermal nitride film is formed on the impurity diffusion layer. Then, a CVD silicon nitride film is formed on the thermal nitride film without exposing the thermal nitride film to the outside air in the same furnace. Next, a silicon oxide film is formed on the CVD nitride film. As a result, a composite insulative film formed of the thermal nitride film, CVD silicon nitride film and silicon oxide film is obtained. Then, an electrode for the composite insulative film is formed in the trench.
摘要翻译：清洁在沟槽的内表面形成有杂质扩散层的半导体晶片。将半导体晶片插入炉中，并将NH 3气体在低压条件下引入炉中以产生温度设定在800℃至1200℃的气氛，并且将H 2 O和 O2设定在1×10-4乇或更低。去除形成在沟槽内表面上的自然氧化膜，并且基本上同时在杂质扩散层上形成氮化氮膜。然后，在氮化硅膜上形成CVD氮化硅膜，而不会在同一炉内将氮化氮膜暴露于外部空气。接着，在CVD氮化膜上形成氧化硅膜。结果，得到由氮化物膜，CVD氮化硅膜和氧化硅膜形成的复合绝缘膜。然后，在沟槽中形成用于复合绝缘膜的电极。

9. 发明授权

US06909993B2 Method for diagnosing failure of a manufacturing apparatus and a failure diagnosis system 失效
标题翻译：用于诊断制造装置和故障诊断系统的故障的方法
公开(公告)号：US06909993B2
公开(公告)日：2005-06-21
申请号：US10228960
申请日：2002-08-28
申请人： Takashi Nakao , Yukihiro Ushiku , Shuichi Samata , Hiroshi Akahori , Ken Ishii
发明人： Takashi Nakao , Yukihiro Ushiku , Shuichi Samata , Hiroshi Akahori , Ken Ishii
IPC分类号： G05B19/418 , G05B23/02 , G06F11/30 , G06F17/00 , G21C17/00 , H01L21/00 , H01L21/02 , H01L21/31
CPC分类号： G05B23/024 , Y02P90/86
摘要： A method for diagnosing failure of a manufacturing apparatus, includes: measuring time series data of characteristics of a reference apparatus which conducts same processes as the manufacturing apparatus, and recording the time series data of the characteristics in a system information storage unit as a system information database; reading out a recipe listed in a process control information database recorded in a process control information storage unit; driving and controlling the manufacturing apparatus, measuring time series data of the characteristics as test data, and outputting the test data in real time, in accordance with the recipe; performing calculations on the test data, and creating failure diagnosis data; and diagnosing the failure of the manufacturing apparatus using the failure diagnosis data and the system information database.
摘要翻译：一种用于诊断制造装置的故障的方法，包括：测量与制造装置进行相同处理的参考装置的特性的时间序列数据，并将该特性的时间序列数据记录在系统信息存储单元中作为系统信息数据库; 读出记录在过程控制信息存储单元中的过程控制信息数据库中列出的配方; 驱动和控制制造装置，测量特性的时间序列数据作为测试数据，并根据配方实时输出测试数据; 对测试数据执行计算，并创建故障诊断数据; 以及使用故障诊断数据和系统信息数据库诊断制造装置的故障。

10. 发明申请

US20120018780A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120018780A1
公开(公告)日：2012-01-26
申请号：US13075665
申请日：2011-03-30
申请人： Kazuaki Iwasawa , Shigeo Kondo , Hiroshi Akahori , Kiyohito Nishihara , Yingkang Zhang , Masaki Kondo , Hidenobu Nagashima , Takashi Ichikawa
发明人： Kazuaki Iwasawa , Shigeo Kondo , Hiroshi Akahori , Kiyohito Nishihara , Yingkang Zhang , Masaki Kondo , Hidenobu Nagashima , Takashi Ichikawa
IPC分类号： H01L29/772 , H01L21/28
CPC分类号： H01L27/11521
摘要： According to one embodiment, a method is disclosed for manufacturing a semiconductor device. A side face parallel to a channel direction of a plurality of gate electrodes provided via a gate insulating film above a semiconductor substrate is included as a part of an inner wall of an isolation groove provided between the adjacent gate electrodes. The method can include forming a protection film covering the side face of the gate electrode. The method can include etching the semiconductor substrate using the gate electrode as a mask to form the isolation groove. The side face of the gate electrode is covered with the protection film. The method can include forming a first insulating film by oxidizing a surface of the isolation groove to fill a bottom portion of the isolation groove. In addition, the method can include forming a second insulating film on the first insulating film to fill an upper portion of the isolation groove including the side face of the gate electrode.
摘要翻译：根据一个实施例，公开了一种用于制造半导体器件的方法。作为设置在相邻栅电极之间的隔离槽的内壁的一部分，包括平行于通过半导体基板上方的栅极绝缘膜设置的多个栅电极的沟道方向的侧面。该方法可以包括形成覆盖栅电极的侧面的保护膜。该方法可以包括使用栅电极作为掩模来蚀刻半导体衬底以形成隔离槽。栅电极的侧面被保护膜覆盖。该方法可以包括通过氧化隔离槽的表面来填充隔离槽的底部来形成第一绝缘膜。此外，该方法可以包括在第一绝缘膜上形成第二绝缘膜以填充包括栅电极的侧面的隔离槽的上部。

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