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1. 发明授权

US08173496B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08173496B2
公开(公告)日：2012-05-08
申请号：US13024360
申请日：2011-02-10
申请人： Sho Kato , Satoshi Toriumi , Fumito Isaka , Hideto Ohnuma
发明人： Sho Kato , Satoshi Toriumi , Fumito Isaka , Hideto Ohnuma
IPC分类号： H01L21/00 , H01L21/336 , H01L21/30
CPC分类号： H01L21/84 , H01L21/76251
摘要： A stack including at least an insulating layer, a first electrode, and a first impurity semiconductor layer is provided over a supporting substrate; a first semiconductor layer to which an impurity element imparting one conductivity type is added is formed over the first impurity semiconductor layer; a second semiconductor layer to which an impurity element imparting the one conductivity type is added is formed over the first semiconductor layer under a condition different from that of the first semiconductor layer; crystallinity of the first semiconductor layer and crystallinity of the second semiconductor layer are improved by a solid-phase growth method to form a second impurity semiconductor layer; an impurity element imparting the one conductivity type and an impurity element imparting a conductivity type different from the one conductivity type are added to the second impurity semiconductor layer; and a gate electrode layer is formed via a gate insulating layer.
摘要翻译：至少包括绝缘层，第一电极和第一杂质半导体层的叠层设置在支撑基板上; 在所述第一杂质半导体层上形成添加有赋予一种导电类型的杂质元素的第一半导体层; 在与第一半导体层不同的条件下，在第一半导体层上形成添加有赋予一种导电型的杂质元素的第二半导体层; 通过固相生长法提高第一半导体层的结晶度和第二半导体层的结晶度，形成第二杂质半导体层; 赋予一种导电类型的杂质元素和赋予不同于一种导电类型的导电类型的杂质元素添加到第二杂质半导体层; 并且经由栅极绝缘层形成栅极电极层。

2. 发明授权

US07951656B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07951656B2
公开(公告)日：2011-05-31
申请号：US12467454
申请日：2009-05-18
申请人： Sho Kato , Satoshi Toriumi , Fumito Isaka , Hideto Ohnuma
发明人： Sho Kato , Satoshi Toriumi , Fumito Isaka , Hideto Ohnuma
IPC分类号： H01L21/00 , H01L21/336 , H01L21/30
CPC分类号： H01L21/84 , H01L21/76251
摘要： A stack including at least an insulating layer, a first electrode, and a first impurity semiconductor layer is provided over a supporting substrate; a first semiconductor layer to which an impurity element imparting one conductivity type is added is formed over the first impurity semiconductor layer; a second semiconductor layer to which an impurity element imparting the one conductivity type is added is formed over the first semiconductor layer under a condition different from that of the first semiconductor layer; crystallinity of the first semiconductor layer and crystallinity of the second semiconductor layer are improved by a solid-phase growth method to form a second impurity semiconductor layer; an impurity element imparting the one conductivity type and an impurity element imparting a conductivity type different from the one conductivity type are added to the second impurity semiconductor layer; and a gate electrode layer is formed via a gate insulating layer.
摘要翻译：至少包括绝缘层，第一电极和第一杂质半导体层的叠层设置在支撑基板上; 在所述第一杂质半导体层上形成添加有赋予一种导电类型的杂质元素的第一半导体层; 在与第一半导体层不同的条件下，在第一半导体层上形成添加有赋予一种导电型的杂质元素的第二半导体层; 通过固相生长法提高第一半导体层的结晶度和第二半导体层的结晶度，形成第二杂质半导体层; 赋予一种导电类型的杂质元素和赋予不同于一种导电类型的导电类型的杂质元素添加到第二杂质半导体层; 并且经由栅极绝缘层形成栅极电极层。

3. 发明授权

US08349702B2 Method for manufacturing semiconductor substrate 有权
标题翻译：半导体衬底的制造方法
公开(公告)号：US08349702B2
公开(公告)日：2013-01-08
申请号：US12426305
申请日：2009-04-20
申请人： Sho Kato , Satoshi Toriumi , Fumito Isaka
发明人： Sho Kato , Satoshi Toriumi , Fumito Isaka
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/02532 , H01L21/0262 , H01L21/02667 , H01L21/02686 , H01L21/76254
摘要： A semiconductor substrate is provided by a method suitable for mass production. Further, a semiconductor substrate having an excellent characteristic with effective use of resources is provided. A single crystal semiconductor substrate is irradiated with ions to form a damaged region in the single crystal semiconductor substrate; an insulating layer is formed over the single crystal semiconductor substrate; the insulating layer and a supporting substrate are bonded to each other; a first single crystal semiconductor layer is formed over the supporting substrate by partially separating the single crystal semiconductor substrate at the damaged region; a first semiconductor layer is formed over the first single crystal semiconductor layer; a second semiconductor layer is formed over the first semiconductor layer with a different condition from that used for forming the first semiconductor layer; a second single crystal semiconductor layer is formed by improving crystallinity of the first and the second semiconductor layers.
摘要翻译：通过适合于批量生产的方法提供半导体衬底。此外，提供了具有优异特性的具有有效利用资源的半导体衬底。单晶半导体衬底被照射以在单晶半导体衬底中形成受损区域; 在单晶半导体衬底上形成绝缘层; 绝缘层和支撑基板彼此接合; 通过在损伤区域部分分离单晶半导体衬底，在支撑衬底上形成第一单晶半导体层; 在所述第一单晶半导体层上形成第一半导体层; 在与第一半导体层的形成不同的条件下，在第一半导体层上形成第二半导体层; 通过提高第一和第二半导体层的结晶度来形成第二单晶半导体层。

4. 发明授权

US07947523B2 Method for manufacturing photoelectric conversion device 有权
标题翻译：制造光电转换装置的方法
公开(公告)号：US07947523B2
公开(公告)日：2011-05-24
申请号：US12424827
申请日：2009-04-16
申请人： Sho Kato , Satoshi Toriumi , Fumito Isaka
发明人： Sho Kato , Satoshi Toriumi , Fumito Isaka
IPC分类号： H01L21/00
CPC分类号： H01L31/1896 , H01L31/0201 , H01L31/042 , H01L31/072 , H01L31/075 , H01L31/076 , H01L31/1804 , H01L31/1824 , H01L31/1872 , H02S40/34 , Y02E10/545 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： An embrittlement layer is formed in the single crystal semiconductor substrate and a first impurity semiconductor layer, a first electrode, and an insulating layer are formed on one surface of the single crystal semiconductor substrate. After attaching the insulating layer and a supporting substrate to each other to bond the single crystal semiconductor substrate and the supporting substrate, the single crystal semiconductor substrate is separated along the embrittlement layer to form a stack including a first single crystal semiconductor layer. A first semiconductor layer and a second semiconductor layer are formed over the first single crystal semiconductor layer. A second single crystal semiconductor layer is formed by solid phase growth. A second impurity semiconductor layer having a conductivity type opposite to that of the first impurity semiconductor layer is formed on the second single crystal semiconductor layer. A second electrode is formed on the second impurity semiconductor layer.
摘要翻译：在单晶半导体衬底中形成脆化层，并且在单晶半导体衬底的一个表面上形成第一杂质半导体层，第一电极和绝缘层。在将绝缘层和支撑基板彼此连接以结合单晶半导体衬底和支撑衬底之后，单晶半导体衬底沿着脆化层分离以形成包括第一单晶半导体层的堆叠。第一半导体层和第二半导体层形成在第一单晶半导体层上。通过固相生长形成第二单晶半导体层。在第二单晶半导体层上形成具有与第一杂质半导体层相反的导电类型的第二杂质半导体层。在第二杂质半导体层上形成第二电极。

5. 发明授权

US08872021B2 Photoelectric conversion device and manufacturing method thereof 有权
标题翻译：光电转换装置及其制造方法
公开(公告)号：US08872021B2
公开(公告)日：2014-10-28
申请号：US12564991
申请日：2009-09-23
申请人： Sho Kato , Yoshikazu Hiura , Akihisa Shimomura , Takashi Ohtsuki , Satoshi Toriumi , Yasuyuki Arai
发明人： Sho Kato , Yoshikazu Hiura , Akihisa Shimomura , Takashi Ohtsuki , Satoshi Toriumi , Yasuyuki Arai
IPC分类号： H01L31/20 , H01L31/18 , H01L31/0256 , H01L31/0236 , H01L21/02 , H01L31/075 , H01L31/036
CPC分类号： H01L31/077 , H01L21/0237 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L31/036 , H01L31/0376 , H01L31/075 , H01L31/1804 , H01L31/20 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： An object is to increase conversion efficiency of a photoelectric conversion device without increase in the manufacturing steps. The photoelectric conversion device includes a first semiconductor layer formed using a single crystal semiconductor having one conductivity type which is formed over a supporting substrate, a buffer layer including a single crystal region and an amorphous region, a second semiconductor layer which includes a single crystal region and an amorphous region and is provided over the buffer layer, and a third semiconductor layer having a conductivity type opposite to the one conductivity type, which is provided over the second semiconductor layer. A proportion of the single crystal region is higher than that of the amorphous region on the first semiconductor layer side in the second semiconductor layer, and the proportion of the amorphous region is higher than that of the single crystal region on the third semiconductor layer side.
摘要翻译：目的在于提高光电转换装置的转换效率，而不增加制造步骤。光电转换装置包括使用在支撑基板上形成的具有一种导电类型的单晶半导体形成的第一半导体层，包括单晶区域和非晶区域的缓冲层，包括单晶区域的第二半导体层和非晶区域，并且设置在所述缓冲层上，以及设置在所述第二半导体层上的具有与所述一种导电类型相反的导电类型的第三半导体层。单晶区域的比例高于第二半导体层中的第一半导体层侧的非晶区域的比例，并且非晶区域的比例高于第三半导体层侧的单晶区域的比例。

6. 发明申请

US20100071767A1 PHOTOELECTRIC CONVERSION DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：光电转换装置及其制造方法
公开(公告)号：US20100071767A1
公开(公告)日：2010-03-25
申请号：US12564991
申请日：2009-09-23
申请人： Sho KATO , Yoshikazu Hiura , Akihisa Shimomura , Takashi Ohtsuki , Satoshi Toriumi , Yasuyuki Arai
发明人： Sho KATO , Yoshikazu Hiura , Akihisa Shimomura , Takashi Ohtsuki , Satoshi Toriumi , Yasuyuki Arai
IPC分类号： H01L31/0248 , H01L31/18
CPC分类号： H01L31/077 , H01L21/0237 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L31/036 , H01L31/0376 , H01L31/075 , H01L31/1804 , H01L31/20 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： An object is to increase conversion efficiency of a photoelectric conversion device without increase in the manufacturing steps. The photoelectric conversion device includes a first semiconductor layer formed using a single crystal semiconductor having one conductivity type which is formed over a supporting substrate, a buffer layer including a single crystal region and an amorphous region, a second semiconductor layer which includes a single crystal region and an amorphous region and is provided over the buffer layer, and a third semiconductor layer having a conductivity type opposite to the one conductivity type, which is provided over the second semiconductor layer. A proportion of the single crystal region is higher than that of the amorphous region on the first semiconductor layer side in the second semiconductor layer, and the proportion of the amorphous region is higher than that of the single crystal region on the third semiconductor layer side.
摘要翻译：目的在于提高光电转换装置的转换效率，而不增加制造步骤。光电转换装置包括使用在支撑基板上形成的具有一种导电类型的单晶半导体形成的第一半导体层，包括单晶区域和非晶区域的缓冲层，包括单晶区域的第二半导体层和非晶区域，并且设置在所述缓冲层上，以及设置在所述第二半导体层上的具有与所述一种导电类型相反的导电类型的第三半导体层。单晶区域的比例高于第二半导体层中的第一半导体层侧的非晶区域的比例，并且非晶区域的比例高于第三半导体层侧的单晶区域的比例。

7. 发明授权

US08591650B2 Method for forming crystalline semiconductor film, method for manufacturing thin film transistor, and method for manufacturing display device 有权
标题翻译：晶体半导体膜的形成方法，薄膜晶体管的制造方法以及显示装置的制造方法
公开(公告)号：US08591650B2
公开(公告)日：2013-11-26
申请号：US12277384
申请日：2008-11-25
申请人： Satoshi Toriumi
发明人： Satoshi Toriumi
IPC分类号： C30B23/00 , C30B25/00 , H01L21/00
CPC分类号： H01L21/67207 , C30B25/105
摘要： It is an object to provide a method for forming a crystalline semiconductor film in which a transition layer is not formed or which includes a thinner transition layer than that in a crystalline semiconductor film which is formed by conventional method, and a method for manufacturing a thin film transistor to which the above method is applied. A semiconductor film including hydrogen is formed over a substrate or over an insulating film formed over a substrate. The semiconductor film including hydrogen undergoes surface wave plasma treatment, which is performed in a gas including hydrogen and/or a rare gas, to generate a crystal nucleus in the semiconductor film including hydrogen. The crystal nucleus is grown to form a crystalline semiconductor film by employing a plasma CVD method.
摘要翻译：本发明的目的是提供一种用于形成其中没有形成过渡层的结晶半导体膜的方法或者包括比通过常规方法形成的结晶半导体膜中的过渡层更薄的过渡层的方法，以及用于制造薄的应用上述方法的薄膜晶体管。包括氢的半导体膜形成在衬底上或在衬底上形成的绝缘膜上。包括氢的半导体膜在包括氢和/或稀有气体的气体中进行表面波等离子体处理，以在包括氢的半导体膜中产生晶核。通过采用等离子体CVD法生长晶核以形成晶体半导体膜。

8. 发明授权

US08487342B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08487342B2
公开(公告)日：2013-07-16
申请号：US12979427
申请日：2010-12-28
申请人： Satoshi Toriumi
发明人： Satoshi Toriumi
IPC分类号： H01L33/00
CPC分类号： H01L27/1266 , H01L27/12 , H01L27/1214 , H01L27/3244 , H01L27/3274 , H01L27/3281 , H01L29/78603 , H01L51/003 , H01L2227/326 , H01L2251/5338
摘要： A separation layer containing a halogen element is formed over a glass substrate by a plasma CVD method; a semiconductor element is formed over the separation layer; and separation is then performed inside the separation layer or at its interface, so that the large-area glass substrate and the semiconductor element are detached from each other. In order to perform detachment at the interface between the glass substrate and the separation layer, the separation layer may have concentration gradient of the halogen element, and the halogen element is contained more near the interface between the separation layer and the glass substrate than in the other areas.
摘要翻译：通过等离子体CVD法在玻璃基板上形成含有卤素元素的分离层; 在分离层上形成半导体元件; 然后在分离层内或其界面处进行分离，使得大面积玻璃基板和半导体元件彼此分离。为了在玻璃基板和分离层之间的界面进行分离，分离层可以具有卤素元素的浓度梯度，并且在分离层和玻璃基板之间的界面附近含有卤素元素比在其他地区。

9. 发明申请

US20120304932A1 METHOD FOR MANUFACTURING MICROCRYSTALLINE SEMICONDUCTOR FILM AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造微晶半导体膜的方法和制造半导体器件的方法
公开(公告)号：US20120304932A1
公开(公告)日：2012-12-06
申请号：US13550776
申请日：2012-07-17
申请人： Satoshi Toriumi , Ryota Tajima , Takashi Ohtsuki , Tetsuhiro Tanaka , Ryo Tokumaru , Mitsuhiro Ichijo , Kazutaka Kuriki , Tomokazu Yokoi , Toshiya Endo , Shunpei Yamazaki
发明人： Satoshi Toriumi , Ryota Tajima , Takashi Ohtsuki , Tetsuhiro Tanaka , Ryo Tokumaru , Mitsuhiro Ichijo , Kazutaka Kuriki , Tomokazu Yokoi , Toshiya Endo , Shunpei Yamazaki
IPC分类号： C23C16/448
CPC分类号： H01J37/32541 , C23C16/24 , C23C16/45565 , C23C16/45574 , C23C16/5096 , H01J37/3244 , H01J37/32449 , H01J37/32834 , H01L21/0262 , H01L29/66765 , H01L29/78696
摘要： An object of the present invention is to provide a technique for manufacturing a dense crystalline semiconductor film without a cavity between crystal grains. A plasma region is formed between a first electrode and a second electrode by supplying high-frequency power of 60 MHz or less to the first electrode under a condition where a pressure of a reactive gas in a reaction chamber of a plasma CVD apparatus is set to 450 Pa to 13332 Pa, and a distance between the first electrode and the second electrode of the plasma CVD apparatus is set to 1 mm to 20 mm; crystalline deposition precursors are formed in a gas phase including the plasma region; a crystal nucleus of 5 nm to 15 nm is formed by depositing the deposition precursors; and a microcrystalline semiconductor film is formed by growing a crystal from the crystal nucleus.
摘要翻译：本发明的目的是提供一种在晶粒之间没有空腔的致密结晶半导体膜的制造技术。在等离子体CVD装置的反应室中的反应气体的压力设定为：将第一电极和第二电极的反应气体的压力设定为第一电极的状态下，向第一电极供给60MHz以下的高频电力，在第一电极与第二电极之间形成等离子体区域 450Pa〜13332Pa，等离子体CVD装置的第一电极和第二电极之间的距离设定为1mm〜20mm; 在包括等离子体区域的气相中形成结晶沉积前体; 通过沉积沉积前体形成5nm至15nm的晶核; 并且通过从晶核生长晶体形成微晶半导体膜。

10. 发明授权

US08252669B2 Method for manufacturing microcrystalline semiconductor film by plasma CVD apparatus 有权
标题翻译：通过等离子体CVD装置制造微晶半导体膜的方法
公开(公告)号：US08252669B2
公开(公告)日：2012-08-28
申请号：US12860175
申请日：2010-08-20
申请人： Satoshi Toriumi , Ryota Tajima , Takashi Ohtsuki , Tetsuhiro Tanaka , Ryo Tokumaru , Mitsuhiro Ichijo , Kazutaka Kuriki , Tomokazu Yokoi , Toshiya Endo , Shunpei Yamazaki
发明人： Satoshi Toriumi , Ryota Tajima , Takashi Ohtsuki , Tetsuhiro Tanaka , Ryo Tokumaru , Mitsuhiro Ichijo , Kazutaka Kuriki , Tomokazu Yokoi , Toshiya Endo , Shunpei Yamazaki
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01J37/32541 , C23C16/24 , C23C16/45565 , C23C16/45574 , C23C16/5096 , H01J37/3244 , H01J37/32449 , H01J37/32834 , H01L21/0262 , H01L29/66765 , H01L29/78696
摘要： An object of one embodiment of the present invention is to provide a technique for manufacturing a dense crystalline semiconductor film (e.g., a microcrystalline semiconductor film) without a cavity between crystal grains. A plasma region is formed between a first electrode and a second electrode by supplying high-frequency power of 60 MHz or less to the first electrode under a condition where a pressure of a reactive gas in a reaction chamber of a plasma CVD apparatus is set to 450 Pa to 13332 Pa, and a distance between the first electrode and the second electrode of the plasma CVD apparatus is set to 1 mm to 20 mm; crystalline deposition precursors are formed in a gas phase including the plasma region; a crystal nucleus of 5 nm to 15 nm is formed by depositing the deposition precursors; and a microcrystalline semiconductor film is formed by growing a crystal from the crystal nucleus.
摘要翻译：本发明的一个实施例的目的是提供一种在晶粒之间没有空腔的致密结晶半导体膜（例如，微晶半导体膜）的制造技术。在等离子体CVD装置的反应室中的反应气体的压力设定为：将第一电极和第二电极的反应气体的压力设定为第一电极的状态下，向第一电极供给60MHz以下的高频电力，在第一电极与第二电极之间形成等离子体区域 450Pa〜13332Pa，等离子体CVD装置的第一电极和第二电极之间的距离设定为1mm〜20mm; 在包括等离子体区域的气相中形成结晶沉积前体; 通过沉积沉积前体形成5nm至15nm的晶核; 并且通过从晶核生长晶体形成微晶半导体膜。

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