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1. 发明申请

US20130097412A1 Performing A Boot Sequence In A Multi-Processor System 审中-公开
标题翻译：在多处理器系统中执行引导顺序
公开(公告)号：US20130097412A1
公开(公告)日：2013-04-18
申请号：US13275019
申请日：2011-10-17
申请人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Terence Rodrigues , Mehul M. Shah , Robert K. Sloan , Wingcheung Tam , Mark W. Wenning
发明人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Terence Rodrigues , Mehul M. Shah , Robert K. Sloan , Wingcheung Tam , Mark W. Wenning
IPC分类号： G06F9/445
CPC分类号： G06F9/4405
摘要： Methods, apparatuses, and computer program products for performing a boot sequence in a multi-processor system are provided. Embodiments include: in response to detecting initiation of a boot sequence of the multi-processor system, initializing, by a bootstrap processor (BSP), BSP memory associated with the BSP and initializing, by an application processor, memory associated with the application processor; determining, by the BSP, whether the initialization of the BSP memory is completed; and if the initialization of the BSP memory is completed, loading, by the BSP, an operating system on the BSP memory regardless of whether the application processor has completed initialization of the memory associated with the application processor.
摘要翻译：提供了用于在多处理器系统中执行引导顺序的方法，装置和计算机程序产品。实施例包括：响应于检测到多处理器系统的引导序列的启动，由引导处理器（BSP）初始化与BSP相关联的BSP存储器并由应用处理器初始化与应用处理器相关联的存储器; 由BSP确定BSP存储器的初始化是否完成; 并且如果BSP存储器的初始化完成，则由BSP加载BSP存储器上的操作系统，而不管应用处理器是否已经完成与应用处理器相关联的存储器的初始化。

2. 发明申请

US20130086571A1 Dynamically Updating Firmware In A Computing System 审中-公开
标题翻译：在计算系统中动态更新固件
公开(公告)号：US20130086571A1
公开(公告)日：2013-04-04
申请号：US13249437
申请日：2011-09-30
申请人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Douglas W. Oliver , Terence Rodrigues , Mehul M. Shah , Robert K. Sloan , Wingcheung Tam
发明人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Douglas W. Oliver , Terence Rodrigues , Mehul M. Shah , Robert K. Sloan , Wingcheung Tam
IPC分类号： G06F9/44
CPC分类号： G06F8/654
摘要： Dynamically updating firmware in a computing system, including: receiving, by a firmware update module, a request to update firmware in the computing system; receiving, by the firmware update module, a firmware update; storing, by the firmware update module, the firmware update into computer memory of the computing system; and initiating, by the firmware update module, a system management interrupt with the address in computer memory of the computing system at which the firmware update is stored.
摘要翻译：动态更新计算系统中的固件，包括：由固件更新模块接收更新计算系统中的固件的请求; 由所述固件更新模块接收固件更新; 由所述固件更新模块将所述固件更新存储到所述计算系统的计算机存储器中; 以及由固件更新模块发起具有存储固件更新的计算系统的计算机存储器中的地址的系统管理中断。

3. 发明申请

US20130311761A1 Intelligently Loading Legacy Option ROMs In A Computing System 有权
标题翻译：在计算系统中智能加载传统选项ROM
公开(公告)号：US20130311761A1
公开(公告)日：2013-11-21
申请号：US13476230
申请日：2012-05-21
申请人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Douglas W. Oliver , Terence Rodrigues , Mehul M. Shah , Wingcheung Tam
发明人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Douglas W. Oliver , Terence Rodrigues , Mehul M. Shah , Wingcheung Tam
IPC分类号： G06F9/24
CPC分类号： G06F9/24 , G06F9/4401 , G06F9/4411
摘要： Intelligently loading legacy option ROMs in a computing system, including: generating, by a legacy option ROM manager, an inventory for the computing system, wherein the inventory for the computing system identifies one or more devices in the computing system; determining, by the legacy option ROM manager for each option ROM available for loading, whether a device supported by the option ROM is included in the inventory for the computing system; responsive to determining that the device supported by the option ROM is not included in the inventory for the computing system, preventing the option ROM from being loaded into an option ROM address space; and responsive to determining that the device supported by the option ROM is included in the inventory for the computing system, enabling the option ROM to be loaded into the option ROM address space.
摘要翻译：在计算系统中智能地加载传统选项ROM，包括：由遗留选项ROM管理器生成计算系统的清单，其中计算系统的清单识别计算系统中的一个或多个设备; 通过遗留选项ROM管理器为可用于加载的每个选项ROM确定是否将包含选项ROM的设备包括在计算系统的清单中; 响应于确定由选项ROM支持的设备不包括在计算系统的清单中，防止选项ROM被加载到选项ROM地址空间中; 并且响应于确定由所述选项ROM支持的设备被包括在所述计算系统的清单中，使得所述选项ROM被加载到所述选项ROM地址空间中。

4. 发明授权

US09003172B2 Intelligently controlling loading of legacy option ROMs in a computing system 有权
标题翻译：智能控制计算系统中遗留选项ROM的加载
公开(公告)号：US09003172B2
公开(公告)日：2015-04-07
申请号：US13476230
申请日：2012-05-21
申请人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Douglas W. Oliver , Terence Rodrigues , Mehul M. Shah , Wingcheung Tam
发明人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Douglas W. Oliver , Terence Rodrigues , Mehul M. Shah , Wingcheung Tam
IPC分类号： G06F9/24 , G06F9/44
CPC分类号： G06F9/24 , G06F9/4401 , G06F9/4411
摘要： Intelligently loading legacy option ROMs in a computing system, including: generating, by a legacy option ROM manager, an inventory for the computing system, wherein the inventory for the computing system identifies one or more devices in the computing system; determining, by the legacy option ROM manager for each option ROM available for loading, whether a device supported by the option ROM is included in the inventory for the computing system; responsive to determining that the device supported by the option ROM is not included in the inventory for the computing system, preventing the option ROM from being loaded into an option ROM address space; and responsive to determining that the device supported by the option ROM is included in the inventory for the computing system, enabling the option ROM to be loaded into the option ROM address space.
摘要翻译：在计算系统中智能地加载传统选项ROM，包括：由遗留选项ROM管理器生成计算系统的清单，其中计算系统的清单识别计算系统中的一个或多个设备; 通过遗留选项ROM管理器为可用于加载的每个选项ROM确定是否将包含选项ROM的设备包括在计算系统的清单中; 响应于确定由选项ROM支持的设备不包括在计算系统的清单中，防止选项ROM加载到选项ROM地址空间中; 并且响应于确定由所述选项ROM支持的设备被包括在所述计算系统的清单中，使得所述选项ROM被加载到所述选项ROM地址空间中。

5. 发明申请

US20130262912A1 MANAGING HARDWARE CONFIGURATION OF A COMPUTER NODE 审中-公开
标题翻译：管理计算机节点的硬件配置
公开(公告)号：US20130262912A1
公开(公告)日：2013-10-03
申请号：US13437504
申请日：2012-04-02
申请人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Douglas W. Oliver , Terence Rodrigues , Mehul M. Shah , Wingcheung Tam
发明人： Shiva R. Dasari , Raghuswamyreddy Gundam , Newton P. Liu , Douglas W. Oliver , Terence Rodrigues , Mehul M. Shah , Wingcheung Tam
IPC分类号： G06F9/00 , G06F11/20
CPC分类号： G06F9/4411 , G06F1/266
摘要： A computer node includes an integrated management module, a field-programmable gate array, and a plurality of individual hardware devices. The integrated management module receives a user identification and identifies an associated hardware configuration, wherein the hardware configuration identifies hardware devices to be powered off. The integrated management module may instruct the field-programmable gate array to use switches to power off the identified hardware devices without powering off other hardware devices. Optionally, a default hardware configuration may be implemented in the absence
摘要翻译：计算机节点包括集成管理模块，现场可编程门阵列和多个单独的硬件设备。集成管理模块接收用户标识并识别相关联的硬件配置，其中硬件配置标识要关闭的硬件设备。集成管理模块可以指示现场可编程门阵列使用开关来断开所识别的硬件设备而不关闭其他硬件设备。可选地，默认硬件配置可以在不存在的情况下实现

6. 发明申请

US20110320671A1 MOVING OWNERSHIP OF A DEVICE BETWEEN COMPUTE ELEMENTS 有权
标题翻译：移动计算机元件之间的所有权
公开(公告)号：US20110320671A1
公开(公告)日：2011-12-29
申请号：US12822867
申请日：2010-06-24
申请人： William J. Armstrong , Scott N. Dunham , David R. Engebretsen , Ronald E. Freking , Mehul M. Shah , Steven M. Thurber , Curtis C. Wollbrink
发明人： William J. Armstrong , Scott N. Dunham , David R. Engebretsen , Ronald E. Freking , Mehul M. Shah , Steven M. Thurber , Curtis C. Wollbrink
IPC分类号： G06F13/36
CPC分类号： G06F13/4027 , G06F12/1081 , G06F2213/0058
摘要： In an embodiment, a command is received that requests movement of ownership of a target device from an origin compute element to a destination compute element. From the origin compute element, a translation of a virtual bridge identifier to a first secondary bus identifier, a first subordinate bus identifier, and a first MMIO bus address range is removed. To the destination compute element, a translation of the target virtual bridge identifier to a second secondary bus identifier, a second subordinate bus identifier, and a second MMIO bus address range is added. From a south chip that comprises the target virtual bridge, a translation of the target virtual bridge identifier to an identifier of the origin compute element is removed. To the south chip, a translation of the target virtual bridge identifier to an identifier of the destination compute element is added.
摘要翻译：在一个实施例中，接收到请求将目标设备的所有权从原始计算元件移动到目的地计算单元的命令。从原始计算元件，去除虚拟网桥标识符到第一辅助总线标识符，第一从属总线标识符和第一MMIO总线地址范围的转换。向目的地计算单元添加目标虚拟桥标识符到第二副总线标识符，第二从属总线标识符和第二MMIO总线地址范围的转换。从包括目标虚拟桥的南芯片，将目标虚拟网桥标识符转换为原始计算元素的标识符被去除。向南芯片，添加目标虚拟网桥标识符到目的地计算单元的标识符的翻译。

7. 发明申请

US20090113194A1 Persisting value relevant to debugging of computer system during reset of computer system 有权
标题翻译：计算机系统复位期间与计算机系统调试相关的持久价值
公开(公告)号：US20090113194A1
公开(公告)日：2009-04-30
申请号：US11926083
申请日：2007-10-28
申请人： Ryuji Orita , Mark A. Brandyberry , Mehul M. Shah , Sean P. Brogan
发明人： Ryuji Orita , Mark A. Brandyberry , Mehul M. Shah , Sean P. Brogan
IPC分类号： G06F15/177
CPC分类号： G06F11/1417 , G06F11/0787
摘要： The last value of an element of a computing system is continually stored within a first register. The element is cleared during any restart or reset of the computing system. The last value is relevant to debugging of the computing system when the computing system fails to perform as expected and/or as desired. Upon receiving an instruction to reset the computing system via a first reset signal corresponding to pressing of a reset button or a second reset signal corresponding to a baseboard management controller issuing a reset command, the last value of the element as stored within the first register is copied to a second register. The computing system is then reset. The last value of the element as stored within the second register persists within the second register during this type of reset, but is cleared during any other reset or restart of the computing system.
摘要翻译：计算系统的元素的最后一个值被连续地存储在第一寄存器中。该元素在计算系统的任何重新启动或重置期间被清除。最后一个值与计算系统在计算系统按预期和/或需要时无法执行的调试相关。当接收到通过对应于复位按钮的按下的第一复位信号或对应于发出复位命令的基板管理控制器的第二复位信号来重置计算系统的指令时，存储在第一寄存器内的元件的最后值是复制到第二个寄存器。然后重新计算系统。在这种类型的复位期间，存储在第二寄存器内的元素的最后一个值在第二个寄存器内仍然存在，但在计算系统的任何其他复位或重新启动期间都将被清除。

8. 发明授权

US08041936B2 Persisting value relevant to debugging of computer system during reset of computer system 有权
标题翻译：计算机系统复位期间与计算机系统调试相关的持久价值
公开(公告)号：US08041936B2
公开(公告)日：2011-10-18
申请号：US11926083
申请日：2007-10-28
申请人： Ryuji Orita , Mark A. Brandyberry , Mehul M. Shah , Sean P. Brogan
发明人： Ryuji Orita , Mark A. Brandyberry , Mehul M. Shah , Sean P. Brogan
IPC分类号： G11C29/00 , G06F11/22
CPC分类号： G06F11/1417 , G06F11/0787
摘要： The last value of an element of a computing system is continually stored within a first register. The element is cleared during any restart or reset of the computing system. The last value is relevant to debugging of the computing system when the computing system fails to perform as expected and/or as desired. Upon receiving an instruction to reset the computing system via a first reset signal corresponding to pressing of a reset button or a second reset signal corresponding to a baseboard management controller issuing a reset command, the last value of the element as stored within the first register is copied to a second register. The computing system is then reset. The last value of the element as stored within the second register persists within the second register during this type of reset, but is cleared during any other reset or restart of the computing system.
摘要翻译：计算系统的元素的最后一个值被连续地存储在第一寄存器中。该元素在计算系统的任何重新启动或重置期间被清除。最后一个值与计算系统在计算系统按预期和/或需要时不能执行的调试相关。当接收到通过对应于复位按钮的按下的第一复位信号或对应于发出复位命令的基板管理控制器的第二复位信号来重置计算系统的指令时，存储在第一寄存器内的元件的最后值是复制到第二个寄存器。然后重新计算系统。在这种类型的复位期间，存储在第二寄存器内的元素的最后一个值在第二个寄存器内仍然存在，但在计算系统的任何其他复位或重新启动期间都会被清除。

9. 发明申请

US20080320294A1 USER SELECTABLE CONFIGURATION OPTIONS APPLICATION FOR INACCESSIBLE NONVOLATILE STORAGE AT BOOTSTRAP 有权
标题翻译：用户可选择的配置选项应用于不可识别的非易失性存储器
公开(公告)号：US20080320294A1
公开(公告)日：2008-12-25
申请号：US11765952
申请日：2007-06-20
申请人： Mehul M. Shah
发明人： Mehul M. Shah
IPC分类号： G06F9/24 , G06F13/36
CPC分类号： G06F9/44505 , G06F9/4403
摘要： Embodiments of the present invention address deficiencies of the art in respect to applying user configurable options during bootstrap and provide a novel and non-obvious method, system and computer program product for user selectable configuration options application for inaccessible nonvolatile storage at bootstrap. In one embodiment of the invention, a method for user selectable configuration options application for inaccessible nonvolatile storage at bootstrap can be provided. The method can include powering up a motherboard for a computer system and reading user selectable configuration options for the computing system from sticky bits prior to bootstrap for the motherboard. The method further can include applying the user selectable configuration options to the computing system. Finally, the method can include performing bootstrap for the motherboard subsequent to applying the user selectable configuration options.
摘要翻译：本发明的实施例解决了在引导期间应用用户可配置选项的本领域的缺点，并且提供了一种新颖且不显眼的方法，系统和计算机程序产品，用于用户可选配置选项应用，用于引导时不可访问的非易失性存储。在本发明的一个实施例中，可以提供一种用于用户可选配置选项应用的方法，用于引导时不可访问的非易失性存储。该方法可以包括为计算机系统供电主板，并且在为主板引导之前从粘性位读取计算系统的用户可选配置选项。该方法还可以包括将用户可选配置选项应用于计算系统。最后，该方法可以包括在应用用户可选配置选项之后为主板执行引导。

10. 发明授权

US06823498B2 Masterless building block binding to partitions 失效
标题翻译：无阻的构建块绑定到分区
公开(公告)号：US06823498B2
公开(公告)日：2004-11-23
申请号：US10045926
申请日：2002-01-09
申请人： Wayne A. Downer , Bruce M. Gilbert , Thomas D. Lovett , Mehul M. Shah
发明人： Wayne A. Downer , Bruce M. Gilbert , Thomas D. Lovett , Mehul M. Shah
IPC分类号： G06F945
CPC分类号： G06F9/5061
摘要： A masterless approach for binding building blocks to partitions is disclosed. Other blocks are first sent a first physical port identifier indicating a block's physical location, and a first partition identifier indicating the block's partition. Second physical port identifiers and second partition identifiers are received from the other blocks. The first physical port identifier and the second physical port identifiers of a subset of the other blocks are then sent to the subset, the second partition identifiers of the subset being equal to the first partition identifier. The first physical port identifier and the second physical port identifiers of the subset are also received from each block of the subset. A first logical port identifier indicating the block's logical location is sent to the subset, and second logical port identifiers are received from the subset. The block joins the partition indicated by the first partition identifier.
摘要翻译：公开了一种用于将构建块绑定到分区的无主的方法。其他块首先被发送指示块的物理位置的第一物理端口标识符，以及指示块的分区的第一分区标识符。从其他块接收第二物理端口标识符和第二分区标识符。然后将其他块的子集的第一物理端口标识符和第二物理端口标识符发送到子集，子集的第二分区标识符等于第一分区标识符。子集的第一物理端口标识符和第二物理端口标识符也从子集的每个块接收。指示块的逻辑位置的第一逻辑端口标识符被发送到子集，并且从子集接收第二逻辑端口标识符。该块加入由第一个分区标识符指示的分区。

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