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1. 发明授权

US08013398B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08013398B2
公开(公告)日：2011-09-06
申请号：US12056909
申请日：2008-03-27
申请人： Shinji Mori , Tsutomu Sato , Koji Matsuo
发明人： Shinji Mori , Tsutomu Sato , Koji Matsuo
IPC分类号： H01L29/78
CPC分类号： H01L29/772 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/66636 , H01L29/7848
摘要： A semiconductor device includes a first pMISFET region having an Si channel, a second pMISFET region having an Si channel and an nMISFET region having an Si channel. First SiGe layers which apply first compression strain to the Si channel are embedded and formed in the first pMISFET region to sandwich the Si channel thereof and second SiGe layers which apply second compression strain different from the first compression strain to the Si channel are embedded and formed in the second pMISFET region to sandwich the Si channel thereof.
摘要翻译：半导体器件包括具有Si沟道的第一pMISFET区，具有Si沟道的第二pMISFET区和具有Si沟道的nMISFET区。将第一压缩应变施加到Si沟道的第一SiGe层嵌入并形成在第一pMISFET区域中以夹持其Si沟道，并且将施加与第一压缩应变不同的第二压缩应变的第二SiGe层嵌入并形成在第二pMISFET区域夹持其Si通道。

2. 再颁专利

USRE45462E1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：USRE45462E1
公开(公告)日：2015-04-14
申请号：US13569604
申请日：2012-08-08
申请人： Shinji Mori , Tsutomu Sato , Koji Matsuo
发明人： Shinji Mori , Tsutomu Sato , Koji Matsuo
IPC分类号： H01L29/78 , H01L29/772
CPC分类号： H01L29/772 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/66636 , H01L29/7848
摘要： A semiconductor device includes a first pMISFET region having an Si channel, a second pMISFET region having an Si channel and an nMISFET region having an Si channel. First SiGe layers which apply first compression strain to the Si channel are embedded and formed in the first pMISFET region to sandwich the Si channel thereof and second SiGe layers which apply second compression strain different from the first compression strain to the Si channel are embedded and formed in the second pMISFET region to sandwich the Si channel thereof.
摘要翻译：半导体器件包括具有Si沟道的第一pMISFET区，具有Si沟道的第二pMISFET区和具有Si沟道的nMISFET区。将第一压缩应变施加到Si沟道的第一SiGe层嵌入并形成在第一pMISFET区域中以夹持其Si沟道，并且将施加与第一压缩应变不同的第二压缩应变的第二SiGe层嵌入并形成在第二pMISFET区域夹持其Si通道。

3. 发明授权

US08124472B2 Manufacturing method of a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08124472B2
公开(公告)日：2012-02-28
申请号：US13205950
申请日：2011-08-09
申请人： Shinji Mori , Tsutomu Sato , Koji Matsuo
发明人： Shinji Mori , Tsutomu Sato , Koji Matsuo
IPC分类号： H01L29/78
CPC分类号： H01L29/772 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/66636 , H01L29/7848
摘要： A semiconductor device includes a first pMISFET region having an Si channel, a second pMISFET region having an Si channel and an nMISFET region having an Si channel. First SiGe layers which apply first compression strain to the Si channel are embedded and formed in the first pMISFET region to sandwich the Si channel thereof and second SiGe layers which apply second compression strain different from the first compression strain to the Si channel are embedded and formed in the second pMISFET region to sandwich the Si channel thereof.
摘要翻译：半导体器件包括具有Si沟道的第一pMISFET区，具有Si沟道的第二pMISFET区和具有Si沟道的nMISFET区。将第一压缩应变施加到Si沟道的第一SiGe层嵌入并形成在第一pMISFET区域中以夹持其Si沟道，并且将施加与第一压缩应变不同的第二压缩应变的第二SiGe层嵌入并形成在第二pMISFET区域夹持其Si通道。

4. 发明申请

US20110294271A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110294271A1
公开(公告)日：2011-12-01
申请号：US13205950
申请日：2011-08-09
申请人： Shinji MORI , Tsutomu Sato , Koji Matsuo
发明人： Shinji MORI , Tsutomu Sato , Koji Matsuo
IPC分类号： H01L21/8238
CPC分类号： H01L29/772 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/66636 , H01L29/7848
摘要： A semiconductor device includes a first pMISFET region having an Si channel, a second pMISFET region having an Si channel and an nMISFET region having an Si channel. First SiGe layers which apply first compression strain to the Si channel are embedded and formed in the first pMISFET region to sandwich the Si channel thereof and second SiGe layers which apply second compression strain different from the first compression strain to the Si channel are embedded and formed in the second pMISFET region to sandwich the Si channel thereof.
摘要翻译：半导体器件包括具有Si沟道的第一pMISFET区，具有Si沟道的第二pMISFET区和具有Si沟道的nMISFET区。将第一压缩应变施加到Si沟道的第一SiGe层嵌入并形成在第一pMISFET区域中以夹持其Si沟道，并且将施加与第一压缩应变不同的第二压缩应变的第二SiGe层嵌入并形成在第二pMISFET区域夹持其Si通道。

5. 发明申请

US20080237732A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080237732A1
公开(公告)日：2008-10-02
申请号：US12056909
申请日：2008-03-27
申请人： Shinji MORI , Tsutomu Sato , Koji Matsuo
发明人： Shinji MORI , Tsutomu Sato , Koji Matsuo
IPC分类号： H01L29/78 , H01L21/8238
CPC分类号： H01L29/772 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L29/66636 , H01L29/7848
摘要： A semiconductor device includes a first pMISFET region having an Si channel, a second pMISFET region having an Si channel and an nMISFET region having an Si channel. First SiGe layers which apply first compression strain to the Si channel are embedded and formed in the first pMISFET region to sandwich the Si channel thereof and second SiGe layers which apply second compression strain different from the first compression strain to the Si channel are embedded and formed in the second pMISFET region to sandwich the Si channel thereof.
摘要翻译：半导体器件包括具有Si沟道的第一pMISFET区，具有Si沟道的第二pMISFET区和具有Si沟道的nMISFET区。将第一压缩应变施加到Si沟道的第一SiGe层嵌入并形成在第一pMISFET区域中以夹持其Si沟道，并且将施加与第一压缩应变不同的第二压缩应变的第二SiGe层嵌入并形成在第二pMISFET区域夹持其Si通道。

6. 发明授权

US08551871B2 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08551871B2
公开(公告)日：2013-10-08
申请号：US13240662
申请日：2011-09-22
申请人： Ichiro Mizushima , Shinji Mori , Masahiko Murano , Tsutomu Sato , Takashi Nakao , Hiroshi Itokawa
发明人： Ichiro Mizushima , Shinji Mori , Masahiko Murano , Tsutomu Sato , Takashi Nakao , Hiroshi Itokawa
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L21/02636 , H01L21/02381 , H01L21/02532 , H01L21/0262
摘要： A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中，从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

7. 发明申请

US20120090535A1 Method of Fabricating Semiconductor Device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120090535A1
公开(公告)日：2012-04-19
申请号：US13240662
申请日：2011-09-22
申请人： Ichiro Mizushima , Shinji Mori , Masahiko Murano , Tsutomu Sato , Takashi Nakao , Hiroshi Itokawa
发明人： Ichiro Mizushima , Shinji Mori , Masahiko Murano , Tsutomu Sato , Takashi Nakao , Hiroshi Itokawa
IPC分类号： C30B25/02
CPC分类号： H01L21/02636 , H01L21/02381 , H01L21/02532 , H01L21/0262
摘要： A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中，从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

8. 发明授权

US08043945B2 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08043945B2
公开(公告)日：2011-10-25
申请号：US12401453
申请日：2009-03-10
申请人： Ichiro Mizushima , Shinji Mori , Masahiko Murano , Tsutomu Sato , Takashi Nakao , Hiroshi Itokawa
发明人： Ichiro Mizushima , Shinji Mori , Masahiko Murano , Tsutomu Sato , Takashi Nakao , Hiroshi Itokawa
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L21/02636 , H01L21/02381 , H01L21/02532 , H01L21/0262
摘要： A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中，从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

9. 发明授权

US08012858B2 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08012858B2
公开(公告)日：2011-09-06
申请号：US12560265
申请日：2009-09-15
申请人： Masahiko Murano , Ichiro Mizushima , Tsutomu Sato , Shinji Mori , Shuji Katsui , Hiroshi Itokawa
发明人： Masahiko Murano , Ichiro Mizushima , Tsutomu Sato , Shinji Mori , Shuji Katsui , Hiroshi Itokawa
IPC分类号： H01L21/20
CPC分类号： H01L21/02381 , H01L21/02378 , H01L21/02532 , H01L21/02661 , H01L21/823807 , H01L21/823814 , H01L21/823828 , H01L29/66795 , H01L29/7848
摘要： A method of fabricating a semiconductor device according to one embodiment includes: removing a native oxide film and adhering silicon nitrides on an area of a Si based substrate in hydrogen gas atmosphere under a condition in which a pressure is a first pressure and a temperature is a first temperature, a silicon nitride-containing member being formed on the Si based substrate, the area being a area not covered by the member; lowering the temperature to a second temperature from the first temperature while maintaining the pressure at the first pressure in hydrogen gas atmosphere; lowering the pressure to a second pressure from the first pressure while maintaining the temperature at the second temperature in hydrogen gas atmosphere; and epitaxially growing a crystal on the area of the Si based substrate in a precursor gas atmosphere after the pressure is lowered to the second pressure, the crystal including at least one of Si and Ge, the precursor gas atmosphere including at least one of hydrogen, Si and Ge.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：在氢气气氛中，在压力为第一压力和温度为的条件下，除去天然氧化物膜并将硅氮化物粘附在Si基衬底的区域上第一温度，在所述Si基衬底上形成含氮化硅的构件，所述区域是未被构件覆盖的区域; 将温度从第一温度降低到第二温度，同时保持在氢气气氛中的第一压力下的压力; 将压力从第一压力降低到第二压力，同时将温度保持在第二温度在氢气气氛中; 并且在所述压力降低到所述第二压力之后，在前驱体气体气氛中，在所述Si基基板的区域上外延生长晶体，所述晶体包括Si和Ge中的至少一种，所述前体气体气体包括氢， Si和Ge。

10. 发明申请

US20090263957A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090263957A1
公开(公告)日：2009-10-22
申请号：US12401453
申请日：2009-03-10
申请人： Ichiro MIZUSHIMA , Shinji Mori , Masahiko Murano , Tsutomu Sato , Takashi Nakao , Hiroshi Itokawa
发明人： Ichiro MIZUSHIMA , Shinji Mori , Masahiko Murano , Tsutomu Sato , Takashi Nakao , Hiroshi Itokawa
IPC分类号： H01L21/20
CPC分类号： H01L21/02636 , H01L21/02381 , H01L21/02532 , H01L21/0262
摘要： A method of fabricating a semiconductor device according to one embodiment includes: exposing a surface of a semiconductor substrate to a halogen-containing gas that contains at least one of Si and Ge, the semiconductor substrate being provided with a member comprising an oxide and consisting mainly of Si; and exposing the surface of the semiconductor substrate to an atmosphere containing at least one of a Si-containing gas not containing halogen and a Ge-containing gas not containing halogen after starting exposure of the surface of the semiconductor substrate to the halogen-containing gas, thereby epitaxially growing a crystal film containing at least one of Si and Ge on the surface.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：将半导体衬底的表面暴露于含有Si和Ge中的至少一种的含卤素的气体，所述半导体衬底设置有包含氧化物的构件，主要由的Si; 以及将半导体衬底的表面开始暴露于含卤素气体之后，将半导体衬底的表面暴露于含有不含卤素的含Si气体和不含卤素的含Ge气体中的至少一种的气氛中，从而在表面上外延生长含有Si和Ge中的至少一种的晶体膜。

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