专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5754312A Method of and apparatus for detecting pixels constituting dotted image area utilizing distance between change points of pixel values 失效
标题翻译：用于利用像素值的变化点之间的距离来检测构成点图像区域的像素的方法和装置
公开(公告)号：US5754312A
公开(公告)日：1998-05-19
申请号：US558187
申请日：1995-11-15
申请人： Masaya Fujimoto , Haruo Yamamoto , Masayuki Mizuno , Hidechika Kumamoto , Shinji Hayashi
发明人： Masaya Fujimoto , Haruo Yamamoto , Masayuki Mizuno , Hidechika Kumamoto , Shinji Hayashi
IPC分类号： H04N1/40
CPC分类号： H04N1/40062
摘要： Disclosed is an apparatus for detecting pixels in a dotted image area (dotted area pixels). Image data corresponding to each of the pixels is coded into one of a predetermined number of discrete values. The distance between change points at which the value of the pixel after the coding is changed from a first value to a second value is detected. Further, it is examined whether or not periodicity is recognized in the distance between the change points in the vicinity of a target pixel. If periodicity is recognized in the distance between the change points, it is judged that the target pixel may constitute a dotted image area.
摘要翻译：公开了一种用于检测虚线图像区域（虚线区域像素）中的像素的装置。对应于每个像素的图像数据被编码为预定数量的离散值之一。检测编码后的像素的值从第一值变为第二值的变化点之间的距离。此外，检查在目标像素附近的变化点之间的距离是否识别周期性。如果在变化点之间的距离中识别周期性，则判断为目标像素可以构成虚线图像区域。

2. 发明授权

US5790261A Color correction device to correct errors in input and output portions of an image developing device and method thereof 失效
标题翻译：用于校正图像显影装置的输入和输出部分中的错误的颜色校正装置及其方法
公开(公告)号：US5790261A
公开(公告)日：1998-08-04
申请号：US650438
申请日：1996-05-20
申请人： Shinji Hayashi , Masayuki Mizuno , Haruo Yamamoto
发明人： Shinji Hayashi , Masayuki Mizuno , Haruo Yamamoto
IPC分类号： H04N1/60 , H04N1/00 , G03F3/08 , H04N1/46
CPC分类号： H04N1/6075 , H04N1/6027
摘要： A color correcting device and a color correcting method in an image forming apparatus such as a color copying machine that rely on, a correction factor in a masking equation which is previously found for each predetermined hue range. It is judged which of a plurality of predetermined hue ranges corresponds to a hue corresponding to input data composed of color data in a plurality of colors. The input data is subjected to color correction using a masking equation using a correction factor corresponding to the judged hue range.
摘要翻译：在诸如彩色复印机的图像形成装置中，依赖于对于每个预定色相范围预先找到的掩蔽方程中的校正因子的颜色校正装置和颜色校正方法。判断多个预定色调范围中的哪一个对应于与由多种颜色的颜色数据组成的输入数据相对应的色调。使用与所判定的色调范围对应的校正因子的掩蔽方程对输入数据进行颜色校正。

3. 发明授权

US5729627A Apparatus for and method of judging dotted image area 失效
标题翻译：用于判断虚线图像区域的装置和方法
公开(公告)号：US5729627A
公开(公告)日：1998-03-17
申请号：US556839
申请日：1995-11-02
申请人： Masayuki Mizuno , Masaya Fujimoto , Haruo Yamamoto , Hidechika Kumamoto
发明人： Masayuki Mizuno , Masaya Fujimoto , Haruo Yamamoto , Hidechika Kumamoto
IPC分类号： H04N1/40 , H04N1/387
CPC分类号： H04N1/40062
摘要： An apparatus for and a method of judging a dotted image area using a small-capacity memory. Image data corresponding to one line out of image data representing an original image are stored in a line memory. On the line corresponding to the image data stored in the line memory, a target pixel is successively set along the main scanning direction. Image data corresponding to the target pixel is compared with image data corresponding to pixels around the target pixel. It is judged whether or not the target pixel is a peculiar point pixel on the basis of the result of the comparison. Further, the distance between peculiar point pixels is operated. The operated distance between the peculiar point pixels is referred to a predetermined judgment basis, to judge whether or not a judging area including the finite number of pixels is a dotted image area.
摘要翻译：一种使用小容量存储器来判断虚线图像区域的装置和方法。对应于表示原始图像的图像数据中的一行的图像数据被存储在行存储器中。在对应于存储在行存储器中的图像数据的行上，沿着主扫描方向连续设置目标像素。对应于目标像素的图像数据与对应于目标像素周围的像素的图像数据进行比较。基于比较结果判断目标像素是否是特殊点像素。此外，操作特殊点像素之间的距离。特定点像素之间的操作距离参照预定判断基准，判断包括有限像素数的判断区域是否为虚线图像区域。

4. 发明授权

US08674774B2 Aging diagnostic device, aging diagnostic method 失效
标题翻译：老化诊断仪，老化诊断方法
公开(公告)号：US08674774B2
公开(公告)日：2014-03-18
申请号：US13394542
申请日：2010-09-01
申请人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
发明人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
IPC分类号： H03L7/24 , G01R31/28
CPC分类号： G01R31/2856 , G01R31/2882 , G01R31/2884 , H03K5/133
摘要： There is provided an aging diagnostic device including: a reference ring oscillator (101) that constitutes a ring oscillator using an odd-numbered plurality of logic gates constituted using a CMOS circuit; a test ring oscillator (102) that constitutes a ring oscillator using an odd-numbered plurality of logic gates having the same configuration as that of the logic gate; a load unit (104) that inputs a load signal to the test ring oscillator (102); a control unit (105) that simultaneously inputs a control signal instructing a start of oscillation of the reference ring oscillator (101) and the test ring oscillator (102) to the reference ring oscillator (101) and the test ring oscillator (102); and a comparison unit (103) that compares differences in the amount of movement of pulses within the reference ring oscillator (101) and the test ring oscillator (102), respectively, in the same time.
摘要翻译：提供了一种老化诊断装置，包括：构成使用CMOS电路构成的奇数多个逻辑门的环形振荡器的参考环形振荡器（101）使用具有与逻辑门相同配置的奇数多个逻辑门构成环形振荡器的测试环振荡器（102）; 负载单元（104），其向所述测试环形振荡器（102）输入负载信号; 控制单元（105），其同时将参考环形振荡器（101）和测试环形振荡器（102）的振荡开始的控制信号输入到参考环形振荡器（101）和测试环形振荡器（102）; 以及比较单元（103），其分别同时比较参考环形振荡器（101）和测试环形振荡器（102）中的脉冲的移动量的差异。

5. 发明授权

US08429663B2 Allocating task groups to processor cores based on number of task allocated per core, tolerable execution time, distance between cores, core coordinates, performance and disposition pattern 有权
标题翻译：根据每个核心分配的任务数量，允许的执行时间，核心距离，核心坐标，性能和配置模式，将任务组分配到处理器核心
公开(公告)号：US08429663B2
公开(公告)日：2013-04-23
申请号：US12529367
申请日：2008-02-05
申请人： Masamichi Takagi , Masayuki Mizuno , Hiroaki Inoue
发明人： Masamichi Takagi , Masayuki Mizuno , Hiroaki Inoue
IPC分类号： G06F9/50
CPC分类号： G06F9/5027 , G06F11/1428 , G06F11/3419 , G06F11/3433 , G06F2209/483 , G06F2209/501
摘要： Even if a multiprocessor includes an uneven performance core, an inoperative core or a core that does not satisfy such a performance as designed but if the contrivance of task allocation can satisfy the requirement of an application to be executed, the multiple processors are shipped. In a task group allocation method for allocating, to a processor having a plurality of cores, task groups included in an application for the processor to execute, a calculation section measures performances and disposition patterns of the cores, generates a restricting condition associating the measured performances and disposition patterns of the cores with information indicating whether the application can be executed, and, with reference to the restricting condition, reallocates to the cores, the task groups that have previously been allocated to the cores.
摘要翻译：即使多处理器包括不均衡的性能核心，不能满足设计性能的不工作核心或核心，但是如果任务分配的设计能够满足执行应用程序的要求，则会发送多个处理器。在用于将具有多个核心的处理器分配给应用程序中的处理器执行的任务组的任务组分配方法中，计算部分测量核心的性能和配置模式，产生将测量性能以及具有指示是否可以执行应用的信息的核心的配置模式，并且参考限制条件将已经分配给核心的任务组重新分配给核心。

6. 发明授权

US08399960B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US08399960B2
公开(公告)日：2013-03-19
申请号：US12920381
申请日：2009-02-20
申请人： Yoshihiro Nakagawa , Koichiro Noguchi , Yoshio Kameda , Masayuki Mizuno
发明人： Yoshihiro Nakagawa , Koichiro Noguchi , Yoshio Kameda , Masayuki Mizuno
IPC分类号： H01L27/08
CPC分类号： H01L27/0688 , H01L23/48 , H01L23/5227 , H01L24/48 , H01L24/49 , H01L25/0655 , H01L25/0657 , H01L2224/05553 , H01L2224/48091 , H01L2224/49113 , H01L2225/06527 , H01L2924/00014 , H01L2924/14 , H01L2924/3025 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A plurality of semiconductor chips are juxtaposed, each having an electromagnetic induction coil disposed thereon. A signal is transmitted by way of electromagnetic induction between the electromagnetic induction coils disposed on a pair of adjacent semiconductor chips.
摘要翻译：多个半导体芯片并置，每个具有布置在其上的电磁感应线圈。在布置在一对相邻半导体芯片上的电磁感应线圈之间通过电磁感应传输信号。

7. 发明授权

US08301936B2 Apparatus and method for performing a screening test of semiconductor integrated circuits 失效
标题翻译：用于进行半导体集成电路的屏蔽测试的装置和方法
公开(公告)号：US08301936B2
公开(公告)日：2012-10-30
申请号：US12447524
申请日：2007-10-17
申请人： Hiroaki Inoue , Masamichi Takagi , Masayuki Mizuno
发明人： Hiroaki Inoue , Masamichi Takagi , Masayuki Mizuno
IPC分类号： G06F11/00
CPC分类号： G06F11/277
摘要： An apparatus for performing a screening test of a semiconductor integrated circuit is disclosed, the semiconductor integrated circuit comprising a plurality of processors each having an output signal for instruction execution information, and the processors being programmatically operable. The apparatus for performing a screening test of a semiconductor integrated circuit comprises: an instruction/data signal synchronization circuit for synchronizing the supplying of instructions to said respective processors and for synchronizing the supplying of data to said respective processors; and a trace comparison circuit for comparing instruction execution information that are output from the respective processors to determine whether or not any of said processors has output different instruction execution information.
摘要翻译：公开了一种用于执行半导体集成电路的屏蔽测试的装置，所述半导体集成电路包括多个处理器，每个处理器具有用于指令执行信息的输出信号，并且所述处理器可编程地可操作。用于执行半导体集成电路的屏蔽测试的装置包括：指令/数据信号同步电路，用于将指令的提供同步到所述各个处理器并用于同步向所述各个处理器提供数据; 以及跟踪比较电路，用于比较从各个处理器输出的指令执行信息，以确定所述处理器中的任何一个是否输出了不同的指令执行信息。

8. 发明授权

US08243467B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08243467B2
公开(公告)日：2012-08-14
申请号：US12526992
申请日：2008-02-05
申请人： Yoshihiro Nakagawa , Masayuki Mizuno
发明人： Yoshihiro Nakagawa , Masayuki Mizuno
IPC分类号： H05K7/00
CPC分类号： H01L25/18 , H01L24/73 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06527 , H01L2225/06555 , H01L2924/00014 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A main chip has a signal processing circuit for executing signal processing; a plurality of signal transmitting circuits for transmitting signals between the signal processing circuit and a signal transmitting circuit; and a control circuit for controlling operation/non-operation of the signal transmitting circuits in accordance with signal processing content of the signal processing circuit. Functional chips each have a signal processing circuit for executing auxiliary signal processing different from that of the signal processing circuit; and one or a plurality of signal transmitting circuits for transmitting signals between the signal processing circuit and the signal transmitting circuits. The main chip and the functional chips are stacked. The signal transmitting circuits and the signal transmitting circuit are non-contact-type signal transmitting circuits utilizing inductive coupling and are arranged so as to overlap when viewed from the stacking direction.
摘要翻译：主芯片具有用于执行信号处理的信号处理电路; 多个信号发送电路，用于在信号处理电路和信号发送电路之间传输信号; 以及控制电路，用于根据信号处理电路的信号处理内容来控制信号发送电路的操作/不操作。功能芯片各自具有用于执行与信号处理电路不同的辅助信号处理的信号处理电路; 以及用于在信号处理电路和信号发送电路之间传送信号的一个或多个信号发送电路。主芯片和功能芯片堆叠。信号发送电路和信号发送电路是利用电感耦合的非接触型信号发送电路，并且从层叠方向观察时重叠。

9. 发明申请

US20120161885A1 AGING DIAGNOSTIC DEVICE, AGING DIAGNOSTIC METHOD 失效
标题翻译：老化诊断装置，老化诊断方法
公开(公告)号：US20120161885A1
公开(公告)日：2012-06-28
申请号：US13394542
申请日：2010-09-01
申请人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
发明人： Eisuke Saneyoshi , Koichi Nose , Masayuki Mizuno
IPC分类号： H03L7/24
CPC分类号： G01R31/2856 , G01R31/2882 , G01R31/2884 , H03K5/133
摘要： There is provided an aging diagnostic device including: a reference ring oscillator (101) that constitutes a ring oscillator using an odd-numbered plurality of logic gates constituted using a CMOS circuit; a test ring oscillator (102) that constitutes a ring oscillator using an odd-numbered plurality of logic gates having the same configuration as that of the logic gate; a load unit (104) that inputs a load signal to the test ring oscillator (102); a control unit (105) that simultaneously inputs a control signal instructing a start of oscillation of the reference ring oscillator (101) and the test ring oscillator (102) to the reference ring oscillator (101) and the test ring oscillator (102); and a comparison unit (103) that compares differences in the amount of movement of pulses within the reference ring oscillator (101) and the test ring oscillator (102), respectively, in the same time.
摘要翻译：提供了一种老化诊断装置，包括：构成使用CMOS电路构成的奇数多个逻辑门的环形振荡器的参考环形振荡器（101）使用具有与逻辑门相同配置的奇数多个逻辑门构成环形振荡器的测试环振荡器（102）; 负载单元（104），其向所述测试环形振荡器（102）输入负载信号; 控制单元（105），其同时将参考环形振荡器（101）和测试环形振荡器（102）的振荡开始的控制信号输入到参考环形振荡器（101）和测试环形振荡器（102）; 以及比较单元（103），其分别同时比较参考环形振荡器（101）和测试环形振荡器（102）中的脉冲的移动量的差异。

10. 发明申请

US20110006443A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20110006443A1
公开(公告)日：2011-01-13
申请号：US12920452
申请日：2009-02-19
申请人： Koichiro Noguchi , Yoshio Kameda , Yoshihiro Nakagawa , Masayuki Mizuno
发明人： Koichiro Noguchi , Yoshio Kameda , Yoshihiro Nakagawa , Masayuki Mizuno
IPC分类号： H01L23/48
CPC分类号： H01L23/645 , H01L23/5227 , H01L23/585 , H01L25/0655 , H01L25/0657 , H01L27/08 , H01L2224/16145 , H01L2225/06527 , H01L2225/06596
摘要： Disclosed is a semiconductor device composed of a plurality of semiconductor integrated circuits and a plurality of coils. During the production process of the semiconductor device, the plurality of coils are so arranged that the coil surfaces are generally perpendicular to the front surface of a chip of the semiconductor integrated circuits wherein metal films are laminated. A signal is transmitted between a pair of adjacent coils among the plurality of coils.
摘要翻译：公开了由多个半导体集成电路和多个线圈组成的半导体器件。在半导体器件的生产过程中，多个线圈被布置成使得线圈表面大致垂直于半导体集成电路的芯片的前表面，其中金属膜被层压。信号在多个线圈中的一对相邻线圈之间传输。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式