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1. 发明授权

US07773140B2 Stereo image-pickup apparatus 有权
标题翻译：立体声图像拾取装置
公开(公告)号：US07773140B2
公开(公告)日：2010-08-10
申请号：US11543354
申请日：2006-10-04
申请人： Norihiko Nakano , Shinichiro Hirooka
发明人： Norihiko Nakano , Shinichiro Hirooka
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/32 , H04N13/239 , H04N13/296
摘要： A stereo image pickup apparatus having a plurality of image pickup units, an input selection unit for executing a selection processing of an input signal, a sensor driving signal generation unit for driving the image pickup units, and a camera signal processing unit for executing camera signal processing of output data of the image pickup units. The plural image pickup units simultaneously execute exposure and the sensor driving signal generation unit executes mask control of the driving signal and makes different the output timing of the image pickup data from the image pickup unit. The camera signal processing of the image data outputted from the image pickup units can be carried out by a smaller number of camera signal processing units than the image pickup units.
摘要翻译：具有多个图像拾取单元的立体图像拾取装置，用于执行输入信号的选择处理的输入选择单元，用于驱动图像拾取单元的传感器驱动信号生成单元，以及用于执行相机信号的相机信号处理单元处理图像拾取单元的输出数据。多个图像拾取单元同时执行曝光，并且传感器驱动信号生成单元执行驱动信号的掩模控制，并使来自图像拾取单元的图像拾取数据的输出定时不同。从图像拾取单元输出的图像数据的相机信号处理可以通过比图像拾取单元更少数量的相机信号处理单元来执行。

2. 发明授权

US07674052B2 Object detection apparatus 失效
标题翻译：物体检测装置
公开(公告)号：US07674052B2
公开(公告)日：2010-03-09
申请号：US11686433
申请日：2007-03-15
申请人： Shinichiro Hirooka , Norihiko Nakano
发明人： Shinichiro Hirooka , Norihiko Nakano
IPC分类号： G03B17/00
CPC分类号： G08B13/19652 , G06T7/55 , G06T7/593 , G06T2207/10016 , G06T2207/10021 , G06T2207/30232 , G08B13/19606
摘要： An improved object detection apparatus using an interface with which user can set an object detection area intuitively with simple operation. Apparatus includes imaging module imaging and outputting an imaged picture, three-dimensional position detection module detecting a three-dimensional position and outputting detected position information, input module allowing user to input data for setting a detection area and processing module conversion-processing and outputting the picture. Using detection area setting data inputted by user, detection area in the three-dimensional space is decided and whether the three-dimensional position detected by the position detection module exists inside or outside the detection area is judged. Picture outputted by the imaging module is subjected to conversion processing based on judgment result and detection area is clearly indicated in the picture.
摘要翻译：一种改进的对象检测装置，其使用用户可以通过简单的操作直观地设置对象检测区域的界面。装置包括成像模块成像和输出成像图像，三维位置检测模块检测三维位置并输出检测到的位置信息，输入模块允许用户输入用于设置检测区域的数据和处理模块转换处理并输出图片。使用由用户输入的检测区域设定数据，判断三维空间的检测区域，判断由位置检测单元检测出的三维位置是否存在于检测区域内部或外部。由成像模块输出的图像根据判断结果进行转换处理，图像中清楚地表示检测区域。

3. 发明申请

US20070076112A1 Stereo image-pickup apparatus 有权
标题翻译：立体声图像拾取装置
公开(公告)号：US20070076112A1
公开(公告)日：2007-04-05
申请号：US11543354
申请日：2006-10-04
申请人： Norihiko Nakano , Shinichiro Hirooka
发明人： Norihiko Nakano , Shinichiro Hirooka
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/32 , H04N13/239 , H04N13/296
摘要： A stereo image pickup apparatus having a plurality of image pickup units, an input selection unit for executing a selection processing of an input signal, a sensor driving signal generation unit for driving the image pickup units, and a camera signal processing unit for executing camera signal processing of output data of the image pickup units. The plural image pickup units simultaneously execute exposure and the sensor driving signal generation unit executes mask control of the driving signal and makes different the output timing of the image pickup data from the image pickup unit. The camera signal processing of the image data outputted from the image pickup units can be carried out by a smaller number of camera signal processing units than the image pickup units.
摘要翻译：具有多个图像拾取单元的立体图像拾取装置，用于执行输入信号的选择处理的输入选择单元，用于驱动图像拾取单元的传感器驱动信号生成单元，以及用于执行相机信号的相机信号处理单元处理图像拾取单元的输出数据。多个图像拾取单元同时执行曝光，并且传感器驱动信号生成单元执行驱动信号的掩模控制，并使来自图像拾取单元的图像拾取数据的输出定时不同。从图像拾取单元输出的图像数据的相机信号处理可以通过比图像拾取单元更少数量的相机信号处理单元来执行。

4. 发明申请

US20070217780A1 OBJECT DETECTION APPARATUS 失效
标题翻译：对象检测装置
公开(公告)号：US20070217780A1
公开(公告)日：2007-09-20
申请号：US11686433
申请日：2007-03-15
申请人： Shinichiro Hirooka , Norihiko Nakano
发明人： Shinichiro Hirooka , Norihiko Nakano
IPC分类号： G03B17/18
CPC分类号： G08B13/19652 , G06T7/55 , G06T7/593 , G06T2207/10016 , G06T2207/10021 , G06T2207/30232 , G08B13/19606
摘要： An improved object detection apparatus using an interface with which user can set an object detection area intuitively with simple operation. Apparatus includes imaging module imaging and outputting an imaged picture, three-dimensional position detection module detecting a three-dimensional position and outputting detected position information, input module allowing user to input data for setting a detection area and processing module conversion-processing and outputting the picture. Using detection area setting data inputted by user, detection area in the three-dimensional space is decided and whether the three-dimensional position detected by the position detection module exists inside or outside the detection area is judged. Picture outputted by the imaging module is subjected to conversion processing based on judgment result and detection area is clearly indicated in the picture.
摘要翻译：一种改进的对象检测装置，其使用用户可以通过简单的操作直观地设置对象检测区域的界面。装置包括成像模块成像和输出成像图像，三维位置检测模块检测三维位置并输出检测到的位置信息，输入模块允许用户输入用于设置检测区域的数据和处理模块转换处理并输出图片。使用由用户输入的检测区域设定数据，判断三维空间的检测区域，判断由位置检测单元检测出的三维位置是否存在于检测区域内部或外部。由成像模块输出的图像根据判断结果进行转换处理，图像中清楚地表示检测区域。

5. 发明申请

US20110229235A1 IMAGE FORMING APPARATUS HAVING STEPPING MOTOR ARRANGED IN CONVEYING PATH FOR PAPER, AND METHOD FOR CONTROLLING STEPPING MOTOR IN IMAGE FORMING APPARATUS 有权
标题翻译：具有用于纸张输送路径的步进电机的图像形成装置以及用于在图像形成装置中控制步进电机的方法
公开(公告)号：US20110229235A1
公开(公告)日：2011-09-22
申请号：US13044315
申请日：2011-03-09
申请人： Yuta Tachibana , Tomonobu Tamura , Hiroyuki Watanabe , Norihiko Nakano
发明人： Yuta Tachibana , Tomonobu Tamura , Hiroyuki Watanabe , Norihiko Nakano
IPC分类号： G03G15/00
CPC分类号： H02P8/14 , G03G15/5004 , G03G15/6529 , G03G2215/00371 , G03G2215/00599 , H02P8/10 , H02P8/12
摘要： An image forming apparatus includes: a stepping motor arranged in a conveying path for a paper; a driver for driving the stepping motor; a current detecting unit for detecting an actual current value; and a control unit for providing a set current value for every predetermined cycle. The control unit determines an estimated load torque value corresponding to the set current value in a previous cycle and the actual current value in a present cycle, by referring to a relationship between actual current and load torque of the stepping motor with respect to the set current value, determines a target load torque value based on the estimated load torque value, and determines, as the set current value, a current value corresponding to the target load torque value, by referring to a relationship between maximum output torque of the stepping motor and current supplied to the stepping motor.
摘要翻译：一种图像形成装置包括：布置在用于纸张的传送路径中的步进电机; 用于驱动步进电机的驱动器; 电流检测单元，用于检测实际电流值; 以及用于为每个预定周期提供设定电流值的控制单元。控制单元通过参照步进电动机的实际电流与负载转矩之间的关系相对于设定电流来确定与先前循环中的设定电流值和当前周期中的实际电流值相对应的估计负载转矩值根据所估计的负载转矩值确定目标负载转矩值，并且通过参照步进电动机的最大输出转矩与步进电动机的最大输出转矩之间的关系，确定与目标负载转矩值对应的电流值作为设定电流值提供给步进电机的电流。

6. 发明授权

US6094220A Image pickup apparatus with image extracting unit 失效
标题翻译：具有图像提取单元的图像拾取装置
公开(公告)号：US6094220A
公开(公告)日：2000-07-25
申请号：US797084
申请日：1997-02-10
申请人： Norihiko Nakano , Ryuji Nishimura , Yasushi Takagi
发明人： Norihiko Nakano , Ryuji Nishimura , Yasushi Takagi
IPC分类号： H04N9/04 , H04N9/73 , H04N9/74
CPC分类号： H04N9/735 , H04N9/045
摘要： An image pickup apparatus including an image extracting unit and performing an image extraction process and automatic feedback control of white balance for executing image extraction with high accuracy by performing the image extraction process and automatic white balance control with reference to each other.
摘要翻译：一种图像拾取装置，包括图像提取单元，并且通过执行图像提取处理和自动白平衡控制来执行图像提取处理和用于执行高精度的图像提取的白平衡的自动反馈控制。

7. 发明授权

US08639366B2 Control apparatus and image forming apparatus 有权
标题翻译：控制装置和图像形成装置
公开(公告)号：US08639366B2
公开(公告)日：2014-01-28
申请号：US13049666
申请日：2011-03-16
申请人： Yuta Tachibana , Norihiko Nakano , Hiroyuki Watanabe , Tomonobu Tamura
发明人： Yuta Tachibana , Norihiko Nakano , Hiroyuki Watanabe , Tomonobu Tamura
IPC分类号： G05B11/01 , F02M37/04 , G08C19/12
CPC分类号： G03G15/5008
摘要： A control device for generating a second trigger with a delay of a predetermined time from generation of a first trigger, the control device having: a counter for counting numbers from 0 to n−1 at a frequency with cycles of a first period; a control section, which operates at a frequency with cycles of a second period that is longer than the first period, for calculating a remainder of a division by adding a number of counts of the counter corresponding to the predetermined time to a count value of the counter at the time of generation of the first trigger and by dividing a result of the addition by n; and an output section for outputting the second trigger at a time when the count value of the counter becomes equal to the remainder.
摘要翻译：一种用于从产生第一触发产生具有预定时间的延迟的第二触发的控制装置，所述控制装置具有：用于以第一周期的周期以0至n-1的频率计数的计数器; 控制部分，以比第一周期长的第二周期的周期工作，用于通过将对应于预定时间的计数器的计数数相加到计数值的计数值来计算除法余数计数器在产生第一触发时并将加法结果除以n; 以及输出部，用于在计数器的计数值等于余数时输出第二触发。

8. 发明授权

US08320222B2 Semiconductor integrated circuit and disk recording and reproducing drive using the same 失效
标题翻译：半导体集成电路和磁盘记录和再现驱动器使用相同
公开(公告)号：US08320222B2
公开(公告)日：2012-11-27
申请号：US13035843
申请日：2011-02-25
申请人： Norihiko Nakano , Hajime Ishihara , Akio Fukushima
发明人： Norihiko Nakano , Hajime Ishihara , Akio Fukushima
IPC分类号： G11B7/00
CPC分类号： G11B19/048
摘要： The present invention enables a comprehensive evaluation from both of data read from a disk and a servo signal of a servo controller. The present invention provides a semiconductor integrated circuit mountable to a disk recording and reproducing drive, which comprises a signal processor of an RF signal read from a pickup, a servo controller responsive to a servo error signal read from the pickup, a memory controller, and an external interface. The memory controller is supplied with read data and a servo signal and stores the read data and the servo signal in a buffer memory according to a time division process. The read data and the servo signal stored in the buffer memory can be transferred to an external device via the external interface by the memory controller.
摘要翻译：本发明能够从从盘读取的数据和伺服控制器的伺服信号两者进行综合评估。本发明提供一种可安装到盘记录和再现驱动器的半导体集成电路，其包括从拾取器读取的RF信号的信号处理器，响应于从拾取器读取的伺服误差信号的伺服控制器，存储器控制器和一个外部接口。存储器控制器被提供有读取数据和伺服信号，并且根据时分处理将读取的数据和伺服信号存储在缓冲存储器中。存储在缓冲存储器中的读取数据和伺服信号可以由存储器控制器通过外部接口传送到外部设备。

9. 发明申请

US20110230977A1 CONTROL APPARATUS AND IMAGE FORMING APPARATUS 有权
标题翻译：控制装置和图像形成装置
公开(公告)号：US20110230977A1
公开(公告)日：2011-09-22
申请号：US13049666
申请日：2011-03-16
申请人： Yuta TACHIBANA , Norihiko Nakano , Hiroyuki Watanabe , Tomonobu Tamura
发明人： Yuta TACHIBANA , Norihiko Nakano , Hiroyuki Watanabe , Tomonobu Tamura
IPC分类号： G05B15/00 , G03G15/00
CPC分类号： G03G15/5008
摘要： A control device for generating a second trigger with a delay of a predetermined time from generation of a first trigger, said control device having; a counter for counting numbers from 0 to n−1 at a frequency with cycles of a first period; a control section, which operates at a frequency with cycles of a second period that is longer than the first period, for calculating a remainder of a division by adding a number of counts of the counter corresponding to the predetermined time to a count value of the counter at the time of generation of the first trigger and by dividing a result of the addition by n; and an output section for outputting the second trigger at a time when the count value of the counter becomes equal to the remainder.
摘要翻译：一种控制装置，用于从产生第一触发产生具有预定时间的延迟的第二触发器，所述控制装置具有：用于以第一周期的周期的频率对从0到n-1进行计数的计数器; 控制部分，以比第一周期长的第二周期的周期工作，用于通过将对应于预定时间的计数器的计数数相加到计数值的计数值来计算除法余数计数器在产生第一触发时并将加法结果除以n; 以及输出部，用于在计数器的计数值等于余数时输出第二触发。

10. 发明申请

US20080122514A1 VARIABLE FREQUENCY CLOCK OUTPUT CIRCUIT AND APPARATUS, MOTOR DRIVING APPARATUS, AND IMAGE FORMING APPARATUS 有权
标题翻译：可变频率时钟输出电路和装置，电机驱动装置和图像形成装置
公开(公告)号：US20080122514A1
公开(公告)日：2008-05-29
申请号：US11853649
申请日：2007-09-11
申请人： Yuta Tachibana , Katsunori Takahashi , Toru Kasamatsu , Tomonobu Tamura , Norihiko Nakano
发明人： Yuta Tachibana , Katsunori Takahashi , Toru Kasamatsu , Tomonobu Tamura , Norihiko Nakano
IPC分类号： H03K3/00
CPC分类号： G06F1/08 , G05B2219/25399 , H02P8/00
摘要： A variable frequency clock output circuit, comprising: a target value register which stores a target value corresponding to an arbitrarily set target frequency; an increase/decrease value register which stores an arbitrarily set increase/decrease value; an adder-subtractor which has an input portion into which a current output value is inputted and outputs a calculation result obtained by adding/subtracting the increase/decrease value stored in the increase/decrease value register to/from the current output value inputted into the input portion based on an addition/subtraction instruction signal; a comparator which compares an output value of the adder-subtractor to the target value stored in the target value register, and outputs an addition/subtraction instruction signal to the adder-subtractor until the output value of the adder-subtractor and the target value coincide; and a clock generator which outputs a clock signal having a frequency proportional to the output value of the adder-subtractor.
摘要翻译：一种可变频率时钟输出电路，包括：目标值寄存器，存储与任意设定的目标频率对应的目标值; 存储任意设定的增减值的增减值寄存器; 一个加法器 - 减法器，其具有输入电流输出值的输入部分，并输出通过将存储在增减值寄存器中的增减值加上/减去输入到当前输出值的当前输出值而得到的计算结果输入部分，基于加减指令信号; 比较器，将加减法器的输出值与存储在目标值寄存器中的目标值进行比较，并将加法/减法指令信号输出到加减法器，直到加法器 - 减法器的输出值与目标值一致 ; 以及时钟发生器，其输出具有与加法器 - 减法器的输出值成比例的频率的时钟信号。

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