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    • 4. 发明授权
    • Liquid crystal display panel
    • 液晶显示面板
    • US08610863B2
    • 2013-12-17
    • US12019440
    • 2008-01-24
    • Ji-Hyun KwonHyeok-Jin LeeByoung-Sun NaLujian GangDong-Hyeon KiHwa-Sung Woo
    • Ji-Hyun KwonHyeok-Jin LeeByoung-Sun NaLujian GangDong-Hyeon KiHwa-Sung Woo
    • G02F1/1343
    • G02F1/136286G02F1/134309G02F2001/134318G02F2001/136218G02F2201/121G02F2201/122
    • An LCD panel is provided for improving a contrast ratio by suppressing light leakage around gate lines of an assembly that is structured to support a liquid crystal alignment mode that enhanced side view visibility of the LCD image. The LCD panel includes a first base substrate, a plurality of gate lines and a plurality of data lines disposed on the first base substrate and crossing each other, a pixel electrode comprising a first oblique line and a second oblique line disposed on the first base substrate and inclined in a different direction from each other with respect to the gate lines, a second base substrate, a common electrode disposed on the second base substrate and alternately positioned with the pixel electrode, wherein a portion of the common electrode overlaps the gate line segment, and a liquid crystal layer disposed between the first and second base substrates.
    • 提供一种LCD面板,用于通过抑制组件的栅极线周围的光泄漏来提高对比度,该组件被构造成支持提高LCD图像的侧视可见度的液晶对准模式。 LCD面板包括第一基底基板,多条栅极线和设置在第一基底基板上并彼此交叉的多条数据线,包括设置在第一基底基板上的第一斜线和第二斜线的像素电极 并且相对于栅极线彼此不同的方向倾斜,第二基底基板,设置在第二基底基板上并与像素电极交替定位的公共电极,其中,公共电极的一部分与栅极线段重叠 以及设置在第一和第二基底之间的液晶层。
    • 5. 发明授权
    • Gate driving circuit, display apparatus having the same, and method thereof
    • 栅极驱动电路,具有该栅极驱动电路的显示装置及其方法
    • US08228282B2
    • 2012-07-24
    • US11928466
    • 2007-10-30
    • Byoung-Sun NaDong-Hyeon KiMin-Cheol LeeSoon-Il Ahn
    • Byoung-Sun NaDong-Hyeon KiMin-Cheol LeeSoon-Il Ahn
    • G09G3/36
    • G11C19/28G09G3/3677G09G2320/0219G09G2320/041
    • In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.
    • 在具有栅极驱动电路的栅极驱动电路和显示装置中,将多个相互依次连接并依次输出栅极信号的多级中的当前级的上拉晶体管拉起当前的栅极信号 通过输出端子输出到栅极导通电压。 缓冲晶体管连接到上拉晶体管的控制端,以接收来自前一级的先前输出信号并接通上拉晶体管。 缓冲晶体管具有的电荷率约为上拉晶体管的充电能力的两倍或更大。 因此,可以减小上拉晶体管的尺寸,从而当栅极驱动电路在高温或低温条件下工作时,防止栅极驱动电路的故障。
    • 8. 发明申请
    • Thin film transistor array substrate for a liquid crystal display and the method for fabricating the same
    • 液晶显示器用薄膜晶体管阵列基板及其制造方法
    • US20050208711A1
    • 2005-09-22
    • US11126305
    • 2005-05-11
    • Woon-Yong ParkHyeon-Hwan KimDong-Hyeon Ki
    • Woon-Yong ParkHyeon-Hwan KimDong-Hyeon Ki
    • G02F1/1343G02F1/1362G02F1/1368G09F9/00H01L21/336H01L21/84H01L27/12H01L29/786
    • H01L29/66765G02F1/134363G02F1/13458G02F1/1368G02F2001/136231H01L27/12H01L29/78669
    • A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside. At this time, the etching is performed after an assembly process where a second substrate is arranged to face the first substrate and assembled together and the passivation layer and the gate insulating layer are exposed outside of the second substrate.
    • 制造液晶显示器用薄膜阵列基板的方法包括在第一基板上形成栅线组合体和公共电极线组合体的工序。 栅极线组件包括多个栅极线和栅极焊盘,并且公共电极线组件包括公共信号线和公共电极。 此后,在第一基板上形成栅极绝缘层,并且在栅极绝缘层上形成半导体图案和欧姆接触图案。 然后在第一基板上形成数据线组件和像素电极。 数据线组件包括多条数据线,数据焊盘以及源极和漏极。 像素电极在平行于公共电极的同时连接到漏电极。 在衬底上形成钝化层。 蚀刻钝化层和栅极绝缘层,使得栅极焊盘和数据焊盘暴露于外部。 此时,在将第二基板布置成面对第一基板并组装在一起并且钝化层和栅极绝缘层暴露在第二基板外部的组装工艺之后进行蚀刻。
    • 9. 发明授权
    • Method for manufacturing a liquid crystal display with a novel structure of thin film transistor substrate
    • 具有薄膜晶体管基板的新颖结构的液晶显示器的制造方法
    • US06876405B1
    • 2005-04-05
    • US10626767
    • 2003-07-25
    • Woon-Yong ParkHyeon-Hwan KimDong-Hyeon Ki
    • Woon-Yong ParkHyeon-Hwan KimDong-Hyeon Ki
    • G02F1/1343G02F1/1362G02F1/1368H01L21/336H01L29/786G02F1/136
    • H01L29/66765G02F1/134363G02F1/13458G02F1/1368G02F2001/136231H01L29/78669
    • A method for fabricating a thin film array substrate for a liquid crystal display includes steps of forming a gate line assembly and a common electrode line assembly on a first substrate. The gate line assembly includes a plurality of gate lines and gate pads, and the common electrode line assembly includes common signal lines and common electrodes. Thereafter, a gate insulating layer is formed on the first substrate, and a semiconductor pattern and an ohmic contact pattern are formed on the gate insulating layer. A data line assembly and pixel electrodes are then formed on the first substrate. The data line assembly includes a plurality of data lines, data pads, and source and drain electrodes. The pixel electrodes are connected to the drain electrodes while proceeding parallel to the common electrodes. A passivation layer is formed on the substrate. The passivation layer and the gate insulating layer are etched such that the gate pads and the data pads are exposed to the outside. At this time, the etching is performed after an assembly process where a second substrate is arranged to face the first substrate and assembled together and the passivation layer and the gate insulating layer are exposed outside of the second substrate.
    • 制造液晶显示器用薄膜阵列基板的方法包括在第一基板上形成栅线组合体和公共电极线组合体的工序。 栅极线组件包括多个栅极线和栅极焊盘,并且公共电极线组件包括公共信号线和公共电极。 此后,在第一基板上形成栅极绝缘层,并且在栅极绝缘层上形成半导体图案和欧姆接触图案。 然后在第一基板上形成数据线组件和像素电极。 数据线组件包括多条数据线,数据焊盘以及源极和漏极。 像素电极在平行于公共电极的同时连接到漏电极。 在衬底上形成钝化层。 蚀刻钝化层和栅极绝缘层,使得栅极焊盘和数据焊盘暴露于外部。 此时,在将第二基板布置成面对第一基板并组装在一起并且钝化层和栅极绝缘层暴露在第二基板外部的组装工艺之后进行蚀刻。