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1. 发明申请

US20120154504A1 THERMAL PRINTER HEAD AND MANUFACTURING METHOD THEREOF 有权
标题翻译：热打印头及其制造方法
公开(公告)号：US20120154504A1
公开(公告)日：2012-06-21
申请号：US13327368
申请日：2011-12-15
申请人： Shigeyoshi ONO , Yasuhiro YOSHIKAWA
发明人： Shigeyoshi ONO , Yasuhiro YOSHIKAWA
IPC分类号： B41J2/335 , H01R43/16
CPC分类号： B41J2/335 , B41J2/3351 , B41J2/33515 , B41J2/3354 , B41J2/3355 , B41J2/3357 , B41J2/3359
摘要： A thermal printer head that is highly efficient to manufacture is provided, which includes: a first substrate (11), including a first main surface (110), a first inclined surface (111) that is inclined relative to the first main surface (110), and a second inclined surface (112) that is inclined relative to the first main surface (110); an electrode layer (3), laminated on the first main surface (110), the first inclined surface (111), and the second inclined surface (112); a resistor layer (4), having a plurality of heat dissipation portions (41) respectively laminated on the first inclined surface (111) and crossing separated parts in the electrode layer (3); a driving integrated circuit (IC), for controlling the current passing through each heat dissipation portion (41); and a plurality of wires (81), respectively joined to the driving IC and joined to the second inclined surface (112) through the electrode layer (3).
摘要翻译：提供了一种高效制造的热敏打印机头，其包括：第一基板（11），包括第一主表面（110），相对于第一主表面（110）倾斜的第一倾斜表面（111））和相对于第一主表面（110）倾斜的第二倾斜表面（112）; 叠层在第一主表面（110）上的电极层（3），第一倾斜表面（111）和第二倾斜表面（112）; 电阻层（4），具有分别层叠在所述第一倾斜面（111）上并与所述电极层（3）中的分离部分交叉的多个散热部（41）。用于控制通过每个散热部分（41）的电流的驱动集成电路（IC）; 以及分别与驱动IC接合并通过电极层（3）与第二倾斜面（112）接合的多根电线（81）。

2. 发明申请

US20130057110A1 POWER GENERATION DEVICE 有权
标题翻译：发电装置
公开(公告)号：US20130057110A1
公开(公告)日：2013-03-07
申请号：US13599091
申请日：2012-08-30
申请人： Seiji AOYAGI , Tomokazu TAKAHASHI , Masato SUZUKI , Yasuhiro YOSHIKAWA
发明人： Seiji AOYAGI , Tomokazu TAKAHASHI , Masato SUZUKI , Yasuhiro YOSHIKAWA
IPC分类号： H02N1/08
CPC分类号： H02N1/08 , H01G7/02
摘要： Provided is a power generation device having a dielectric body and an electret, where power is generated by varying the distance between the dielectric body and the electret. A first electrode is connected to the electret on a side not facing the dielectric body. The first electrode is connected to a grounding terminal via a load. A second electrode may be connected to the dielectric body on a side not facing the electret. The second electrode may be directly connected to the grounding terminal.
摘要翻译：提供了具有介电体和驻极体的发电装置，其中通过改变介电体和驻极体之间的距离来产生电力。第一电极在不面向电介质体的一侧连接到驻极体。第一电极通过负载连接到接地端子。第二电极可以在不面向驻极体的一侧连接到电介质体。第二电极可以直接连接到接地端子。

3. 发明申请

US20070120245A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20070120245A1
公开(公告)日：2007-05-31
申请号：US11563312
申请日：2006-11-27
申请人： Yasuhiro YOSHIKAWA , Motoo Suwa , Hiroshi Toyoshima
发明人： Yasuhiro YOSHIKAWA , Motoo Suwa , Hiroshi Toyoshima
IPC分类号： H01L23/52
CPC分类号： H01L23/528 , H01L23/49838 , H01L23/50 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01079 , H01L2924/15311 , H01L2924/3011 , H01L2924/3025 , H01L2224/05599
摘要： Mutual inductance from an external output signal system to an external input signal system, in which parallel input/output operation is enabled, is reduced. A semiconductor integrated circuit has a plurality of external connection terminals facing a package substrate, and has an external input terminal and an external output terminal, in which parallel input/output operation is enabled, as part of the external connection terminals. The package substrate has a plurality of wiring layers for electrically connecting between the external connection terminals and module terminals corresponding to each other. A first wiring layer facing the semiconductor integrated circuit has a major wiring for connecting between the external input terminal and a module terminal corresponding to each other, and a second wiring layer in which the module terminals are formed has a major wiring for connecting between an external output terminal and a module terminal corresponding to each other. A major signal wiring of an external output system connected to the external output terminal, which may be a noise source, is made to be in a wiring layer distant from the semiconductor integrated circuit.
摘要翻译：从外部输出信号系统到能够并联输入/输出操作的外部输入信号系统的互感减小。半导体集成电路具有面向封装基板的多个外部连接端子，具有能够并行输入/输出操作的外部输入端子和外部输出端子作为外部连接端子的一部分。封装基板具有用于将外部连接端子和彼此对应的模块端子之间电连接的多个布线层。面向半导体集成电路的第一布线层具有用于连接外部输入端子和彼此对应的模块端子之间的主要布线，并且其中形成模块端子的第二布线层具有用于连接外部输出端子和对应的模块端子。连接到可能是噪声源的外部输出端子的外部输出系统的主要信号布线被制成在远离半导体集成电路的布线层中。

4. 发明申请

US20120206954A1 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 有权
标题翻译：半导体器件和电子器件
公开(公告)号：US20120206954A1
公开(公告)日：2012-08-16
申请号：US13372425
申请日：2012-02-13
申请人： Yasuhiro YOSHIKAWA , Motoo Suwa , Kazuhiko Hiranuma
发明人： Yasuhiro YOSHIKAWA , Motoo Suwa , Kazuhiko Hiranuma
IPC分类号： G11C5/06
CPC分类号： G11C5/063 , H01L2224/32225 , H01L2224/48465 , H01L2224/73265
摘要： There is a need to provide a semiconductor device and an electronic device capable of easily allowing a bypass capacitor to always improve noise suppression on a signal path in order to transmit a reference potential between chips in different power supply noise states. There is provided a specified signal path that connects a control chip and a memory chip mounted on a mounting substrate and transmits a reference potential generated from the control chip. A bypass capacitor is connected to the specified signal path only at a connecting part where a distance from a reference potential pad of the memory chip to the connecting part along the specified signal path is shorter than a distance from a reference potential pad of the control chip to the connecting part along the specified signal path.
摘要翻译：需要提供能够容易地允许旁路电容器总是改善信号路径上的噪声抑制的半导体器件和电子器件，以便以不同的电源噪声状态在芯片之间传输参考电位。提供了连接控制芯片和安装在安装基板上的存储芯片的指定信号路径，并传输从控制芯片产生的参考电位。旁路电容器仅在连接部分处连接到指定的信号路径，在连接部分处，沿着指定信号路径的存储芯片的参考电位焊盘到连接部分的距离短于距控制芯片的参考电位焊盘的距离沿着指定的信号路径连接到连接部分。

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