会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明授权
    • Display apparatus
    • 显示装置
    • US09099042B2
    • 2015-08-04
    • US13697775
    • 2011-04-13
    • Koichi SugiyamaTaikoh Akashi
    • Koichi SugiyamaTaikoh Akashi
    • G09G5/02G09G3/34G09G3/36
    • G09G3/3406G09G3/3611G09G2300/0456G09G2320/0626G09G2320/0666G09G2360/144G09G2360/145
    • A high luminance display apparatus is provided. When a spectral radiance of a backlight at a time point of factory shipment is less than a spectral radiance of external light, a CPU generates a correction matrix for performing color correction so that color produced by external light, i.e., color produced by reflection light of external light by a half mirror conforms to color produced by only irradiation light of the backlight, transmits the generated correction matrix to a video image signal processing section as parameter information, and causes execution of color correction based on the parameter information. The CPU generates a correction matrix based on a spectral radiance of external light detected by a second spectral radiance sensor, a spectral radiance of the backlight detected at the time point of factory shipment, and spectral transmittance of a color filter as well as a color-matching function.
    • 提供了一种高亮度显示装置。 当出厂时的时间点的背光源的光谱辐射度小于外部光的光谱时,CPU产生用于进行色彩校正的校正矩阵,使得由外部光产生的颜色,即由反射光产生的颜色 通过半反射镜的外部光符合仅由背光的照射光产生的颜色,将生成的校正矩阵作为参数信息发送到视频图像信号处理部,并且基于参数信息执行颜色校正。 CPU基于由第二光谱辐射传感器检测到的外部光的光谱辐射率,在出厂时发现的时间点检测的背光的光谱,以及滤色器的分光透射率, 匹配功能。
    • 5. 发明授权
    • Semiconductor device
    • 半导体器件
    • US08319314B2
    • 2012-11-27
    • US13005589
    • 2011-01-13
    • Tsuneo OguraMasakazu YamaguchiTomoki InoueHideaki NinomiyaKoichi Sugiyama
    • Tsuneo OguraMasakazu YamaguchiTomoki InoueHideaki NinomiyaKoichi Sugiyama
    • H01L29/739H01L27/082H01L29/00H01L21/02
    • H01L29/1095H01L29/0834H01L29/7397
    • A semiconductor device comprises a first base layer of a first conductivity type; a plurality of second base layers of a second conductivity type, provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers, and formed to be deeper than the second base layers; an emitter layer formed along the trench on a surface of the second base layers; a collector layer of the second conductivity type, provided on a second surface of the first base layer opposite to the first surface; an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated from the second base layers and the emitter layer by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being deeper than the second base layers and being electrically isolated from the emitter layer and the second base layers.
    • 半导体器件包括第一导电类型的第一基极层; 多个第二导电类型的第二基层,设置在所述第一基底层的第一表面的一部分上; 沟槽形成在第二基底层的每一侧上,并且形成为比第二基底层更深; 在所述第二基底层的表面上沿着所述沟槽形成的发射极层; 设置在与第一表面相对的第一基底层的第二表面上的第二导电类型的集电极层; 形成在所述沟槽的内壁上的绝缘膜,所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在所述沟槽内并与所述第二基极层和所述发射极层通过所述绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分,空间部分比第二基底层更深,并且与发射极层和第二基底层电隔离。
    • 9. 再颁专利
    • High-breakdown-voltage semiconductor apparatus
    • 高击穿电压半导体装置
    • USRE40712E1
    • 2009-05-19
    • US10367939
    • 2003-02-19
    • Kazuya NakayamaKoichi Sugiyama
    • Kazuya NakayamaKoichi Sugiyama
    • H01L29/76
    • H01L29/0834H01L29/32H01L29/7395
    • A high-breakdown-voltage semiconductor apparatus is provided, wherein when a gate capacitance of that portion of a gate electrode, under which a channel is formed, is Cg[F], a resistance in a channel length direction of that portion of the gate electrode, under which the channel is formed, is Rg [Ω], a threshold voltage, which is to be applied to the gate electrode and application of which permits flow of a drain current, is Vth [V], a voltage to be applied to the gate electrode to cut off the drain current is Voff [V], and a ratio of increase in the drain voltage per unit time at the time of cutting off the drain current is dV/dt [V/s], the following condition is satisfied: |Vth−Voff|≧0.5·Cg·Rg·(dV/dt)
    • 提供一种高击穿电压半导体装置,其中,当栅极电极的形成沟道的部分的栅极电容为Cg [F]时,栅极部分的沟道长度方向的电阻 形成通道的电极为RgΩ,要施加到栅电极的阈值电压,其施加允许漏极电流的流动为Vth [V],要施加的电压 到栅电极切断漏极电流为Voff [V],并且在切断漏极电流时每单位时间的漏极电压的增加比为dV / dt [V / s],以下条件 满足:<?in-line-formula description =“In-line formula”end =“lead”?> | Vth-Voff |> = 0.5.Cg.Rg。(dV / dt)<?in-line-formula description =“In-Line Formulas”end =“tail”?>
    • 10. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07456487B2
    • 2008-11-25
    • US10974810
    • 2004-10-28
    • Tsuneo OguraMasakazu YamaguchiTomoki InoueHideaki NinomiyaKoichi Sugiyama
    • Tsuneo OguraMasakazu YamaguchiTomoki InoueHideaki NinomiyaKoichi Sugiyama
    • H01L29/739
    • H01L29/1095H01L29/0834H01L29/7397
    • This disclosure concerns a semiconductor device that includes a first base layer; second base layers provided on a part of a first surface of the first base layer; trenches formed on each side of the second base layers; an emitter layer formed on a surface of the second base layers; a collector layer provided below a second surface of the first base layer, an insulating film formed on an inner wall of the trench, the insulating film being thicker on a bottom of the trench than on a side surface of the trench; a gate electrode formed within the trench, and isolated by the insulating film; and a space section provided between the second base layers adjacent to each other, the space section being electrically isolated from the emitter layer and the second base layers, wherein the space section includes a semiconductor layer being deeper than the second base layers.
    • 本公开涉及包括第一基底层的半导体器件; 设置在所述第一基底层的第一表面的一部分上的第二基底层; 形成在第二基层的每侧的沟槽; 形成在所述第二基底层的表面上的发射极层; 设置在所述第一基底层的第二表面下方的集电极层,形成在所述沟槽的内壁上的绝缘膜,所述绝缘膜在所述沟槽的底部比在所述沟槽的侧表面上更厚; 形成在沟槽内并由绝缘膜隔离的栅电极; 以及设置在彼此相邻的第二基底层之间的空间部分,所述空间部分与发射极层和第二基底层电隔离,其中所述空间部分包括比所述第二基底层更深的半导体层。