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1. 发明申请

US20060255391A1 METHOD OF FORMING A RELIABLE HIGH PERFORMANCE CAPACITOR USING AN ISOTROPIC ETCHING PROCESS 审中-公开
标题翻译：使用等压蚀刻工艺形成可靠的高性能电容器的方法
公开(公告)号：US20060255391A1
公开(公告)日：2006-11-16
申请号：US11459595
申请日：2006-07-24
申请人： Seung-Beom KIM , Won-Mo PARK , Yun-Jae LEE , Joon-Mo KWON , Myoung-Hee HAN , Man-Jong YU
发明人： Seung-Beom KIM , Won-Mo PARK , Yun-Jae LEE , Joon-Mo KWON , Myoung-Hee HAN , Man-Jong YU
IPC分类号： H01L29/00 , H01L27/108
CPC分类号： H01L28/91 , H01L27/10817 , H01L27/10852
摘要： Disclosed herein is a method of forming a reliable high performance capacitor using an isotropic etching process to optimize the surface area of the lower electrodes while preventing an electrical bridge from forming between the lower electrodes. This method includes multiple sacrificial oxide layers that are formed over a substrate, an insulating layer with contact plugs, and an etch stopping layer. The sacrificial oxide layers are patterned and additionally isotropically etched to form an expanded capacitor hole. An exposed portion of the etch stopping layer is then etched to form a final capacitor hole exposing an upper portion of the contact plug and a portion of the insulating layer adjacent thereto. The semiconductor substrate having the final capacitor hole is cleaned to remove a native oxide film on the exposed upper portion of the contact plug.
摘要翻译：本文公开了一种使用各向同性蚀刻工艺形成可靠的高性能电容器的方法，以优化下电极的表面积同时防止在下电极之间形成电桥。该方法包括在衬底上形成的多个牺牲氧化物层，具有接触插塞的绝缘层和蚀刻停止层。将牺牲氧化物层图案化并另外进行各向同性蚀刻以形成扩大的电容器孔。然后蚀刻停止层的暴露部分以形成露出接触插塞的上部和与其相邻的绝缘层的一部分的最终电容器孔。清洁具有最终电容器孔的半导体衬底以去除接触插塞的暴露的上部上的自然氧化膜。

2. 发明申请

US20100244191A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100244191A1
公开(公告)日：2010-09-30
申请号：US12728569
申请日：2010-03-22
申请人： Man-Jong YU
发明人： Man-Jong YU
IPC分类号： H01L27/08 , H01L29/40
CPC分类号： H01L28/91 , H01L21/76885 , H01L21/76895 , H01L27/10817 , H01L27/10855
摘要： A semiconductor device includes an insulation interlayer and an etch stop layer sequentially stacked on a substrate wherein a lower structure including a first contact pad is formed. A second contact pad penetrates the insulation interlayer and the etch stop layer and is connected to the first contact pad. The second contact pad protrudes from the etch stop layer. A pad spacer is provided between the second contact pad and the insulation interlayer. A lower electrode is provided on the etch stop layer and is connected to the second contact pad. A dielectric layer and an upper electrode are sequentially provided on the lower electrode.
摘要翻译：半导体器件包括依次层叠在基板上的绝缘夹层和蚀刻停止层，其中形成包括第一接触焊盘的下部结构。第二接触垫穿透绝缘中间层和蚀刻停止层，并连接到第一接触焊盘。第二接触垫从蚀刻停止层突出。衬垫间隔件设置在第二接触垫和绝缘中间层之间。下电极设置在蚀刻停止层上并连接到第二接触焊盘。电介质层和上电极依次设置在下电极上。

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