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    • 2. 发明授权
    • Semiconductor integrated circuit device
    • 半导体集成电路器件
    • US5300798A
    • 1994-04-05
    • US978293
    • 1992-11-17
    • Kouichi YamazakiSetsuo OguraKazuyuki KamegakiKenya YamauchiYukinori KitamuraTuyoshi Nagase
    • Kouichi YamazakiSetsuo OguraKazuyuki KamegakiKenya YamauchiYukinori KitamuraTuyoshi Nagase
    • H01L21/3205H01L21/768H01L21/82H01L23/52H01L23/528H01L27/02
    • H01L23/5286H01L27/0207H01L2924/0002H01L2924/3011
    • When a semiconductor integrated circuit device having a wiring structure of three or more layers is hierarchically considered as a collection of a plurality of functional blocks, each functional block is internally connected by wirings in the first wiring layer, in which wirings have their main extended direction prescribed to be the X-direction, and wirings in the second wiring layer, in which wirings have their main extended direction prescribed to be the Y-direction, formed over the first wiring layer. Wirings in the third wiring layer, in which wirings have their main extended direction prescribed to be the same as the wirings in the second wiring layer, formed over the second wiring layer, together with wirings in the first and second wiring layer, are used as signal wirings between functional blocks, while the wirings in the third wiring layer are used as power supply wirings for providing power supply to functional blocks. As the power supply paths to functional blocks, a plurality of power supply wirings are branched off from the power supply electrode such as a power supply pad and terminated there. The power supply electrode on the high voltage side and the power supply electrode on the low voltage side are disposed separately at opposing edge portions of the semiconductor substrate and the power supply wirings proceeding therefrom to their target functional blocks are bent in the vicinity of the edge portion of the semiconductor substrate and therefrom extended straight to the target points.
    • 当具有三层以上的布线结构的半导体集成电路器件被分级地考虑为多个功能块的集合时,每个功能块通过布线在第一布线层中的布线内部连接,其中布线具有其主要延伸方向 规定为X方向,并且在第一布线层上形成第二布线层中的布线,其中布线的主要延伸方向规定为Y方向。 将在第二布线层中形成的与第二布线层中的配线相同的布线的第三布线层中的布线与第一布线层和第二布线层中的布线一起用作布线层的布线 功能块之间的信号布线,而第三布线层中的布线用作向功能块提供电源的电源布线。 作为对功能块的供电路径,多个电源配线从诸如电源焊盘的电源电极分支,并在那里终止。 高电压侧的电源电极和低电压侧的电源电极分别设置在半导体基板的相对的边缘部分,并且从其到达其目标功能块的电源布线在边缘附近弯曲 半导体衬底的一部分并且直接延伸到目标点。
    • 7. 发明授权
    • Electronic device
    • 电子设备
    • US06442028B2
    • 2002-08-27
    • US09848679
    • 2001-05-03
    • Kouichi Yamazaki
    • Kouichi Yamazaki
    • H05K720
    • H05K7/20509G11B31/003G11B31/02H05K9/002H05K9/0022
    • An electronic device having a circuit board, a shielding plate disposed thereon and a three-terminal regulator is provided with a heat sink positioned on the outer side of the circuit board and connected to the three-terminal regulator. The heat of three-terminal regulator is radiated from the heat sink, thus making it possible to prevent heating of the shielding plate. In this way, electronic device elements that do not stand up very well to heat, such as an optical pickup unit, can be placed directly on shielding plate, so that the heat of three-terminal regulator is efficiently dissipated and the size of the electronic devices may be reduced.
    • 具有电路板,设置在其上的屏蔽板和三端调节器的电子设备设置有位于电路板的外侧并连接到三端调节器的散热器。 三端调节器的热量从散热器辐射,从而可以防止屏蔽板的加热。 以这种方式,不能非常好地加热的电子设备元件(例如光学拾取单元)可以直接放置在屏蔽板上,使得三端调节器的热量被有效地消散并且电子的尺寸 设备可能会减少。
    • 8. 发明授权
    • Tri-state IIL gate
    • 三态IIL门
    • US4841484A
    • 1989-06-20
    • US832694
    • 1986-02-25
    • Kazuo WatanabeMakoto FurihataKouichi Yamazaki
    • Kazuo WatanabeMakoto FurihataKouichi Yamazaki
    • H01L27/02H03K19/082
    • H01L27/0233H03K19/0826
    • A semiconductor integrated circuit device comprising a logic circuit which is constituted by using tri-state IIL gates. The tri-state IIL gates are particularly arranged to have first and second inputs. If the second input has a first level, the circuit will operate as a normal IIL circuit to provide high and low outputs in response to the first input. However, if the second input has a second level, the circuit will provide a floating output regardless of the first input. The transistors of the IIL circuit can be formed in an island in the substrate, with the potential of the island serving as the second input. In a preferred arrangement, the first level of the second input can be obtained by grounding the island while the second level is obtained by disconnecting the island from ground. These tri-state IIL gates are particularly advantageous to form a transfer gate for an IIL memory similar to the transfer gates used for MOS memories. They can also be used for forming various other logic gate arrangements.
    • 一种半导体集成电路器件,包括由三态IIL栅极构成的逻辑电路。 三态IIL门特别地布置成具有第一和第二输入。 如果第二输入具有第一电平,则该电路将作为正常的IIL电路工作,以响应于第一输入而提供高和低输出。 然而,如果第二输入具有第二电平,则电路将提供浮动输出而不管第一输入。 IIL电路的晶体管可以形成在衬底中的岛中,岛的电位用作第二输入。 在优选的布置中,可以通过使岛接地来获得第二输入的第一电平,而通过将岛与地断开来获得第二电平。 与用于MOS存储器的传输门相似,这些三态IIL门特别有利于形成用于IIL存储器的传输门。 它们也可以用于形成各种其他逻辑门布置。