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1. 发明授权

US08487806B2 Voltage-time converters and time-domain voltage comparators including the same 失效
标题翻译：电压时间转换器和时域电压比较器包括相同的
公开(公告)号：US08487806B2
公开(公告)日：2013-07-16
申请号：US13284822
申请日：2011-10-28
申请人： Seong Hoon Choi , Jang Hyun Park , Chang Sun Kim , Jihun Eo , Young-Chan Jang
发明人： Seong Hoon Choi , Jang Hyun Park , Chang Sun Kim , Jihun Eo , Young-Chan Jang
IPC分类号： H03M1/50
CPC分类号： H03M1/50 , H03M1/46
摘要： Provided is a time-domain voltage comparator including a voltage-time converter. The voltage-time converter includes a conversion unit and an output unit. The conversion unit includes a first MOS transistor which shifts a voltage level of the first detection node according to an external first voltage signal, and a second MOS transistor which shifts a voltage level of the second detection node according to an external second voltage signal. The output unit generates first and second output signals in response to voltages of the first and second detection nodes. The output unit determines a shifted time of the first output signal according to a voltage level of the first detection node and determines a shifted time of the second output signal according to a voltage level of the second detection node.
摘要翻译：提供了包括电压 - 时间转换器的时域电压比较器。电压 - 时间转换器包括转换单元和输出单元。转换单元包括：第一MOS晶体管，其根据外部第一电压信号偏移第一检测节点的电压电平;以及第二MOS晶体管，其根据外部第二电压信号偏移第二检测节点的电压电平。输出单元响应于第一和第二检测节点的电压产生第一和第二输出信号。输出单元根据第一检测节点的电压电平确定第一输出信号的移位时间，并根据第二检测节点的电压电平确定第二输出信号的移位时间。

2. 发明申请

US20120133540A1 VOLTAGE-TIME CONVERTERS AND TIME-DOMAIN VOLTAGE COMPARATORS INCLUDING THE SAME 失效
标题翻译：电压时间转换器和时域电压比较器包括它们
公开(公告)号：US20120133540A1
公开(公告)日：2012-05-31
申请号：US13284822
申请日：2011-10-28
申请人： Seong Hoon CHOI , Jang Hyun Park , Chang Sun Kim , Jihun Eo , Young-Chan Jang
发明人： Seong Hoon CHOI , Jang Hyun Park , Chang Sun Kim , Jihun Eo , Young-Chan Jang
IPC分类号： H03M1/50
CPC分类号： H03M1/50 , H03M1/46
摘要： Provided is a time-domain voltage comparator including a voltage-time converter. The voltage-time converter includes a conversion unit and an output unit. The conversion unit includes a first MOS transistor which shifts a voltage level of the first detection node according to an external first voltage signal, and a second MOS transistor which shifts a voltage level of the second detection node according to an external second voltage signal. The output unit generates first and second output signals in response to voltages of the first and second detection nodes. The output unit determines a shifted time of the first output signal according to a voltage level of the first detection node and determines a shifted time of the second output signal according to a voltage level of the second detection node.
摘要翻译：提供了包括电压 - 时间转换器的时域电压比较器。电压 - 时间转换器包括转换单元和输出单元。转换单元包括：第一MOS晶体管，其根据外部第一电压信号偏移第一检测节点的电压电平;以及第二MOS晶体管，其根据外部第二电压信号偏移第二检测节点的电压电平。输出单元响应于第一和第二检测节点的电压产生第一和第二输出信号。输出单元根据第一检测节点的电压电平确定第一输出信号的移位时间，并根据第二检测节点的电压电平确定第二输出信号的移位时间。

3. 发明申请

US20100296352A1 MEMORY CONTROLLER FOR DETECTING READ LATENCY, MEMORY SYSTEM AND TEST SYSTEM HAVING THE SAME 有权
标题翻译：用于检测读取期望的存储器控制器，具有该读取期望的存储器系统和测试系统
公开(公告)号：US20100296352A1
公开(公告)日：2010-11-25
申请号：US12781846
申请日：2010-05-18
申请人： Hun-Dae Choi , Young-Chan Jang
发明人： Hun-Dae Choi , Young-Chan Jang
IPC分类号： G11C7/00 , G11C8/18 , G11C29/00
CPC分类号： G11C29/50 , G11C29/50012 , G11C29/56012 , G11C2207/2272
摘要： A memory controller includes an I/O circuit, a read latency detector and a clock domain synchronizer. The I/O circuit transmits a first signal to a semiconductor memory device, receives a reflected signal returned from the semiconductor memory device, and delays the reflected signal in response to a delay selection signal to generate a second signal. The reflected signal is provided by reflection of the first signal from the semiconductor memory device. The read latency detector generates the first signal in response to a system clock signal, and generates a read latency signal in response to the system clock signal, a hold signal, and the second signal. The clock domain synchronizer generates the delay selection signal and the hold signal in response to the system clock signal and the second signal.
摘要翻译：存储器控制器包括I / O电路，读延迟检测器和时钟域同步器。 I / O电路将第一信号发送到半导体存储器件，接收从半导体存储器件返回的反射信号，并响应于延迟选择信号延迟反射信号以产生第二信号。反射信号由来自半导体存储器件的第一信号的反射提供。读延迟检测器响应于系统时钟信号产生第一信号，并且响应于系统时钟信号，保持信号和第二信号而产生读等待时间信号。时钟域同步器响应于系统时钟信号和第二信号产生延迟选择信号和保持信号。

4. 发明授权

US07724535B2 Semiconductor device, related method, and printed circuit board 失效
标题翻译：半导体器件，相关方法和印刷电路板
公开(公告)号：US07724535B2
公开(公告)日：2010-05-25
申请号：US11797988
申请日：2007-05-09
申请人： Jong-Hoon Kim , Jae-Jun Lee , Moon-Jung Kim , Kwang-Soo Park , Young-Chan Jang
发明人： Jong-Hoon Kim , Jae-Jun Lee , Moon-Jung Kim , Kwang-Soo Park , Young-Chan Jang
IPC分类号： H05K7/00
CPC分类号： H05K1/0231 , H01L23/64 , H01L2924/0002 , H01L2924/3011 , H05K1/0233 , H05K1/165 , H05K2201/09309 , H05K2201/10022 , H05K2201/1003 , H01L2924/00
摘要： A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.
摘要翻译：公开了半导体器件，与半导体器件相关的方法和印刷电路板。半导体器件包括芯片，包括多个电源电压端子和多个接地电压端子的封装，其中芯片设置在封装中。半导体装置还包括连接在直流分量电源端子和接地电压之间的阻抗电路，其中直流分量电源电压端子是多个电源电压端子中的一个，以及连接在直流分量电源电压端子和电源电压。除了直流分量第二电力电压端子之外，将电力电压的交流分量和直流分量都施加到各电力电压端子，并且将接地电压施加到每个接地电压端子。

5. 发明授权

US6013746A Process for controlling the molecular weight distribution of high 1,4-cis polybutadiene 失效
标题翻译：控制高1,4-顺式聚丁二烯分子量分布的方法
公开(公告)号：US6013746A
公开(公告)日：2000-01-11
申请号：US93646
申请日：1998-06-09
申请人： Young-Chan Jang , Gwang-Hoon Kwag , Dong-Il Yoon , A-Ju Kim , Kyung-Nam Lim
发明人： Young-Chan Jang , Gwang-Hoon Kwag , Dong-Il Yoon , A-Ju Kim , Kyung-Nam Lim
IPC分类号： C08F36/06 , C08F4/609 , C08F136/06 , C08F236/06 , C08F4/80
CPC分类号： C08F136/06
摘要： This invention relates to a process for controlling the molecular weight distribution of high 1,4-cis polybutadiene and more particularly, to a process of easily controlling the molecular weight distribution of polybutadiene which is concerned directly with the physical properties such as processability, in such a manner that preparation of high 1,4-cis polybutadiene is made available via polymerization of 1,3-butadiene in the presence of Ziegler-Natta catalyst, adding carboxylic acid represented by following formula I for the controlling of the molecular weight distribution of polybutadiene based on the contents of carboxylic acid, may be easily controlled, without any alternation in the 1,4-cis contents. ##STR1## Wherein R is selected from the group consisting of alkyl, cycloalkyl and arylalkyl groups substituted or unsubstituted with at least one or more halogen atoms, or alkyl, cycloalkyl and arylalkyl groups with at least one or more double bonds containing from 5 to 20 carbon atoms.
摘要翻译：本发明涉及一种控制高1,4-顺式聚丁二烯的分子量分布的方法，更具体地说，涉及容易控制聚丁二烯的分子量分布的方法，其直接关系到诸如加工性的物理性质通过在齐格勒 - 纳塔催化剂存在下，通过1,3-丁二烯的聚合可得到制备高1,4-顺式聚丁二烯的方式，加入由下式I表示的羧酸以控制聚丁二烯的分子量分布基于羧酸的含量，可以容易地控制，而在1,4-顺式含量中没有任何变化。其中R选自被至少一个或多个卤素原子取代或未取代的烷基，环烷基和芳基烷基，或具有至少一个或多个含有5至20个碳原子的双键的烷基，环烷基和芳烷基。

6. 发明申请

US20110001463A1 Transceiver for Controlling Swing Width of Output Voltage 有权
标题翻译：用于控制输出电压摆幅宽度的收发器
公开(公告)号：US20110001463A1
公开(公告)日：2011-01-06
申请号：US12683322
申请日：2010-01-06
申请人： Young-Chan Jang , Kyoung-su Lee , Hun-dae Choi
发明人： Young-Chan Jang , Kyoung-su Lee , Hun-dae Choi
IPC分类号： G05F3/08
CPC分类号： H04L25/0264
摘要： A transceiver for controlling a swing width of an output voltage includes a transmitter and a receiver for receiving an output voltage of a transmitter. The transmitter includes a first signal converter that outputs changed data generated by changing a voltage level of data in response to a mode control signal for selecting a test mode or a normal mode, an output voltage control circuit for controlling a voltage level of an output node of the transmitter in response to the changed data, and a first termination circuit for supplying a changed power supply voltage generated by changing a voltage level of a power supply voltage of the output node of the transmitter, or is turned off, in response to a test mode enable signal or the changed data. The receiver includes a second termination circuit that operates as a resistor having a resistance value that varies in response to the test mode enable signal or a test mode disable signal.
摘要翻译：用于控制输出电压的摆幅的收发器包括用于接收发射器的输出电压的发射器和接收器。发射机包括：第一信号转换器，其响应于用于选择测试模式或正常模式的模式控制信号，输出通过改变数据的电压电平而产生的改变的数据;输出电压控制电路，用于控制输出节点的电压电平以及第一终端电路，用于响应于所述发射机的输出节点的电源电压改变或者关闭发送器的输出节点的电源电压而产生的改变的电源电压测试模式使能信号或更改的数据。接收机包括第二终端电路，其作为具有响应于测试模式使能信号或测试模式禁止信号而变化的电阻值的电阻器工作。

7. 发明申请

US20100097094A1 Output circuit having variable output voltage swing level 失效
标题翻译：输出电路具有可变的输出电压摆幅电平
公开(公告)号：US20100097094A1
公开(公告)日：2010-04-22
申请号：US12588478
申请日：2009-10-16
申请人： Young-Chan Jang
发明人： Young-Chan Jang
IPC分类号： H03K17/16
CPC分类号： H03K19/0005 , H03K19/017545
摘要： An output circuit having a variable swing level of a terminated output data signal is disclosed. The output circuit includes a control circuit configured to generate a first control signal and a second control signal in response to a voltage swing level selection signal and an output enable signal. The output circuit further includes an output driving circuit configured to, in response to the first and second control signals, perform on-die termination in an input mode and configured to control swing level of a signal output from the output circuit in an output mode.
摘要翻译：公开了具有端接输出数据信号的可变摆幅电平的输出电路。输出电路包括：控制电路，被配置为响应于电压摆幅电平选择信号和输出使能信号而产生第一控制信号和第二控制信号。输出电路还包括输出驱动电路，被配置为响应于第一和第二控制信号，以输入模式执行片上终止，并且被配置为在输出模式下控制从输出电路输出的信号的摆幅电平。

8. 发明申请

US20090207895A1 Data transceiver system and associated methods 有权
标题翻译：数据收发系统及相关方法
公开(公告)号：US20090207895A1
公开(公告)日：2009-08-20
申请号：US12379080
申请日：2009-02-12
申请人： Hwan-Wook Park , Young-Chan Jang
发明人： Hwan-Wook Park , Young-Chan Jang
IPC分类号： H04B1/38
CPC分类号： G11C8/18 , G11C7/1003 , G11C7/1066 , G11C7/1093 , G11C29/022 , G11C29/023 , G11C29/028 , G11C29/1201 , G11C2207/2254 , H04L1/004
摘要： A data transceiver system may include an error corrector. The error corrector may include a plurality of delay units, each delay unit being configured to delay a corresponding data signal among a plurality of data signals by a time in response to a corresponding delay code among a plurality of delay codes and outputting the delayed data signal, an error detector configured to receive the plurality of delay codes, determine whether an error has occurred, and output an error signal according to the determination in a data frame lock operation, and a delay controller configured to set initial values of the plurality of delay codes to a predetermined value, vary and output each of the plurality of delay codes in response to a lock signal, and reset initial values the plurality of delay codes in response to the error signal in the data frame lock operation.
摘要翻译：数据收发器系统可以包括错误校正器。错误校正器可以包括多个延迟单元，每个延迟单元被配置为响应于多个延迟代码之间的对应的延迟代码延迟多个数据信号之间的相应数据信号，并输出延迟的数据信号，配置为接收所述多个延迟码的错误检测器，确定是否发生错误，并且根据数据帧锁定操作中的确定输出错误信号;以及延迟控制器，被配置为设置所述多个延迟的初始值编码到预定值，响应于锁定信号改变并输出多个延迟码中的每一个，并且响应于数据帧锁定操作中的错误信号来复位初始值多个延迟码。

9. 发明申请

US20050176886A1 Preparation method of diene copolymer having improved rolling resistance and wet traction 有权
标题翻译：具有改善的滚动阻力和湿牵引力的二烯共聚物的制备方法
公开(公告)号：US20050176886A1
公开(公告)日：2005-08-11
申请号：US10940470
申请日：2004-09-14
申请人： Young-Chan Jang , Hyung-Kyu Choi , Shin Han , Young-Hoon Ko
发明人： Young-Chan Jang , Hyung-Kyu Choi , Shin Han , Young-Hoon Ko
IPC分类号： C08F236/14 , C08C19/44 , C08G77/442 , C08G77/50 , C08G81/02 , C08L51/08
CPC分类号： C08G81/024 , C08C19/44 , C08G77/442 , C08G77/50
摘要： The present invention provides a method for preparing a copolymer useful for the manufacture of tires by coupling the ends of a living polymer, obtained from copolymerization of a diene monomers in the presence of an organolithium initiator and a hydrocarbon solvent, with a multi-reactive polysiloxane compound, and then completing the reaction or subsequently modifying the remaining uncoupled ends of the polymer with an amine compound. The use of the copolymer thus obtained for tire production improves the affinity to silica and greatly enhances the dynamic properties required for tires, such as wet traction and rolling resistance.
摘要翻译：本发明提供一种制备用于制造轮胎的共聚物的方法，该方法是将有机锂引发剂和烃溶剂存在下的二烯单体的共聚得到的活性聚合物的末端与多反应性聚硅氧烷化合物，然后用胺化合物完成反应或随后改性聚合物的剩余的未偶联的末端。由此获得的用于轮胎生产的共聚物的使用提高了对二氧化硅的亲和性，并且大大提高了轮胎所需的动态性能，例如湿牵引和滚动阻力。

10. 发明授权

US07327292B2 Bubble error rejecter in data converter 有权
标题翻译：数据转换器中的气泡错误拒绝
公开(公告)号：US07327292B2
公开(公告)日：2008-02-05
申请号：US11451921
申请日：2006-06-13
申请人： Ho-Young Lee , Yong-Sang You , Hong-June Park , Jun-Hyun Bae , Young-Chan Jang
发明人： Ho-Young Lee , Yong-Sang You , Hong-June Park , Jun-Hyun Bae , Young-Chan Jang
IPC分类号： H03M13/00
CPC分类号： H03M1/0809 , H03M1/365
摘要： A bubble error rejecter includes a cascade of front and rear voting sections for correcting bubble errors spanning multiple bits from interpolation. The front voting section generates first correction codes from first thermometer codes determined from preamplified signals. The rear voting section generates second correction codes from the first correction codes and second thermometer codes determined from interpolation of the preamplified signals.
摘要翻译：泡沫误差拒绝器包括前级和后端投票部分的级联，用于校正跨内插多个位的气泡误差。前投票部分根据从预放大信号确定的第一温度计代码产生第一校正码。后方投票部从根据前置放大信号的内插确定的第一校正码和第二温度计代码生成第二校正码。

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