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1. 发明申请

US20130240912A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20130240912A1
公开(公告)日：2013-09-19
申请号：US13988535
申请日：2011-12-05
申请人： Hiroki Shiota , Seiji Oka , Yoshihiro Yamaguchi
发明人： Hiroki Shiota , Seiji Oka , Yoshihiro Yamaguchi
IPC分类号： H01L23/495 , H01L29/16
CPC分类号： H01L23/49568 , H01L23/3121 , H01L23/36 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L25/072 , H01L29/1602 , H01L29/1608 , H01L2224/32013 , H01L2224/32245 , H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , H01L2924/00014 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/14 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device including: a semiconductor element; a lead frame connected to the semiconductor element; a metal base plate mounted on the lead frame via a first insulation layer; and a second insulation layer disposed on the opposite side of the metal base plate face on which the first insulation layer is disposed; wherein the first insulation layer is an insulation layer whose heat-dissipation performance is higher than that of the second insulation layer, and the second insulation layer is an insulation layer whose insulation performance is the same as that of the first insulation layer or higher than that of the first insulation layer.
摘要翻译：一种半导体器件，包括：半导体元件; 连接到所述半导体元件的引线框架; 通过第一绝缘层安装在引线框架上的金属基板; 以及第二绝缘层，其设置在设置有所述第一绝缘层的所述金属基板面的相对侧上; 其特征在于，所述第一绝缘层是绝热层，其绝热性能比所述第二绝缘层高，绝缘性能与所述第一绝缘层的绝缘性能相同，的第一绝缘层。

2. 发明申请

US20120231586A1 POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME 有权
标题翻译：功率半导体器件及其制造方法
公开(公告)号：US20120231586A1
公开(公告)日：2012-09-13
申请号：US13476425
申请日：2012-05-21
申请人： Seiji OKA , Yoshihiro Yamaguchi
发明人： Seiji OKA , Yoshihiro Yamaguchi
IPC分类号： H01L21/56
CPC分类号： H01L23/3121 , H01L21/565 , H01L24/28 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/072 , H01L2224/32225 , H01L2224/45124 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48237 , H01L2224/49 , H01L2224/73265 , H01L2224/92247 , H01L2924/01013 , H01L2924/01014 , H01L2924/01068 , H01L2924/01079 , H01L2924/014 , H01L2924/10272 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A method of manufacturing includes arranging an integral resin sleeve formed by integrating a plurality of sleeve parts so that the sleeve parts are respectively fitted with a plurality of electrode terminals. There is a press-fitting of the sleeve parts to the electrode terminals by performing mold clamping on molds to apply a force downward on the integral resin sleeve. Further, there is a filling of a molding resin into a hollow cavity of the molds.
摘要翻译：一种制造方法包括：通过集成多个套筒部件而形成的整体树脂套筒，使得套筒部件分别装配有多个电极端子。通过在模具上进行模具夹紧将套筒部件压配合到电极端子上，以将力向下施加在整体树脂套筒上。此外，将模制树脂填充到模具的中空腔中。

3. 发明授权

US08304882B2 Power semiconductor device 有权
标题翻译：功率半导体器件
公开(公告)号：US08304882B2
公开(公告)日：2012-11-06
申请号：US12790254
申请日：2010-05-28
申请人： Seiji Oka , Yoshihiro Yamaguchi
发明人： Seiji Oka , Yoshihiro Yamaguchi
IPC分类号： H01L23/24
CPC分类号： H01L23/3121 , H01L21/565 , H01L24/28 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/072 , H01L2224/32225 , H01L2224/45124 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48237 , H01L2224/49 , H01L2224/73265 , H01L2224/92247 , H01L2924/01013 , H01L2924/01014 , H01L2924/01068 , H01L2924/01079 , H01L2924/014 , H01L2924/10272 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Provided is a power semiconductor device including: an insulating substrate; a circuit pattern formed on an upper surface of the insulating substrate; a power semiconductor formed on the circuit pattern; a plurality of metal socket electrode terminals formed perpendicularly to the circuit pattern or the power semiconductor so as to be in conduction with external terminals; an integral resin sleeve in which a plurality of sleeve parts are integrated, the plurality of sleeve parts being fitted with the plurality of metal socket electrode terminals from above the plurality of metal socket electrode terminals and having openings at both ends thereof; and a molding resin covering the insulating substrate, the circuit pattern, the power semiconductor, the electrode terminals, and the integral resin sleeve.
摘要翻译：提供一种功率半导体器件，包括：绝缘基板; 形成在所述绝缘基板的上表面上的电路图案; 形成在电路图案上的功率半导体; 多个金属插座电极端子，垂直于电路图形或功率半导体形成，以便与外部端子导通; 其中多个套筒部分一体形成的整体树脂套筒，多个套筒部分从多个金属插座电极端子上方装配有多个金属插座电极端子，并在其两端具有开口; 以及覆盖绝缘基板，电路图案，功率半导体，电极端子和一体树脂套筒的成型树脂。

4. 发明授权

US08294257B2 Power block and power semiconductor module using same 有权
公开(公告)号：US08294257B2
公开(公告)日：2012-10-23
申请号：US13008470
申请日：2011-01-18
申请人： Yoshihiro Yamaguchi , Seiji Oka , Osamu Usui , Takeshi Oi
发明人： Yoshihiro Yamaguchi , Seiji Oka , Osamu Usui , Takeshi Oi
IPC分类号： H01L23/492 , H01L23/02
摘要： A power block includes an insulating substrate, a conductive pattern formed on the insulating substrate, a power semiconductor chip bonded onto the conductive pattern by lead-free solder, a plurality of electrodes electrically connected to the power semiconductor chip and extending upwardly away from the insulating substrate, and a transfer molding resin covering the conductive pattern, the lead-free solder, the power semiconductor chip, and the plurality of electrodes, wherein surfaces of the plurality of electrodes are exposed at an outer surface of the transfer molding resin and lie in the same plane as the outer surface, the outer surface being located directly above the conductive pattern.

5. 发明授权

US09287201B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09287201B2
公开(公告)日：2016-03-15
申请号：US13988535
申请日：2011-12-05
申请人： Hiroki Shiota , Seiji Oka , Yoshihiro Yamaguchi
发明人： Hiroki Shiota , Seiji Oka , Yoshihiro Yamaguchi
IPC分类号： H01L23/495 , H01L23/36 , H01L29/16 , H01L23/00 , H01L25/065 , H01L25/07 , H01L23/31
CPC分类号： H01L23/49568 , H01L23/3121 , H01L23/36 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L25/072 , H01L29/1602 , H01L29/1608 , H01L2224/32013 , H01L2224/32245 , H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , H01L2924/00014 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/1203 , H01L2924/1305 , H01L2924/13055 , H01L2924/14 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device including: a semiconductor element; a lead frame connected to the semiconductor element; a metal base plate mounted on the lead frame via a first insulation layer; and a second insulation layer disposed on the opposite side of the metal base plate face on which the first insulation layer is disposed; wherein the first insulation layer is an insulation layer whose heat-dissipation performance is higher than that of the second insulation layer, and the second insulation layer is an insulation layer whose insulation performance is the same as that of the first insulation layer or higher than that of the first insulation layer.
摘要翻译：一种半导体器件，包括：半导体元件; 连接到所述半导体元件的引线框架; 通过第一绝缘层安装在引线框架上的金属基板; 以及第二绝缘层，其设置在设置有所述第一绝缘层的所述金属基板面的相对侧上; 其特征在于，所述第一绝缘层是绝热层，其绝热性能比所述第二绝缘层高，绝缘性能与所述第一绝缘层的绝缘性能相同，的第一绝缘层。

6. 发明授权

US08334589B2 Power block and power semiconductor module using same 有权
公开(公告)号：US08334589B2
公开(公告)日：2012-12-18
申请号：US13008470
申请日：2011-01-18
申请人： Yoshihiro Yamaguchi , Seiji Oka , Osamu Usui , Takeshi Oi
发明人： Yoshihiro Yamaguchi , Seiji Oka , Osamu Usui , Takeshi Oi
IPC分类号： H01L23/492 , H01L23/02
摘要： A power block includes an insulating substrate, a conductive pattern formed on the insulating substrate, a power semiconductor chip bonded onto the conductive pattern by lead-free solder, a plurality of electrodes electrically connected to the power semiconductor chip and extending upwardly away from the insulating substrate, and a transfer molding resin covering the conductive pattern, the lead-free solder, the power semiconductor chip, and the plurality of electrodes, wherein surfaces of the plurality of electrodes are exposed at an outer surface of the transfer molding resin and lie in the same plane as the outer surface, the outer surface being located directly above the conductive pattern.

7. 发明授权

US08313986B2 Method of manufacturing power semiconductor device 有权
标题翻译：功率半导体器件制造方法
公开(公告)号：US08313986B2
公开(公告)日：2012-11-20
申请号：US13476425
申请日：2012-05-21
申请人： Seiji Oka , Yoshihiro Yamaguchi
发明人： Seiji Oka , Yoshihiro Yamaguchi
IPC分类号： H01L21/00
CPC分类号： H01L23/3121 , H01L21/565 , H01L24/28 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/072 , H01L2224/32225 , H01L2224/45124 , H01L2224/48091 , H01L2224/48137 , H01L2224/48227 , H01L2224/48237 , H01L2224/49 , H01L2224/73265 , H01L2224/92247 , H01L2924/01013 , H01L2924/01014 , H01L2924/01068 , H01L2924/01079 , H01L2924/014 , H01L2924/10272 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A method of manufacturing includes arranging an integral resin sleeve formed by integrating a plurality of sleeve parts so that the sleeve parts are respectively fitted with a plurality of electrode terminals. There is a press-fitting of the sleeve parts to the electrode terminals by performing mold clamping on molds to apply a force downward on the integral resin sleeve. Further, there is a filling of a molding resin into a hollow cavity of the molds.
摘要翻译：一种制造方法包括：通过集成多个套筒部件而形成的整体树脂套筒，使得套筒部件分别装配有多个电极端子。通过在模具上进行模具夹紧将套筒部件压配合到电极端子上，以将力向下施加在整体树脂套筒上。此外，将模制树脂填充到模具的中空腔中。

8. 发明授权

US08987912B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08987912B2
公开(公告)日：2015-03-24
申请号：US13020235
申请日：2011-02-03
申请人： Yoshihiro Yamaguchi
发明人： Yoshihiro Yamaguchi
IPC分类号： H01L23/02 , H01L23/52 , H01L23/48 , H01L23/10 , H01L23/34 , H01L29/40 , H01L23/31 , H01L23/373 , H01L23/433 , H01L23/495 , H01L23/498 , H01L23/00
CPC分类号： H01L23/3107 , H01L23/3735 , H01L23/4334 , H01L23/49531 , H01L23/49811 , H01L24/01 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/72 , H01L24/73 , H01L2224/32225 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/49109 , H01L2224/73265 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01068 , H01L2924/01082 , H01L2924/014 , H01L2924/1305 , H01L2924/13055 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/00014 , H01L2924/00 , H01L2924/3512 , H01L2924/00012
摘要： A semiconductor device includes a substrate having a conductor; a semiconductor chip disposed on the substrate and electrically connected to the conductor; a tubular electrode having one end electrically connected to the conductor; and a sealing resin sealing the substrate, the semiconductor chip and the electrode. The electrode is configured to be extendable and contractible in the stacking direction in which the substrate and the semiconductor chip are stacked in the state before sealing of the sealing resin. The edge of the other end of the electrode is exposed from the sealing resin. The electrode has a hollow space opened at the edge of the other end. Therefore, a semiconductor device reduced in size and a method of manufacturing this semiconductor device can be provided.
摘要翻译：半导体器件包括具有导体的衬底; 半导体芯片，其设置在所述基板上并电连接到所述导体; 管状电极，其一端电连接到导体; 以及将基板，半导体芯片和电极密封的密封树脂。电极被配置为在密封树脂密封之前的状态下层叠基板和半导体芯片的堆叠方向上可伸缩。电极另一端的边缘从密封树脂露出。电极具有在另一端的边缘处开口的中空空间。因此，可以提供尺寸减小的半导体器件和制造该半导体器件的方法。

9. 发明授权

US08976193B2 Information processing apparatus, information processing method, and computer program 有权
标题翻译：信息处理装置，信息处理方法和计算机程序
公开(公告)号：US08976193B2
公开(公告)日：2015-03-10
申请号：US11754582
申请日：2007-05-29
申请人： Hiroki Takakura , Shiro Miyagi , Yoshihiro Yamaguchi
发明人： Hiroki Takakura , Shiro Miyagi , Yoshihiro Yamaguchi
IPC分类号： G09G5/00 , G06F17/30 , G06F3/0481
CPC分类号： G06F17/30265 , G06F3/0481
摘要： An information processing apparatus that executes information display processing is disclosed. The apparatus includes: a display unit that executes information display; and a data processing unit that executes a control of the information display of the display unit and data processing based on a user input. The data processing unit displays an image browsing screen, which corresponds to image data stored in a storage unit, on the display unit and executes display of a map at the position, which corresponds to position information included in attribute information of a selected image, on the basis of a user's input of image selection information and map display request.
摘要翻译：公开了执行信息显示处理的信息处理装置。该装置包括：执行信息显示的显示单元; 以及数据处理单元，其执行对显示单元的信息显示的控制和基于用户输入的数据处理。该数据处理单元将与存储在存储单元中的图像数据相对应的图像浏览屏幕显示在显示单元上，并且在与所选择的图像的属性信息中包括的位置信息对应的位置上执行地图的显示，用户输入图像选择信息和地图显示请求的基础。

10. 发明授权

US08729421B2 Thermal cutting machine and thermal cutting method 有权
标题翻译：热切割机和热切割方法
公开(公告)号：US08729421B2
公开(公告)日：2014-05-20
申请号：US11629283
申请日：2005-06-02
申请人： Satoshi Ohnishi , Yoshihiro Yamaguchi
发明人： Satoshi Ohnishi , Yoshihiro Yamaguchi
IPC分类号： B23K9/02
CPC分类号： B23K37/0408 , B23K7/002 , B23K10/00 , B23K26/0884 , B23K26/16 , B23K26/38 , B23K26/702 , B23K37/0461 , B23K2101/18
摘要： A lattice pallet 13 having a large number of supporters for placing a plate 14 is installed to a table 12 so as to be freely fittable and removable. Bringing in of the plate 14 is performed by the method of raising the lattice pallet 13 with a crane with the plate 14 already having been loaded upon the lattice pallet 13 in a different location, transporting them over the table 12, and lowering them down onto the table 12. Directly after cutting has been completed, the lattice pallet 12 is raised and separated from the table 12 with the manufactured product and the left over material carried upon it and is taken away to a different location, and another lattice pallet 13 with another plate 14 mounted upon it is brought in with the crane upon the table 12, and the task of cutting this other plate 14 is commenced.
摘要翻译：具有用于放置板14的大量支撑器的格子托盘13被安装到桌子12上，以便可自由地装配和拆卸。通过用起重机提升格子托盘13的方法来进行板14的进入，该起重机已将板14已经装载在不同位置的格子托盘13上，将它们运送到工作台12上，并将它们下降到桌子12.切割完成之后，格子托盘12被升起并与工作台12分离，制成品并将剩下的材料运送到其上并被带走到不同的位置，另一个格子托盘13具有安装在其上的另一个板14与起重机一起被放置在工作台12上，并且开始切割另一个板14的任务。

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