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    • 7. 发明授权
    • RS flip-flop
    • RS触发器
    • US5208487A
    • 1993-05-04
    • US862661
    • 1992-04-01
    • Yoshinori MatsuuraShinichi NakagawaTetsuya Matsumura
    • Yoshinori MatsuuraShinichi NakagawaTetsuya Matsumura
    • H03K3/037H03K3/356
    • H03K3/037H03K3/356017H03K3/356069
    • A logic circuit outputs a logic signal in response to set inputs and a reset input. This logic signal is applied to output terminals through a latch circuit. When outputs Q and Q of the RS flip-flop maintain a previous state, the latch circuit is activated by a control signal applied from an OR gate to hold a previous logic signal received from the logic circuit. Thus, the logic circuit and latch circuit are arranged on a signal path from input terminals to output terminals. These logic circuit and latch circuit do not include a series connection of transistors and, therefore, is operable at high speed in response to the inputs. Consequently, the outputs Q and Q have excellent response characteristics relative to the set and reset inputs, to enable a high-speed operation.
    • 逻辑电路根据设定输入和复位输入输出逻辑信号。 该逻辑信号通过锁存电路施加到输出端子。 当RS触发器的输出Q和& upbar&Q保持先前状态时,锁存电路由从或门施加的控制信号激活,以保持从逻辑电路接收到的先前的逻辑信号。 因此,逻辑电路和锁存电路被布置在从输入端子到输出端子的信号路径上。 这些逻辑电路和锁存电路不包括晶体管的串联连接,因此可以响应于输入以高速操作。 因此,输出Q和& upbar&Q相对于设定和复位输入具有优异的响应特性,以实现高速运行。