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1. 发明申请

US20080218235A1 SEMICONDUCTOR INTEGRATED CIRCUIT WITH FLIP-FLOP CIRCUITS MOUNTED THEREON 有权
标题翻译：具有FLIP-FLOP电路的半导体集成电路安装在
公开(公告)号：US20080218235A1
公开(公告)日：2008-09-11
申请号：US12044406
申请日：2008-03-07
申请人： Satoru SEKINE , Yoshitaka Ueda , Takashi Asano , Shinji Furuichi , Atsushi Wada
发明人： Satoru SEKINE , Yoshitaka Ueda , Takashi Asano , Shinji Furuichi , Atsushi Wada
IPC分类号： H03K3/356 , H03K3/00 , H03K3/037
CPC分类号： H03K3/35625
摘要： A plurality of flip-flop circuits, having different circuit configurations, which perform an identical digital signal processing are mixed on a single semiconductor substrate. A first flip-flop circuit among the plurality of flip-flop circuits receives a clock signal supplied from outside the flip-flop circuits, through at least two stage inverters, and operates with clock signals outputted from the inverters. A second flip-flop circuit receives the clock signal supplied from outside the flip-flop circuits through at least one inverter having a less number of stages than the number of stages of the inverter contained in the first flip-flop circuit, and operates with at least one of the clock signal and a clock signal outputted from the inverter.
摘要翻译：具有不同电路结构的执行相同数字信号处理的多个触发电路混合在单个半导体衬底上。多个触发器电路中的第一触发器电路通过至少两级反相器接收从触发器电路外部提供的时钟信号，并且利用从反相器输出的时钟信号进行操作。第二触发器电路通过至少一个具有比包含在第一触发器电路中的反相器的级数少的级数的反相器接收从触发器电路的外部提供的时钟信号，并且以至少一个时钟信号和从逆变器输出的时钟信号。

2. 发明授权

US07746138B2 Semiconductor integrated circuit with flip-flop circuits mounted thereon 有权
标题翻译：具有安装在其上的触发器电路的半导体集成电路
公开(公告)号：US07746138B2
公开(公告)日：2010-06-29
申请号：US12044406
申请日：2008-03-07
申请人： Satoru Sekine , Yoshitaka Ueda , Takashi Asano , Shinji Furuichi , Atsushi Wada
发明人： Satoru Sekine , Yoshitaka Ueda , Takashi Asano , Shinji Furuichi , Atsushi Wada
IPC分类号： H03K3/00
CPC分类号： H03K3/35625
摘要： A plurality of flip-flop circuits, having different circuit configurations, which perform an identical digital signal processing are mixed on a single semiconductor substrate. A first flip-flop circuit among the plurality of flip-flop circuits receives a clock signal supplied from outside the flip-flop circuits, through at least two stage inverters, and operates with clock signals outputted from the inverters. A second flip-flop circuit receives the clock signal supplied from outside the flip-flop circuits through at least one inverter having a less number of stages than the number of stages of the inverter contained in the first flip-flop circuit, and operates with at least one of the clock signal and a clock signal outputted from the inverter.
摘要翻译：具有不同电路结构的执行相同数字信号处理的多个触发电路混合在单个半导体衬底上。多个触发器电路中的第一触发器电路通过至少两级反相器接收从触发器电路外部提供的时钟信号，并且利用从反相器输出的时钟信号进行操作。第二触发器电路通过至少一个具有比包含在第一触发器电路中的反相器的级数少的级数的反相器接收从触发器电路的外部提供的时钟信号，并且以至少一个时钟信号和从逆变器输出的时钟信号。

3. 发明授权

US09219362B2 Power supply circuit 有权
标题翻译：电源电路
公开(公告)号：US09219362B2
公开(公告)日：2015-12-22
申请号：US13008414
申请日：2011-01-18
申请人： Shigeto Kobayashi , Kouichi Yamada , Yoshitaka Ueda , Atsushi Wada
发明人： Shigeto Kobayashi , Kouichi Yamada , Yoshitaka Ueda , Atsushi Wada
IPC分类号： H02J1/10 , H02J1/08 , H03K19/0175 , G06F1/26 , H03L5/00
CPC分类号： H02J1/08 , G06F1/26 , H03K19/0175 , H03L5/00 , Y10T307/50
摘要： A power supply circuit generates the internal power supply voltage intVCC from a first power supply capable of supplying a first power supply voltage V1 and a second power supply capable of supplying a second power supply voltage V2, which is lower than the first power supply voltage V1. A first transistor TR1 is provided between the first power supply and an output node, whereas a second transistor TR2 is provided between the second power supply and the output node. A first supply unit supplies the inverted value of an output voltage of the first power supply or the inverted value of a voltage corresponding to the output voltage of the first power supply, to the gate input of the first transistor TR1. A second supply unit supplies the output voltage of the first power supply or the voltage corresponding to the output voltage of the first power supply, to the gate input of the second transistor TR2.
摘要翻译：电源电路从能够提供第一电源电压V1的第一电源和能够提供低于第一电源电压V1的第二电源电压V2的第二电源产生内部电源电压intVCC 。第一晶体管TR1设置在第一电源和输出节点之间，而第二晶体管TR2设置在第二电源和输出节点之间。第一供电单元将第一电源的输出电压的反相值或与第一电源的输出电压对应的电压的反相值提供给第一晶体管TR1的栅极输入。第二供应单元将第一电源的输出电压或与第一电源的输出电压相对应的电压提供给第二晶体管TR2的栅极输入。

4. 发明申请

US20110186935A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20110186935A1
公开(公告)日：2011-08-04
申请号：US13016481
申请日：2011-01-28
申请人： Yoshitaka UEDA , Kouichi Yamada , Atsushi Wada , Shigeto Kobayashi
发明人： Yoshitaka UEDA , Kouichi Yamada , Atsushi Wada , Shigeto Kobayashi
IPC分类号： H01L27/105
CPC分类号： H01L27/105
摘要： A MOS transistor includes a gate electrode formed in a grid pattern, source regions and drain regions each surrounded by the gate electrode, and a source metal wiring connected to the source regions via source contacts and a drain metal wiring connected to the drain regions via drain contacts. The source metal wiring and the drain metal wiring are disposed along one direction of the grid of the gate electrode. Each of the source regions and the drain regions is a rectangular form having its long side along the length direction of each metal wiring. The source metal wiring and the drain metal wiring are each formed in a zigzag manner in the length direction and are respectively connected to the source contacts and the drain contacts.
摘要翻译： MOS晶体管包括形成为栅格图案的栅极电极，由栅电极围绕的源极区域和漏极区域以及经由源极触点连接到源极区域的源极金属布线和经由漏极连接到漏极区域的漏极金属布线联系人源金属布线和漏极金属布线沿着栅电极的栅格的一个方向设置。源极区域和漏极区域中的每一个是沿着每个金属布线的长度方向具有长边的矩形形状。源极金属布线和漏极金属布线分别在长度方向上以锯齿形形式分别连接到源极触点和漏极触点。

5. 发明授权

US08513716B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08513716B2
公开(公告)日：2013-08-20
申请号：US13016481
申请日：2011-01-28
申请人： Yoshitaka Ueda , Kouichi Yamada , Atsushi Wada , Shigeto Kobayashi
发明人： Yoshitaka Ueda , Kouichi Yamada , Atsushi Wada , Shigeto Kobayashi
IPC分类号： H01L29/78
CPC分类号： H01L27/105
摘要： A MOS transistor includes a gate electrode formed in a grid pattern, source regions and drain regions each surrounded by the gate electrode, and a source metal wiring connected to the source regions via source contacts and a drain metal wiring connected to the drain regions via drain contacts. The source metal wiring and the drain metal wiring are disposed along one direction of the grid of the gate electrode. Each of the source regions and the drain regions is a rectangular form having its long side along the length direction of each metal wiring. The source metal wiring and the drain metal wiring are each formed in a zigzag manner in the length direction and are respectively connected to the source contacts and the drain contacts.
摘要翻译： MOS晶体管包括形成为栅格图案的栅极电极，由栅电极围绕的源极区域和漏极区域以及经由源极触点连接到源极区域的源极金属布线和经由漏极连接到漏极区域的漏极金属布线联系人源金属布线和漏极金属布线沿着栅电极的栅格的一个方向设置。源极区域和漏极区域中的每一个是沿着每个金属布线的长度方向具有长边的矩形形状。源极金属布线和漏极金属布线分别在长度方向上以锯齿形形式分别连接到源极触点和漏极触点。

6. 发明申请

US20110175449A1 POWER SUPPLY CIRCUIT 有权
标题翻译：电源电路
公开(公告)号：US20110175449A1
公开(公告)日：2011-07-21
申请号：US13008414
申请日：2011-01-18
申请人： Shigeto KOBAYASHI , Kouichi Yamada , Yoshitaka Ueda , Atsushi Wada
发明人： Shigeto KOBAYASHI , Kouichi Yamada , Yoshitaka Ueda , Atsushi Wada
IPC分类号： H02J1/10
CPC分类号： H02J1/08 , G06F1/26 , H03K19/0175 , H03L5/00 , Y10T307/50
摘要： A power supply circuit generates the internal power supply voltage intVCC from a first power supply capable of supplying a first power supply voltage V1 and a second power supply capable of supplying a second power supply voltage V2, which is lower than the first power supply voltage V1. A first transistor TR1 is provided between the first power supply and an output node, whereas a second transistor TR2 is provided between the second power supply and the output node. A first supply unit supplies the inverted value of an output voltage of the first power supply or the inverted value of a voltage corresponding to the output voltage of the first power supply, to the gate input of the first transistor TR1. A second supply unit supplies the output voltage of the first power supply or the voltage corresponding to the output voltage of the first power supply, to the gate input of the second transistor TR2.
摘要翻译：电源电路从能够提供第一电源电压V1的第一电源和能够提供低于第一电源电压V1的第二电源电压V2的第二电源产生内部电源电压intVCC 。第一晶体管TR1设置在第一电源和输出节点之间，而第二晶体管TR2设置在第二电源和输出节点之间。第一供电单元将第一电源的输出电压的反相值或与第一电源的输出电压对应的电压的反相值提供给第一晶体管TR1的栅极输入。第二供应单元将第一电源的输出电压或与第一电源的输出电压相对应的电压提供给第二晶体管TR2的栅极输入。

7. 发明授权

US07248199B2 Analog-to-digital converter 有权
标题翻译：模数转换器
公开(公告)号：US07248199B2
公开(公告)日：2007-07-24
申请号：US11367792
申请日：2006-03-03
申请人： Takashi Asano , Atsushi Wada , Shigeto Kobayashi
发明人： Takashi Asano , Atsushi Wada , Shigeto Kobayashi
IPC分类号： H03M1/34
CPC分类号： H03M1/167 , H03M1/1205
摘要： In an analog-to-digital (A-D) converter, an A-D conversion circuit samples an analog signal and converts it to a digital value of a predetermined bit number less than a targeted bit number. An amplifier circuit is provided in parallel to the A-D conversion circuit, and holds the signal sampled by the A-D conversion circuit or amplifies it by a predetermined gain. A first source follower circuit for the amplifier circuit and a second source follower circuit for the A-D conversion circuit are provided separately at the output side of a sample-and-hold circuit.
摘要翻译：在模数（A-D）转换器中，A-D转换电路对模拟信号进行采样并将其转换成小于目标位数的预定位数的数字值。放大器电路与A-D转换电路并联提供，并且保持由A-D转换电路采样的信号或将其放大预定的增益。用于放大器电路的第一源极跟随器电路和用于A-D转换电路的第二源极跟随器电路分别设置在采样保持电路的输出侧。

8. 发明申请

US20060197693A1 Analog-to-digital converter 有权
标题翻译：模数转换器
公开(公告)号：US20060197693A1
公开(公告)日：2006-09-07
申请号：US11367792
申请日：2006-03-03
申请人： Takashi Asano , Atsushi Wada , Shigeto Kobayashi
发明人： Takashi Asano , Atsushi Wada , Shigeto Kobayashi
IPC分类号： H03M1/12
CPC分类号： H03M1/167 , H03M1/1205
摘要： In an analog-to-digital (A-D) converter, an A-D conversion circuit samples an analog signal and converts it to a digital value of a predetermined bit number less than a targeted bit number. An amplifier circuit is provided in parallel to the A-D conversion circuit, and holds the signal sampled by the A-D conversion circuit or amplifies it by a predetermined gain. A first source follower circuit for the amplifier circuit and a second source follower circuit for the A-D conversion circuit are provided separately at the output side of a sample-and-hold circuit.
摘要翻译：在模数（A-D）转换器中，A-D转换电路对模拟信号进行采样并将其转换成小于目标位数的预定位数的数字值。放大器电路与A-D转换电路并联提供，并且保持由A-D转换电路采样的信号或将其放大预定的增益。用于放大器电路的第一源极跟随器电路和用于A-D转换电路的第二源极跟随器电路分别设置在采样保持电路的输出侧。

9. 发明授权

US08854206B2 Sample measuring device and sample measuring system 有权
标题翻译：样品测量装置和样品测量系统
公开(公告)号：US08854206B2
公开(公告)日：2014-10-07
申请号：US13458694
申请日：2012-04-27
申请人： Akinori Kai , Atsushi Wada
发明人： Akinori Kai , Atsushi Wada
IPC分类号： G08B1/08 , A61B5/00 , A61B5/145
CPC分类号： A61B5/14532 , A61B5/0002 , G06F19/00 , G16H40/63
摘要： A sample measuring device according to the present invention includes a measuring unit for performing measurement with respect to a particular component contained in a sample, a measurement data storage unit for storing measurement data obtained by the measuring unit, a display unit for displaying the measurement data, a sensor strip detector for detecting insertion and removal of a sensor strip to which the sample is applied, and a first data transmitter/receiver for transmitting the measurement data via wireless communication. The first data transmitter/receiver performs initial authentication process for wireless communication after insertion of the sensor strip is detected by the sensor strip detector.
摘要翻译：根据本发明的样本测量装置包括：用于对包含在样本中的特定部件进行测量的测量单元，用于存储由测量单元获得的测量数据的测量数据存储单元，用于显示测量数据的显示单元用于检测插入和移除其中应用样品的传感器条的传感器条检测器，以及用于经由无线通信发送测量数据的第一数据发送器/接收器。传感器条检测器检测到传感器带插入后，第一个数据发送器/接收器执行无线通信的初始认证过程。

10. 发明授权

US08796988B2 Input-output circuit 有权
标题翻译：输入输出电路
公开(公告)号：US08796988B2
公开(公告)日：2014-08-05
申请号：US13430182
申请日：2012-03-26
申请人： Atsushi Wada , Hajime Mizukami , Mitsuaki Hatakeyama , Shigeto Kobayashi
发明人： Atsushi Wada , Hajime Mizukami , Mitsuaki Hatakeyama , Shigeto Kobayashi
IPC分类号： H02J7/00
CPC分类号： H02J7/0052 , G06F1/266 , H02J9/005 , H02J2007/0001 , H02J2007/0062
摘要： A power supply detection circuit detects power feeding to a VBUS terminal from the outside. A charger detection circuit detects the kind of charger by monitoring voltages of a DP terminal and a DM terminal. A control unit adjusts timing and instructs the charger detection circuit to start a charger kind detection process after a notification of detection of power feeding is received from the power supply detection circuit.
摘要翻译：电源检测电路检测从外部向VBUS端子供电。充电器检测电路通过监视DP端子和DM端子的电压来检测充电器的种类。在从电源检测电路接收到供电检测通知之后，控制单元调整定时并指示充电器检测电路开始充电器种类检测处理。

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